Difference between revisions of "83Plus:Ports:04"

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== Credits and Contributions ==
 
== Credits and Contributions ==
 
* '''Dan Englender''': Originally documented memory map modes [http://www.detachedsolutions.com/forum/viewtopic.php?p=21593#21593 here]
 
* '''Dan Englender''': Originally documented memory map modes [http://www.detachedsolutions.com/forum/viewtopic.php?p=21593#21593 here]
* '''Michael Vincent''': For his docs [http://www.michaelv.org/programs/calcs/ports/ here], which helped me figure out the interrupt device bits.
+
* '''Michael Vincent''': For his docs [http://www.michaelv.org/programs/calcs/ports/port4.html here], which helped me figure out the interrupt device bits.

Revision as of 10:59, 28 March 2005

Synopsis

Port Number: 04h

Function: Interrupting Device Identification and Memory Map Control

This port serves two purposes. When read it indicates the device that triggered an interrupt. When written it sets the memory map mode and hardware timer speed.

Read Values

  • Bits 0~2 and 4~7 are set according to which device triggered the running interrupt.
    • Bit 0: Set if pressing the ON Key triggered the interrupt.
    • Bit 1: Set if the hardware timer triggered the interrupt.
    • Bit 2: Unknown, but has something to do with the hardware timer.
    • Bit 4: Link activity generated an interrupt.
    • 83+SE / 84+ only: Bit 5: First crystal timer triggered an interrupt.
    • 83+SE / 84+ only: Bit 6: Second crystal timer triggered an interrupt.
    • 83+SE / 84+ only: Bit 7: Third crystal timer triggered an interrupt.
  • Bit 3 is reset if the ON key is being pressed, set otherwise.

Write Values

  • Bit 0 reset to select memory map mode 0. In mode 0 the RAM and ROM is mapped to CPU memory as follows:
    • Address 0000h ~ 3FFFh: ROM Page 0
    • Address 4000h ~ 7FFFh: Memory Bank A (Page selected in Port 06h)
    • Address 8000h ~ BFFFh: Memory Bank B (Page selected in Port 07h)
    • 83+ Basic: Address C000h ~ FFFFh: RAM Page 0
    • Everything else: Address C000h ~ FFFFh: Page selected in Port 05h
  • Bit 0 set to select memory map mode 1. In mode 1 the RAM and ROM is mapped to CPU memory as follows:
    • Address 0000h ~ 3FFFh: ROM Page 0
    • Address 4000h ~ 7FFFh: RAM Page 0
    • Address 8000h ~ BFFFh: Memory Bank A (Page selected in Port 06h)
    • Address C000h ~ FFFFh: Memory Bank B (Page selected in Port 07h)

Bits 4~6 should be 1 on the 83+ and 83+SE, and 0 on the 84+ and 84+SE.

  • Bits 1 and 2 control the hardware timer frequency. Setting both 0 sets the timer to the fastest speed, and both 1 is the slowest speed. The normal speed is with both bits 1.

Comments

The calculator uses mode 0 for normal operation. If you change the memory map mode be sure to change it back before returning control. Also, do not switch from mode 0 to mode 1 inside the 4000h ~ 7FFFh range, as it will basically crash the calculator because RAM Page 0 will take over that section and RAM Page 0 cannot execute code.

Example

This example shows successful use of this port, switching to mode 1 and back. Mode 1 is the only way to execute code beyond address C000h on the 83+ Basic.

 in a, (7) ;Save current Bank B page because we'll trash it.
 push af
 ld a, 1Ch ;Put this page into 8000
 out (7), a
 jp $ + 4003h ;This will actually jump to the next statement, but in Bank B.
 ld a, 77h ;Select mode 1 and keep the timer speed at normal...
 out (4), a ;Now we're in mode 1.
 ;We're still at 8000h here but we are back in Bank A.
 ;Now to go back.
 ld a, 76h ;I could dec a for this example, but...
 out (4), a ;Back in mode 0 and bank B.
 jp $ - 3FFDh ;Jump back to bank A.
 pop af
 out (7), a ;Restore bank B.

Credits and Contributions

  • Dan Englender: Originally documented memory map modes here
  • Michael Vincent: For his docs here, which helped me figure out the interrupt device bits.