Difference between revisions of "84PCE:Ports:1005"
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| − | [[Category:84PCE:Ports:By_Address|1005 - | + | [[Category:84PCE:Ports:By_Address|1005 - Flash Wait States]] [[Category:84PCE:Ports:By_Name|Flash Wait States]] |
== Synopsis == | == Synopsis == | ||
'''Port Number:''' 1005 | '''Port Number:''' 1005 | ||
| Line 5: | Line 5: | ||
'''Memory-mapped Address:''' E00005 | '''Memory-mapped Address:''' E00005 | ||
| − | '''Function:''' | + | '''Function:''' Controls flash wait states. Each read from flash will have at least 6 wait states, plus the number of wait states specified in this port. The OS defaults to 04 in this port, so by default, every read from flash incurs a 10 wait state penalty. (V/RAM gets 4 wait states.) |
== Details == | == Details == | ||
| Line 13: | Line 13: | ||
|- | |- | ||
|00 | |00 | ||
| − | |Instant hard crash & reset | + | |Instant hard crash & reset if OS ISR is enabled |
|- | |- | ||
|01 | |01 | ||
| − | |Makes OS a little | + | |Makes OS a little faster, perhaps 30 % |
|- | |- | ||
|02-03 | |02-03 | ||
Revision as of 00:51, 3 April 2015
Synopsis
Port Number: 1005
Memory-mapped Address: E00005
Function: Controls flash wait states. Each read from flash will have at least 6 wait states, plus the number of wait states specified in this port. The OS defaults to 04 in this port, so by default, every read from flash incurs a 10 wait state penalty. (V/RAM gets 4 wait states.)
Details
| Value | Effect |
| 00 | Instant hard crash & reset if OS ISR is enabled |
| 01 | Makes OS a little faster, perhaps 30 % |
| 02-03 | No ill-effects |
| 04 | Normal value |
| 10 | OS feels noticeably sluggish |
| 20 | OS is unbearably sluggish, RAM program dummy loop is not slower |
| FF | Don't even bother trying to do anything |
