Difference between revisions of "84PCE:Ports:D000"
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| − | |Status bits.<br/>Boot code waits for bits 2 and 12-15 to be 0 before/after reading/writing. | + | |Status bits.<br/>Bit 2 appears to be set if data is sending, and bits 12-15 the number of values queued.<br/>Boot code waits for bits 2 and 12-15 to be 0 before/after reading/writing. |
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|D010<br/>F80010 | |D010<br/>F80010 | ||
Revision as of 23:02, 28 January 2018
Contents
Synopsis
Port Number: D000
Memory-mapped Address: F80000
Function: LCD Interface
This appears to be an SPI controller that interfaces with the LCD. Non-extended commands from [1] appear to work, but there's plenty of unknown commands used by the boot code.
| Port | Default | Bits | Information |
| D000 F80000 |
0000F38C | Boot code writes 180B/09 before/after turning on/off the lcd. Bits 0-2 could be transfer size. | |
| D004 F80004 |
0000182B | 007FFFFF | Boot code initializes to 02000B. |
| D008 F80008 |
0002000B | 00000F8F | Boot code initializes to 010C. Bit 0 is set to transfer data. Bit 7 is set/reset for reading/writing. |
| D00C F8000C |
000004F2 | Status bits. Bit 2 appears to be set if data is sending, and bits 12-15 the number of values queued. Boot code waits for bits 2 and 12-15 to be 0 before/after reading/writing. | |
| D010 F80010 |
00002100 | Unknown | |
| D014 F80014 |
00000008 | Unknown | |
| D018 F80018 |
FIFO in/out. | ||
| D01C F8001C |
0E0F0F1F | Constant, could be an ID or status. | |
| D060 F80060 |
00012100 | Constant, could be an ID or status. | |
| D064 F80064 |
0E0F0F1F | Constant, could be an ID or status. |
Example
Sending
ld a,036h ; Flips the lcd horizontally, vertically, and swaps the b and r components call spiCmd ld a,0C0h call spiParam ld a,002h ; Resetting the lcd on exit call spiCmd jp boot_InitializeHardware ; Input: A = parameter spiParam: scf ; First bit is set for data .db 030h ; jr nc,? ; skips over one byte ; Input: A = command spiCmd: or a,a ; First bit is clear for commands ld hl,0F80818h call spiWrite ld l,h ld (hl),001h spiWait: ld l,00Dh spiWait1: ld a,(hl) and a,0F0h jr nz,spiWait1 dec l spiWait2: bit 2,(hl) jr nz,spiWait2 ld l,h ld (hl),a ret spiWrite: ld b,3 spiWriteLoop: rla rla rla ld (hl),a ; send 3 bits djnz spiWriteLoop ret
Receiving
This does not appear to work, always returning 0 on the calcs I've tested, due to either a TI bug or hardware issue.
; Input: A = command ; Ouput: A = data spiRead: ld hl,0F80808 ld (hl),00Ch ld l,018h or a,a call spiWrite xor a,a ; not sure what this is for call spiWrite ld l,009h ld (hl),001h dec l ld (hl),081h call spiWait ld l,$18 ld a,(hl) ; dummy read ld a,(hl) ld a,(hl) ; Why is there no wait after dummy read? ld a,(hl) rla rla rla rla rla and a,0E0h ld c,a ld a,(hl) rla rla and a,01Ch or a,c ld c,a ld a,(hl) rra ; why are we throwing away the lsb instead of the msb and a,003h or a,c ret
