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2026-04-05T18:12:55Z
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https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2009-11-24T23:39:07Z
<p>CoBB: Fixed links to the website.</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is a relatively new member of the TI [[Emulators|emulator]] 'family', developed from scratch by Patai Gergely. Development has ceased, as the author has no sufficient time to continue, and the code base is not easily extended to implement calculator features that were not known at the start of the project. Users who need the emulation of newer models than the plain 83+ should use [[:Emulators:Wabbitemu|WabbitEmu]] instead.<br />
<br />
This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
When interpreting keypresses for the calculators, PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key and so on.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Backspace || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
The debug window is composed of separate modules, which show the state of the calculator from a certain aspect. Note that the components are tuned to the top left slot by default, and you have to change the slots manually in the layout editor if you want to examine a different slot.<br />
<br />
You can display a context menu by right clicking anywhere in the debug window. The menu list first the global keys, then displays all the component specific bindings after a horizontal separator. The global keys will always have the same effect regardless of the module selected. These keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| F7 || Execute one instruction (or skip to the next interrupt when halted)<br />
|-<br />
| F8 || Step over the next instruction; the same as F7, except that CALL, RST, DJNZ and repeat instructions (e.g. LDIR) are executed until either the program counter hits the subsequent instruction or 10000000 clock cycles elapse<br />
|-<br />
| F12 || Toggle the layout editor<br />
|}<br />
<br />
===Layout editor===<br />
<br />
This feature is still under development. Most importantly, the modified layouts are not saved. The default layout is designed not to conceal anything if the window is maximised at a resolution of at least 1024x768. The keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Insert || Add a component module after the selected one; the type of the component can be picked from a list<br />
|-<br />
| Delete || Delete the subtree starting from the currently selected node<br />
|-<br />
| 0..3 || Set the slot of every node in the subtree starting from the selection to the number pressed (0 - top left, 1 - top right, 2 - bottom left, 3 - bottom right)<br />
|}<br />
<br />
===Modules===<br />
<br />
'''Disassembly'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Up/down arrows, Page Up/Down || Navigate<br />
|-<br />
| F2 || Set/remove execution breakpoint at the cursor (it affects every byte of the instruction)<br />
|-<br />
| G || Go to a specific address (enter in hexadecimal; press Escape instead of Enter to cancel)<br />
|-<br />
| P, S, B, D, H, X, Y || Go to the address pointed by PC, SP, BC, DE, HL, IX, IY, respectively<br />
|-<br />
| R || Run from cursor, i.e. set PC to the address of the instruction under the cursor<br />
|}<br />
<br />
Important: when a breakpoint is set, it affects all the slots at the same time for the time being!<br />
<br />
'''Memory view'''<br />
<br />
This is a view of the 64K CPU address space. You can use the arrows and the page up/down keys to navigate. The G, P, S, B, D, H, X and Y keys have the same effect as on the disassembly pane.<br />
<br />
When you press Enter, you can edit the value currently under the cursor by simulating a memory write to that address, i.e. only RAM contents can be modified this way. The dialog accepts numbers in four bases, which can be denoted by prefixes: % - binary, @ - octal, # - decimal and $ - hexadecimal. If there is no prefix, the number is treated as hexadecimal. If you press Shift-Enter instead of just Enter after typing the number, the effect will be writing a little-endian word at the current address instead of a single byte.<br />
<br />
'''Registers'''<br />
<br />
The internal state of the Z80. Each value can be edited after left clicking; the values must be entered in hexadecimal. Editing can be concluded with Enter or by clicking elsewhere, and cancelled with Escape. Note that halt can have three values: 0 - normal operation, 1 - halt active, 2 - violating execution protection (if you attempt running any further, the calculator will be forced to reset).<br />
<br />
'''Variables'''<br />
<br />
A simple, read-only VAT viewer. Double clicking a variable sets the address of the memory view to the address of its data.<br />
<br />
'''LCD data'''<br />
<br />
Graphical display of the contents of LCD memory. Note that all the 120 columns are shown here, even though all calculators emulated can only display 96. However, the memory is still there. The current X and Y addresses are shown by a bluish colour on the byte that will be accessed through the data port.<br />
<br />
'''Link history'''<br />
<br />
Link activity graph that records changes on the link port of calculators plugged into the hub. Calculators not plugged in are shown inactive even if they do manipulate their link port.<br />
<br />
'''Key-value modules'''<br />
<br />
The following modules are in this category: LCD physics, LCD software, Information, Time, Interrupts, Memory, Keyboard, Link. All of these display a list of characteristics. The right hand sides can be edited where the cursor turns into a hand. Editing can either mean a single click (e.g. interrupt frequencies or keyboard state) or bring up a text box for numeric values, where Escape can be used to cancel as usual.<br />
<br />
==Scripting==<br />
<br />
It is possible to run the emulator in a non-interactive mode through a pipe (communicating through stdio), just invoke the executable with the -p switch and redirect the input and the output. Do not try to run it with the keyboard on the input or a terminal on the output, because it will hang.<br />
<br />
Each command sent must be on a separate line. All of them emit at least a line containing 'OK' as a response in case of success. Error conditions are signaled by outputs starting with 'Error:'.<br />
<br />
The commands are the following:<br />
<br />
*send-file <slot> <file> - send a file to the specified slot (the same as drag and drop); don't quote the filename, it's read from the first non-space after the slot number till the end of the line (the slot number must be between 0 and 15 or 0x0 and 0xf)<br />
<br />
*activate-slot <slot> - select the current slot<br />
<br />
*reset-calc - reset the calc in the current slot (you might need to run a few million cc's after this before pressing on)<br />
<br />
*run <cycles> - run for the specified number of cycles (it should be a number between 1 and 2000000000); when debugging is enabled and execution stops on a breakpoint, there will be a line starting with 'Info:' output before the usual 'OK'<br />
<br />
*step <n> - execute n instructions ignoring the breakpoints, n defaults to 1 when omitted; the firing of a possibly masked timer during a halt counts as one instruction<br />
<br />
*draw-screen-bw - dump LCD memory — 96*64 bytes, 0 for white and 255 for black; the raw data is preceded by a line that always contains two characters: the first is '1' if the calculator is powered, '0' otherwise, and the second is '1' if the LCD is powered, '0' if it isn't (so the image should be displayed only if this line says '11')<br />
<br />
*draw-screen-gs - dump greyscale screen (only updated 25 times per calculator second) — 96*64 bytes preceded by the same two-character line, same format but using the full range of values<br />
<br />
*key-down <key> - press key (calc key, so the argument is a token like '2nd', 'mode' etc.)<br />
<br />
*key-up <key> - release key<br />
<br />
<key> must be one of the tokens below:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| &nbsp; || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0<br />
|-<br />
| 0 || &nbsp; || &nbsp; || &nbsp; || &nbsp; || up || right || left || down<br />
|-<br />
| 1 || &nbsp; || clear || ^ || / || * || - || + || enter<br />
|-<br />
| 2 || &nbsp; || vars || tan || ) || 9 || 6 || 3 || (-)<br />
|-<br />
| 3 || stat || prgm || cos || ( || 8 || 5 || 2 || .<br />
|-<br />
| 4 || x || matrx || sin || , || 7 || 4 || 1 || 0<br />
|-<br />
| 5 || alpha || math || x^-1 || x^2 || log || ln || sto || &nbsp;<br />
|-<br />
| 6 || del || mode || 2nd || y= || window || zoom || trace || graph<br />
|}<br />
<br />
The on key is called 'on', surprisingly. You can also write 'apps' instead of 'matrx'.<br />
<br />
*dump-state <type> - obtain information about the internal state of the emulated hardware; <type> must be one of the following (without quotes): 'lcd physics', 'lcd software', 'model', 'time', 'interrupt', 'pager', 'keyboard', 'link', 'cpu', 'memory'. Except for the last two the format is the following after the initial 'OK': a line containing nothing but the number of subsequent lines, and a 'key: value' pair on each line. With 'cpu' it displays the registers with a 'reg=value' pair on each line, all in hex, while 'memory' is a dump of 65536 bytes as seen in the z80 address space with the current mapping mode<br />
<br />
*{set|remove}-breakpoint <type> <args> - add/remove a breakpoint; the arguments depend on the type given; the only type currently supported is 'code' (again, no quotes). It has only one argument: a number specifying the address. It can be base 10, 16 or 8 differentiated by the usual C prefixes. (Actually, this applies to any numeric argument in any command.) For the removal you can also specify -1 here, which removes all code breakpoints.<br />
<br />
There is currently no way to directly manipulate the state of the calculator.<br />
<br />
==External Resources==<br />
[http://emt.bme.hu/patai/programs/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://emt.bme.hu/patai/programs/pindurti/changelog.txt Changelog]<br />
<br />
[http://emt.bme.hu/patai/programs/pindurti/features/ PindurTI Idea box] (not active any more)<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2008-03-18T06:36:27Z
<p>CoBB: Update on the project state plus a Wabbit link</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is a relatively new member of the TI [[Emulators|emulator]] 'family', developed from scratch by Patai Gergely. Development has ceased, as the author has no sufficient time to continue, and the code base is not easily extended to implement calculator features that were not known at the start of the project. Users who need the emulation of newer models than the plain 83+ should use [[:Emulators:Wabbitemu|WabbitEmu]] instead.<br />
<br />
This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
When interpreting keypresses for the calculators, PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key and so on.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Backspace || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
The debug window is composed of separate modules, which show the state of the calculator from a certain aspect. Note that the components are tuned to the top left slot by default, and you have to change the slots manually in the layout editor if you want to examine a different slot.<br />
<br />
You can display a context menu by right clicking anywhere in the debug window. The menu list first the global keys, then displays all the component specific bindings after a horizontal separator. The global keys will always have the same effect regardless of the module selected. These keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| F7 || Execute one instruction (or skip to the next interrupt when halted)<br />
|-<br />
| F8 || Step over the next instruction; the same as F7, except that CALL, RST, DJNZ and repeat instructions (e.g. LDIR) are executed until either the program counter hits the subsequent instruction or 10000000 clock cycles elapse<br />
|-<br />
| F12 || Toggle the layout editor<br />
|}<br />
<br />
===Layout editor===<br />
<br />
This feature is still under development. Most importantly, the modified layouts are not saved. The default layout is designed not to conceal anything if the window is maximised at a resolution of at least 1024x768. The keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Insert || Add a component module after the selected one; the type of the component can be picked from a list<br />
|-<br />
| Delete || Delete the subtree starting from the currently selected node<br />
|-<br />
| 0..3 || Set the slot of every node in the subtree starting from the selection to the number pressed (0 - top left, 1 - top right, 2 - bottom left, 3 - bottom right)<br />
|}<br />
<br />
===Modules===<br />
<br />
'''Disassembly'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Up/down arrows, Page Up/Down || Navigate<br />
|-<br />
| F2 || Set/remove execution breakpoint at the cursor (it affects every byte of the instruction)<br />
|-<br />
| G || Go to a specific address (enter in hexadecimal; press Escape instead of Enter to cancel)<br />
|-<br />
| P, S, B, D, H, X, Y || Go to the address pointed by PC, SP, BC, DE, HL, IX, IY, respectively<br />
|-<br />
| R || Run from cursor, i.e. set PC to the address of the instruction under the cursor<br />
|}<br />
<br />
Important: when a breakpoint is set, it affects all the slots at the same time for the time being!<br />
<br />
'''Memory view'''<br />
<br />
This is a view of the 64K CPU address space. You can use the arrows and the page up/down keys to navigate. The G, P, S, B, D, H, X and Y keys have the same effect as on the disassembly pane.<br />
<br />
When you press Enter, you can edit the value currently under the cursor by simulating a memory write to that address, i.e. only RAM contents can be modified this way. The dialog accepts numbers in four bases, which can be denoted by prefixes: % - binary, @ - octal, # - decimal and $ - hexadecimal. If there is no prefix, the number is treated as hexadecimal. If you press Shift-Enter instead of just Enter after typing the number, the effect will be writing a little-endian word at the current address instead of a single byte.<br />
<br />
'''Registers'''<br />
<br />
The internal state of the Z80. Each value can be edited after left clicking; the values must be entered in hexadecimal. Editing can be concluded with Enter or by clicking elsewhere, and cancelled with Escape. Note that halt can have three values: 0 - normal operation, 1 - halt active, 2 - violating execution protection (if you attempt running any further, the calculator will be forced to reset).<br />
<br />
'''Variables'''<br />
<br />
A simple, read-only VAT viewer. Double clicking a variable sets the address of the memory view to the address of its data.<br />
<br />
'''LCD data'''<br />
<br />
Graphical display of the contents of LCD memory. Note that all the 120 columns are shown here, even though all calculators emulated can only display 96. However, the memory is still there. The current X and Y addresses are shown by a bluish colour on the byte that will be accessed through the data port.<br />
<br />
'''Link history'''<br />
<br />
Link activity graph that records changes on the link port of calculators plugged into the hub. Calculators not plugged in are shown inactive even if they do manipulate their link port.<br />
<br />
'''Key-value modules'''<br />
<br />
The following modules are in this category: LCD physics, LCD software, Information, Time, Interrupts, Memory, Keyboard, Link. All of these display a list of characteristics. The right hand sides can be edited where the cursor turns into a hand. Editing can either mean a single click (e.g. interrupt frequencies or keyboard state) or bring up a text box for numeric values, where Escape can be used to cancel as usual.<br />
<br />
==Scripting==<br />
<br />
It is possible to run the emulator in a non-interactive mode through a pipe (communicating through stdio), just invoke the executable with the -p switch and redirect the input and the output. Do not try to run it with the keyboard on the input or a terminal on the output, because it will hang.<br />
<br />
Each command sent must be on a separate line. All of them emit at least a line containing 'OK' as a response in case of success. Error conditions are signaled by outputs starting with 'Error:'.<br />
<br />
The commands are the following:<br />
<br />
*send-file <slot> <file> - send a file to the specified slot (the same as drag and drop); don't quote the filename, it's read from the first non-space after the slot number till the end of the line (the slot number must be between 0 and 15 or 0x0 and 0xf)<br />
<br />
*activate-slot <slot> - select the current slot<br />
<br />
*reset-calc - reset the calc in the current slot (you might need to run a few million cc's after this before pressing on)<br />
<br />
*run <cycles> - run for the specified number of cycles (it should be a number between 1 and 2000000000); when debugging is enabled and execution stops on a breakpoint, there will be a line starting with 'Info:' output before the usual 'OK'<br />
<br />
*step <n> - execute n instructions ignoring the breakpoints, n defaults to 1 when omitted; the firing of a possibly masked timer during a halt counts as one instruction<br />
<br />
*draw-screen-bw - dump LCD memory — 96*64 bytes, 0 for white and 255 for black; the raw data is preceded by a line that always contains two characters: the first is '1' if the calculator is powered, '0' otherwise, and the second is '1' if the LCD is powered, '0' if it isn't (so the image should be displayed only if this line says '11')<br />
<br />
*draw-screen-gs - dump greyscale screen (only updated 25 times per calculator second) — 96*64 bytes preceded by the same two-character line, same format but using the full range of values<br />
<br />
*key-down <key> - press key (calc key, so the argument is a token like '2nd', 'mode' etc.)<br />
<br />
*key-up <key> - release key<br />
<br />
<key> must be one of the tokens below:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| &nbsp; || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0<br />
|-<br />
| 0 || &nbsp; || &nbsp; || &nbsp; || &nbsp; || up || right || left || down<br />
|-<br />
| 1 || &nbsp; || clear || ^ || / || * || - || + || enter<br />
|-<br />
| 2 || &nbsp; || vars || tan || ) || 9 || 6 || 3 || (-)<br />
|-<br />
| 3 || stat || prgm || cos || ( || 8 || 5 || 2 || .<br />
|-<br />
| 4 || x || matrx || sin || , || 7 || 4 || 1 || 0<br />
|-<br />
| 5 || alpha || math || x^-1 || x^2 || log || ln || sto || &nbsp;<br />
|-<br />
| 6 || del || mode || 2nd || y= || window || zoom || trace || graph<br />
|}<br />
<br />
The on key is called 'on', surprisingly. You can also write 'apps' instead of 'matrx'.<br />
<br />
*dump-state <type> - obtain information about the internal state of the emulated hardware; <type> must be one of the following (without quotes): 'lcd physics', 'lcd software', 'model', 'time', 'interrupt', 'pager', 'keyboard', 'link', 'cpu', 'memory'. Except for the last two the format is the following after the initial 'OK': a line containing nothing but the number of subsequent lines, and a 'key: value' pair on each line. With 'cpu' it displays the registers with a 'reg=value' pair on each line, all in hex, while 'memory' is a dump of 65536 bytes as seen in the z80 address space with the current mapping mode<br />
<br />
*{set|remove}-breakpoint <type> <args> - add/remove a breakpoint; the arguments depend on the type given; the only type currently supported is 'code' (again, no quotes). It has only one argument: a number specifying the address. It can be base 10, 16 or 8 differentiated by the usual C prefixes. (Actually, this applies to any numeric argument in any command.) For the removal you can also specify -1 here, which removes all code breakpoints.<br />
<br />
There is currently no way to directly manipulate the state of the calculator.<br />
<br />
==External Resources==<br />
[http://www.hszk.bme.hu/~pg429/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://users.hszk.bme.hu/~pg429/pindurti/changelog.txt Changelog]<br />
<br />
[http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI Idea box]<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2006-12-16T10:02:01Z
<p>CoBB: Bringing it up-to-date</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is the latest addition to the TI [[Emulators|emulator]] 'family', still in development by Patai Gergely. This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
When interpreting keypresses for the calculators, PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key and so on.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Backspace || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
The debug window is composed of separate modules, which show the state of the calculator from a certain aspect. Note that the components are tuned to the top left slot by default, and you have to change the slots manually in the layout editor if you want to examine a different slot.<br />
<br />
You can display a context menu by right clicking anywhere in the debug window. The menu list first the global keys, then displays all the component specific bindings after a horizontal separator. The global keys will always have the same effect regardless of the module selected. These keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| F7 || Execute one instruction (or skip to the next interrupt when halted)<br />
|-<br />
| F8 || Step over the next instruction; the same as F7, except that CALL, RST, DJNZ and repeat instructions (e.g. LDIR) are executed until either the program counter hits the subsequent instruction or 10000000 clock cycles elapse<br />
|-<br />
| F12 || Toggle the layout editor<br />
|}<br />
<br />
===Layout editor===<br />
<br />
This feature is still under development. Most importantly, the modified layouts are not saved. The default layout is designed not to conceal anything if the window is maximised at a resolution of at least 1024x768. The keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Insert || Add a component module after the selected one; the type of the component can be picked from a list<br />
|-<br />
| Delete || Delete the subtree starting from the currently selected node<br />
|-<br />
| 0..3 || Set the slot of every node in the subtree starting from the selection to the number pressed (0 - top left, 1 - top right, 2 - bottom left, 3 - bottom right)<br />
|}<br />
<br />
===Modules===<br />
<br />
'''Disassembly'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Up/down arrows, Page Up/Down || Navigate<br />
|-<br />
| F2 || Set/remove execution breakpoint at the cursor (it affects every byte of the instruction)<br />
|-<br />
| G || Go to a specific address (enter in hexadecimal; press Escape instead of Enter to cancel)<br />
|-<br />
| P, S, B, D, H, X, Y || Go to the address pointed by PC, SP, BC, DE, HL, IX, IY, respectively<br />
|-<br />
| R || Run from cursor, i.e. set PC to the address of the instruction under the cursor<br />
|}<br />
<br />
Important: when a breakpoint is set, it affects all the slots at the same time for the time being!<br />
<br />
'''Memory view'''<br />
<br />
This is a view of the 64K CPU address space. You can use the arrows and the page up/down keys to navigate. The G, P, S, B, D, H, X and Y keys have the same effect as on the disassembly pane.<br />
<br />
When you press Enter, you can edit the value currently under the cursor by simulating a memory write to that address, i.e. only RAM contents can be modified this way. The dialog accepts numbers in four bases, which can be denoted by prefixes: % - binary, @ - octal, # - decimal and $ - hexadecimal. If there is no prefix, the number is treated as hexadecimal. If you press Shift-Enter instead of just Enter after typing the number, the effect will be writing a little-endian word at the current address instead of a single byte.<br />
<br />
'''Registers'''<br />
<br />
The internal state of the Z80. Each value can be edited after left clicking; the values must be entered in hexadecimal. Editing can be concluded with Enter or by clicking elsewhere, and cancelled with Escape. Note that halt can have three values: 0 - normal operation, 1 - halt active, 2 - violating execution protection (if you attempt running any further, the calculator will be forced to reset).<br />
<br />
'''Variables'''<br />
<br />
A simple, read-only VAT viewer. Double clicking a variable sets the address of the memory view to the address of its data.<br />
<br />
'''LCD data'''<br />
<br />
Graphical display of the contents of LCD memory. Note that all the 120 columns are shown here, even though all calculators emulated can only display 96. However, the memory is still there. The current X and Y addresses are shown by a bluish colour on the byte that will be accessed through the data port.<br />
<br />
'''Link history'''<br />
<br />
Link activity graph that records changes on the link port of calculators plugged into the hub. Calculators not plugged in are shown inactive even if they do manipulate their link port.<br />
<br />
'''Key-value modules'''<br />
<br />
The following modules are in this category: LCD physics, LCD software, Information, Time, Interrupts, Memory, Keyboard, Link. All of these display a list of characteristics. The right hand sides can be edited where the cursor turns into a hand. Editing can either mean a single click (e.g. interrupt frequencies or keyboard state) or bring up a text box for numeric values, where Escape can be used to cancel as usual.<br />
<br />
==Scripting==<br />
<br />
It is possible to run the emulator in a non-interactive mode through a pipe (communicating through stdio), just invoke the executable with the -p switch and redirect the input and the output. Do not try to run it with the keyboard on the input or a terminal on the output, because it will hang.<br />
<br />
Each command sent must be on a separate line. All of them emit at least a line containing 'OK' as a response in case of success. Error conditions are signaled by outputs starting with 'Error:'.<br />
<br />
The commands are the following:<br />
<br />
*send-file <slot> <file> - send a file to the specified slot (the same as drag and drop); don't quote the filename, it's read from the first non-space after the slot number till the end of the line (the slot number must be between 0 and 15 or 0x0 and 0xf)<br />
<br />
*activate-slot <slot> - select the current slot<br />
<br />
*reset-calc - reset the calc in the current slot (you might need to run a few million cc's after this before pressing on)<br />
<br />
*run <cycles> - run for the specified number of cycles (it should be a number between 1 and 2000000000); when debugging is enabled and execution stops on a breakpoint, there will be a line starting with 'Info:' output before the usual 'OK'<br />
<br />
*step <n> - execute n instructions ignoring the breakpoints, n defaults to 1 when omitted; the firing of a possibly masked timer during a halt counts as one instruction<br />
<br />
*draw-screen-bw - dump LCD memory — 96*64 bytes, 0 for white and 255 for black; the raw data is preceded by a line that always contains two characters: the first is '1' if the calculator is powered, '0' otherwise, and the second is '1' if the LCD is powered, '0' if it isn't (so the image should be displayed only if this line says '11')<br />
<br />
*draw-screen-gs - dump greyscale screen (only updated 25 times per calculator second) — 96*64 bytes preceded by the same two-character line, same format but using the full range of values<br />
<br />
*key-down <key> - press key (calc key, so the argument is a token like '2nd', 'mode' etc.)<br />
<br />
*key-up <key> - release key<br />
<br />
<key> must be one of the tokens below:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| &nbsp; || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0<br />
|-<br />
| 0 || &nbsp; || &nbsp; || &nbsp; || &nbsp; || up || right || left || down<br />
|-<br />
| 1 || &nbsp; || clear || ^ || / || * || - || + || enter<br />
|-<br />
| 2 || &nbsp; || vars || tan || ) || 9 || 6 || 3 || (-)<br />
|-<br />
| 3 || stat || prgm || cos || ( || 8 || 5 || 2 || .<br />
|-<br />
| 4 || x || matrx || sin || , || 7 || 4 || 1 || 0<br />
|-<br />
| 5 || alpha || math || x^-1 || x^2 || log || ln || sto || &nbsp;<br />
|-<br />
| 6 || del || mode || 2nd || y= || window || zoom || trace || graph<br />
|}<br />
<br />
The on key is called 'on', surprisingly. You can also write 'apps' instead of 'matrx'.<br />
<br />
*dump-state <type> - obtain information about the internal state of the emulated hardware; <type> must be one of the following (without quotes): 'lcd physics', 'lcd software', 'model', 'time', 'interrupt', 'pager', 'keyboard', 'link', 'cpu', 'memory'. Except for the last two the format is the following after the initial 'OK': a line containing nothing but the number of subsequent lines, and a 'key: value' pair on each line. With 'cpu' it displays the registers with a 'reg=value' pair on each line, all in hex, while 'memory' is a dump of 65536 bytes as seen in the z80 address space with the current mapping mode<br />
<br />
*{set|remove}-breakpoint <type> <args> - add/remove a breakpoint; the arguments depend on the type given; the only type currently supported is 'code' (again, no quotes). It has only one argument: a number specifying the address. It can be base 10, 16 or 8 differentiated by the usual C prefixes. (Actually, this applies to any numeric argument in any command.) For the removal you can also specify -1 here, which removes all code breakpoints.<br />
<br />
There is currently no way to directly manipulate the state of the calculator.<br />
<br />
==External Resources==<br />
[http://www.hszk.bme.hu/~pg429/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://users.hszk.bme.hu/~pg429/pindurti/changelog.txt Changelog]<br />
<br />
[http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI Idea box]<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2006-10-21T10:35:06Z
<p>CoBB: new screenshot key, memory write feature</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is the latest addition to the TI [[Emulators|emulator]] 'family', still in development by Patai Gergely. This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
When interpreting keypresses for the calculators, PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key and so on.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Backspace || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
The debug window is composed of separate modules, which show the state of the calculator from a certain aspect. Note that the components are tuned to the top left slot by default, and you have to change the slots manually in the layout editor if you want to examine a different slot.<br />
<br />
Some keys are global in the debugger, i.e. they will always have the same effect regardless of the module selected. These keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| F7 || Execute one instruction (or skip to the next interrupt when halted)<br />
|-<br />
| F8 || Step over the next instruction; the same as F7, except that CALL, RST, DJNZ and repeat instructions (e.g. LDIR) are executed until either the program counter hits the subsequent instruction or 10000000 clock cycles elapse<br />
|-<br />
| F12 || Toggle the layout editor<br />
|}<br />
<br />
===Layout editor===<br />
<br />
This feature is still under development. Most importantly, the modified layouts are not saved. The default layout is designed not to conceal anything if the window is maximised at a resolution of at least 1024x768. The keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Insert || Add a component module after the selected one; the type of the component can be picked from a list<br />
|-<br />
| Delete || Delete the subtree starting from the currently selected node<br />
|-<br />
| 0..3 || Set the slot of every node in the subtree starting from the selection to the number pressed (0 - top left, 1 - top right, 2 - bottom left, 3 - bottom right)<br />
|}<br />
<br />
===Modules===<br />
<br />
'''Disassembly'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Up/down arrows, Page Up/Down || Navigate<br />
|-<br />
| F2 || Set/remove execution breakpoint at the cursor<br />
|-<br />
| G || Go to a specific address (enter in hexadecimal; press Escape instead of Enter to cancel)<br />
|-<br />
| P, S, B, D, H, X, Y || Go to the address pointed by PC, SP, BC, DE, HL, IX, IY, respectively<br />
|-<br />
| R || Run from cursor, i.e. set PC to the address of the instruction under the cursor<br />
|}<br />
<br />
Important: when a breakpoint is set, it affects all the slots at the same time for the time being!<br />
<br />
'''Memory view'''<br />
<br />
This is a view of the 64K CPU address space. You can use the arrows and the page up/down keys to navigate. The G, P, S, B, D, H, X and Y keys have the same effect as on the disassembly pane.<br />
<br />
When you press Enter, you can edit the value currently under the cursor by simulating a memory write to that address, i.e. only RAM contents can be modified this way. The dialog accepts numbers in four bases, which can be denoted by postfixes: b - binary, o - octal, d - decimal and h - hexadecimal. If there is no postfix, the number is treated as hexadecimal. Consequently, if a hexadecimal number ends in b or d, the h prefix must be used explicitly. If you press Shift-Enter instead of just Enter after typing the number, the effect will be writing a little-endian word at the current address instead of a single byte.<br />
<br />
'''Registers'''<br />
<br />
The internal state of the Z80. Each value can be edited after left clicking; the values must be entered in hexadecimal. Editing can be concluded with Enter or by clicking elsewhere, and cancelled with Escape. Note that halt can have three values: 0 - normal operation, 1 - halt active, 2 - violating execution protection (if you attempt running any further, the calculator will be forced to reset).<br />
<br />
'''Variables'''<br />
<br />
A simple, read-only VAT viewer. It can be navigated using the up/down arrows, Page Up/Down and the mouse wheel as well.<br />
<br />
'''LCD data'''<br />
<br />
Graphical display of the contents of LCD memory. Note that all the 120 columns are shown here, even though all calculators emulated can only display 96. However, the memory is still there. The current X and Y addresses are shown by a bluish colour on the byte that will be accessed through the data port.<br />
<br />
'''Key-value modules'''<br />
<br />
The following modules are in this category: LCD physics, LCD software, Information, Time, Interrupts, Memory, Keyboard, Link. All of these display a list of characteristics. The right hand sides can be edited where the cursor turns into a hand. Editing can either mean a single click (e.g. interrupt frequencies or keyboard state) or bring up a text box for numeric values, where Escape can be used to cancel as usual.<br />
<br />
==Scripting==<br />
<br />
It is possible to run the emulator in a non-interactive mode through a pipe (communicating through stdio), just invoke the executable with the -p switch and redirect the input and the output. Do not try to run it with the keyboard on the input or a terminal on the output, because it will hang.<br />
<br />
Each command sent must be on a separate line. All of them emit at least a line containing 'OK' as a response in case of success. Error conditions are signaled by outputs starting with 'Error:'.<br />
<br />
The commands are the following:<br />
<br />
*send-file <slot> <file> - send a file to the specified slot (the same as drag and drop); don't quote the filename, it's read from the first non-space after the slot number till the end of the line (the slot number must be between 0 and 15 or 0x0 and 0xf)<br />
<br />
*activate-slot <slot> - select the current slot<br />
<br />
*reset-calc - reset the calc in the current slot (you might need to run a few million cc's after this before pressing on)<br />
<br />
*run <cycles> - run for the specified number of cycles (it should be a number between 1 and 2000000000); when debugging is enabled and execution stops on a breakpoint, there will be a line starting with 'Info:' output before the usual 'OK'<br />
<br />
*step <n> - execute n instructions ignoring the breakpoints, n defaults to 1 when omitted; the firing of a possibly masked timer during a halt counts as one instruction<br />
<br />
*draw-screen-bw - dump LCD memory — 96*64 bytes, 0 for white and 255 for black; the raw data is preceded by a line that always contains two characters: the first is '1' if the calculator is powered, '0' otherwise, and the second is '1' if the LCD is powered, '0' if it isn't (so the image should be displayed only if this line says '11')<br />
<br />
*draw-screen-gs - dump greyscale screen (only updated 25 times per calculator second) — 96*64 bytes preceded by the same two-character line, same format but using the full range of values<br />
<br />
*key-down <key> - press key (calc key, so the argument is a token like '2nd', 'mode' etc.)<br />
<br />
*key-up <key> - release key<br />
<br />
<key> must be one of the tokens below:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| &nbsp; || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0<br />
|-<br />
| 0 || &nbsp; || &nbsp; || &nbsp; || &nbsp; || up || right || left || down<br />
|-<br />
| 1 || &nbsp; || clear || ^ || / || * || - || + || enter<br />
|-<br />
| 2 || &nbsp; || vars || tan || ) || 9 || 6 || 3 || (-)<br />
|-<br />
| 3 || stat || prgm || cos || ( || 8 || 5 || 2 || .<br />
|-<br />
| 4 || x || matrx || sin || , || 7 || 4 || 1 || 0<br />
|-<br />
| 5 || alpha || math || x^-1 || x^2 || log || ln || sto || &nbsp;<br />
|-<br />
| 6 || del || mode || 2nd || y= || window || zoom || trace || graph<br />
|}<br />
<br />
The on key is called 'on', surprisingly. You can also write 'apps' instead of 'matrx'.<br />
<br />
*dump-state <type> - obtain information about the internal state of the emulated hardware; <type> must be one of the following (without quotes): 'lcd physics', 'lcd software', 'model', 'time', 'interrupt', 'pager', 'keyboard', 'link', 'cpu', 'memory'. Except for the last two the format is the following after the initial 'OK': a line containing nothing but the number of subsequent lines, and a 'key: value' pair on each line. With 'cpu' it displays the registers with a 'reg=value' pair on each line, all in hex, while 'memory' is a dump of 65536 bytes as seen in the z80 address space with the current mapping mode<br />
<br />
*{set|remove}-breakpoint <type> <args> - add/remove a breakpoint; the arguments depend on the type given; the only type currently supported is 'code' (again, no quotes). It has only one argument: a number specifying the address. It can be base 10, 16 or 8 differentiated by the usual C prefixes. (Actually, this applies to any numeric argument in any command.) For the removal you can also specify -1 here, which removes all code breakpoints.<br />
<br />
There is currently no way to directly manipulate the state of the calculator.<br />
<br />
==External Resources==<br />
[http://www.hszk.bme.hu/~pg429/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://users.hszk.bme.hu/~pg429/pindurti/changelog.txt Changelog]<br />
<br />
[http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI Idea box]<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2006-09-02T21:05:34Z
<p>CoBB: /* Debugger */</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is the latest addition to the TI [[Emulators|emulator]] 'family', still in development by Patai Gergely. This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
When interpreting keypresses for the calculators, PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key and so on.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Alt || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
The debug window is composed of separate modules, which show the state of the calculator from a certain aspect. Note that the components are tuned to the top left slot by default, and you have to change the slots manually in the layout editor if you want to examine a different slot.<br />
<br />
Some keys are global in the debugger, i.e. they will always have the same effect regardless of the module selected. These keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| F7 || Execute one instruction (or skip to the next interrupt when halted)<br />
|-<br />
| F8 || Step over the next instruction; the same as F7, except that CALL, RST, DJNZ and repeat instructions (e.g. LDIR) are executed until either the program counter hits the subsequent instruction or 10000000 clock cycles elapse<br />
|-<br />
| F12 || Toggle the layout editor<br />
|}<br />
<br />
===Layout editor===<br />
<br />
This feature is still under development. Most importantly, the modified layouts are not saved. The default layout is designed not to conceal anything if the window is maximised at a resolution of at least 1024x768. The keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Insert || Add a component module after the selected one; the type of the component can be picked from a list<br />
|-<br />
| Delete || Delete the subtree starting from the currently selected node<br />
|-<br />
| 0..3 || Set the slot of every node in the subtree starting from the selection to the number pressed (0 - top left, 1 - top right, 2 - bottom left, 3 - bottom right)<br />
|}<br />
<br />
===Modules===<br />
<br />
'''Disassembly'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Up/down arrows, Page Up/Down || Navigate<br />
|-<br />
| F2 || Set/remove execution breakpoint at the cursor<br />
|-<br />
| G || Go to a specific address (enter in hexadecimal; press Escape instead of Enter to cancel)<br />
|-<br />
| P, S, B, D, H, X, Y || Go to the address pointed by PC, SP, BC, DE, HL, IX, IY, respectively<br />
|-<br />
| R || Run from cursor, i.e. set PC to the address of the instruction under the cursor<br />
|}<br />
<br />
Important: when a breakpoint is set, it affects all the slots at the same time for the time being!<br />
<br />
'''Memory view'''<br />
<br />
This is currently a read-only view of the 64K CPU address space. You can use the arrows and the page up/down keys to navigate. The G, P, S, B, D, H, X and Y keys have the same effect as on the disassembly pane.<br />
<br />
'''Registers'''<br />
<br />
The internal state of the Z80. Each value can be edited after left clicking; the values must be entered in hexadecimal. Editing can be concluded with Enter or by clicking elsewhere, and cancelled with Escape. Note that halt can have three values: 0 - normal operation, 1 - halt active, 2 - violating execution protection (if you attempt running any further, the calculator will be forced to reset).<br />
<br />
'''Variables'''<br />
<br />
A simple, read-only VAT viewer. It can be navigated using the up/down arrows, Page Up/Down and the mouse wheel as well.<br />
<br />
'''LCD data'''<br />
<br />
Graphical display of the contents of LCD memory. Note that all the 120 columns are shown here, even though all calculators emulated can only display 96. However, the memory is still there. The current X and Y addresses are shown by a bluish colour on the byte that will be accessed through the data port.<br />
<br />
'''Key-value modules'''<br />
<br />
The following modules are in this category: LCD physics, LCD software, Information, Time, Interrupts, Memory, Keyboard, Link. All of these display a list of characteristics. The right hand sides can be edited where the cursor turns into a hand. Editing can either mean a single click (e.g. interrupt frequencies or keyboard state) or bring up a text box for numeric values, where Escape can be used to cancel as usual.<br />
<br />
==Scripting==<br />
<br />
It is possible to run the emulator in a non-interactive mode through a pipe (communicating through stdio), just invoke the executable with the -p switch and redirect the input and the output. Do not try to run it with the keyboard on the input or a terminal on the output, because it will hang.<br />
<br />
Each command sent must be on a separate line. All of them emit at least a line containing 'OK' as a response in case of success. Error conditions are signaled by outputs starting with 'Error:'.<br />
<br />
The commands are the following:<br />
<br />
*send-file <slot> <file> - send a file to the specified slot (the same as drag and drop); don't quote the filename, it's read from the first non-space after the slot number till the end of the line (the slot number must be between 0 and 15 or 0x0 and 0xf)<br />
<br />
*activate-slot <slot> - select the current slot<br />
<br />
*reset-calc - reset the calc in the current slot (you might need to run a few million cc's after this before pressing on)<br />
<br />
*run <cycles> - run for the specified number of cycles (it should be a number between 1 and 2000000000); when debugging is enabled and execution stops on a breakpoint, there will be a line starting with 'Info:' output before the usual 'OK'<br />
<br />
*step <n> - execute n instructions ignoring the breakpoints, n defaults to 1 when omitted; the firing of a possibly masked timer during a halt counts as one instruction<br />
<br />
*draw-screen-bw - dump LCD memory — 96*64 bytes, 0 for white and 255 for black; the raw data is preceded by a line that always contains two characters: the first is '1' if the calculator is powered, '0' otherwise, and the second is '1' if the LCD is powered, '0' if it isn't (so the image should be displayed only if this line says '11')<br />
<br />
*draw-screen-gs - dump greyscale screen (only updated 25 times per calculator second) — 96*64 bytes preceded by the same two-character line, same format but using the full range of values<br />
<br />
*key-down <key> - press key (calc key, so the argument is a token like '2nd', 'mode' etc.)<br />
<br />
*key-up <key> - release key<br />
<br />
<key> must be one of the tokens below:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| &nbsp; || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0<br />
|-<br />
| 0 || &nbsp; || &nbsp; || &nbsp; || &nbsp; || up || right || left || down<br />
|-<br />
| 1 || &nbsp; || clear || ^ || / || * || - || + || enter<br />
|-<br />
| 2 || &nbsp; || vars || tan || ) || 9 || 6 || 3 || (-)<br />
|-<br />
| 3 || stat || prgm || cos || ( || 8 || 5 || 2 || .<br />
|-<br />
| 4 || x || matrx || sin || , || 7 || 4 || 1 || 0<br />
|-<br />
| 5 || alpha || math || x^-1 || x^2 || log || ln || sto || &nbsp;<br />
|-<br />
| 6 || del || mode || 2nd || y= || window || zoom || trace || graph<br />
|}<br />
<br />
The on key is called 'on', surprisingly. You can also write 'apps' instead of 'matrx'.<br />
<br />
*dump-state <type> - obtain information about the internal state of the emulated hardware; <type> must be one of the following (without quotes): 'lcd physics', 'lcd software', 'model', 'time', 'interrupt', 'pager', 'keyboard', 'link', 'cpu', 'memory'. Except for the last two the format is the following after the initial 'OK': a line containing nothing but the number of subsequent lines, and a 'key: value' pair on each line. With 'cpu' it displays the registers with a 'reg=value' pair on each line, all in hex, while 'memory' is a dump of 65536 bytes as seen in the z80 address space with the current mapping mode<br />
<br />
*{set|remove}-breakpoint <type> <args> - add/remove a breakpoint; the arguments depend on the type given; the only type currently supported is 'code' (again, no quotes). It has only one argument: a number specifying the address. It can be base 10, 16 or 8 differentiated by the usual C prefixes. (Actually, this applies to any numeric argument in any command.) For the removal you can also specify -1 here, which removes all code breakpoints.<br />
<br />
There is currently no way to directly manipulate the state of the calculator.<br />
<br />
==External Resources==<br />
[http://www.hszk.bme.hu/~pg429/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://users.hszk.bme.hu/~pg429/pindurti/changelog.txt Changelog]<br />
<br />
[http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI Idea box]<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2006-09-02T21:03:26Z
<p>CoBB: /* Scripting */</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is the latest addition to the TI [[Emulators|emulator]] 'family', still in development by Patai Gergely. This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
When interpreting keypresses for the calculators, PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key and so on.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Alt || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
The debug window is composed of separate modules, which show the state of the calculator from a certain aspect. Note that the components are tuned to the top left slot by default, and you have to change the slots manually in the layout editor if you want to examine a different slot.<br />
<br />
Some keys are global in the debugger, i.e. they will always have the same effect regardless of the module selected. These keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| F7 || Execute one instruction (or skip to the next interrupt when halted)<br />
|-<br />
| F8 || Step over the next instruction; the same as F7, except that CALL, DJNZ and repeat instructions (e.g. LDIR) are executed until either the program counter hits the subsequent instruction or 10000000 clock cycles elapse<br />
|-<br />
| F12 || Toggle the layout editor<br />
|}<br />
<br />
===Layout editor===<br />
<br />
This feature is still under development. Most importantly, the modified layouts are not saved. The default layout is designed not to conceal anything if the window is maximised at a resolution of at least 1024x768. The keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Insert || Add a component module after the selected one; the type of the component can be picked from a list<br />
|-<br />
| Delete || Delete the subtree starting from the currently selected node<br />
|-<br />
| 0..3 || Set the slot of every node in the subtree starting from the selection to the number pressed (0 - top left, 1 - top right, 2 - bottom left, 3 - bottom right)<br />
|}<br />
<br />
===Modules===<br />
<br />
'''Disassembly'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Up/down arrows, Page Up/Down || Navigate<br />
|-<br />
| F2 || Set/remove execution breakpoint at the cursor<br />
|-<br />
| G || Go to a specific address (enter in hexadecimal; press Escape instead of Enter to cancel)<br />
|-<br />
| P, S, B, D, H, X, Y || Go to the address pointed by PC, SP, BC, DE, HL, IX, IY, respectively<br />
|-<br />
| R || Run from cursor, i.e. set PC to the address of the instruction under the cursor<br />
|}<br />
<br />
Important: when a breakpoint is set, it affects all the slots at the same time for the time being!<br />
<br />
'''Memory view'''<br />
<br />
This is currently a read-only view of the 64K CPU address space. You can use the arrows and the page up/down keys to navigate. The G, P, S, B, D, H, X and Y keys have the same effect as on the disassembly pane.<br />
<br />
'''Registers'''<br />
<br />
The internal state of the Z80. Each value can be edited after left clicking; the values must be entered in hexadecimal. Editing can be concluded with Enter or by clicking elsewhere, and cancelled with Escape. Note that halt can have three values: 0 - normal operation, 1 - halt active, 2 - violating execution protection (if you attempt running any further, the calculator will be forced to reset).<br />
<br />
'''Variables'''<br />
<br />
A simple, read-only VAT viewer. It can be navigated using the up/down arrows, Page Up/Down and the mouse wheel as well.<br />
<br />
'''LCD data'''<br />
<br />
Graphical display of the contents of LCD memory. Note that all the 120 columns are shown here, even though all calculators emulated can only display 96. However, the memory is still there. The current X and Y addresses are shown by a bluish colour on the byte that will be accessed through the data port.<br />
<br />
'''Key-value modules'''<br />
<br />
The following modules are in this category: LCD physics, LCD software, Information, Time, Interrupts, Memory, Keyboard, Link. All of these display a list of characteristics. The right hand sides can be edited where the cursor turns into a hand. Editing can either mean a single click (e.g. interrupt frequencies or keyboard state) or bring up a text box for numeric values, where Escape can be used to cancel as usual.<br />
<br />
==Scripting==<br />
<br />
It is possible to run the emulator in a non-interactive mode through a pipe (communicating through stdio), just invoke the executable with the -p switch and redirect the input and the output. Do not try to run it with the keyboard on the input or a terminal on the output, because it will hang.<br />
<br />
Each command sent must be on a separate line. All of them emit at least a line containing 'OK' as a response in case of success. Error conditions are signaled by outputs starting with 'Error:'.<br />
<br />
The commands are the following:<br />
<br />
*send-file <slot> <file> - send a file to the specified slot (the same as drag and drop); don't quote the filename, it's read from the first non-space after the slot number till the end of the line (the slot number must be between 0 and 15 or 0x0 and 0xf)<br />
<br />
*activate-slot <slot> - select the current slot<br />
<br />
*reset-calc - reset the calc in the current slot (you might need to run a few million cc's after this before pressing on)<br />
<br />
*run <cycles> - run for the specified number of cycles (it should be a number between 1 and 2000000000); when debugging is enabled and execution stops on a breakpoint, there will be a line starting with 'Info:' output before the usual 'OK'<br />
<br />
*step <n> - execute n instructions ignoring the breakpoints, n defaults to 1 when omitted; the firing of a possibly masked timer during a halt counts as one instruction<br />
<br />
*draw-screen-bw - dump LCD memory — 96*64 bytes, 0 for white and 255 for black; the raw data is preceded by a line that always contains two characters: the first is '1' if the calculator is powered, '0' otherwise, and the second is '1' if the LCD is powered, '0' if it isn't (so the image should be displayed only if this line says '11')<br />
<br />
*draw-screen-gs - dump greyscale screen (only updated 25 times per calculator second) — 96*64 bytes preceded by the same two-character line, same format but using the full range of values<br />
<br />
*key-down <key> - press key (calc key, so the argument is a token like '2nd', 'mode' etc.)<br />
<br />
*key-up <key> - release key<br />
<br />
<key> must be one of the tokens below:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| &nbsp; || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0<br />
|-<br />
| 0 || &nbsp; || &nbsp; || &nbsp; || &nbsp; || up || right || left || down<br />
|-<br />
| 1 || &nbsp; || clear || ^ || / || * || - || + || enter<br />
|-<br />
| 2 || &nbsp; || vars || tan || ) || 9 || 6 || 3 || (-)<br />
|-<br />
| 3 || stat || prgm || cos || ( || 8 || 5 || 2 || .<br />
|-<br />
| 4 || x || matrx || sin || , || 7 || 4 || 1 || 0<br />
|-<br />
| 5 || alpha || math || x^-1 || x^2 || log || ln || sto || &nbsp;<br />
|-<br />
| 6 || del || mode || 2nd || y= || window || zoom || trace || graph<br />
|}<br />
<br />
The on key is called 'on', surprisingly. You can also write 'apps' instead of 'matrx'.<br />
<br />
*dump-state <type> - obtain information about the internal state of the emulated hardware; <type> must be one of the following (without quotes): 'lcd physics', 'lcd software', 'model', 'time', 'interrupt', 'pager', 'keyboard', 'link', 'cpu', 'memory'. Except for the last two the format is the following after the initial 'OK': a line containing nothing but the number of subsequent lines, and a 'key: value' pair on each line. With 'cpu' it displays the registers with a 'reg=value' pair on each line, all in hex, while 'memory' is a dump of 65536 bytes as seen in the z80 address space with the current mapping mode<br />
<br />
*{set|remove}-breakpoint <type> <args> - add/remove a breakpoint; the arguments depend on the type given; the only type currently supported is 'code' (again, no quotes). It has only one argument: a number specifying the address. It can be base 10, 16 or 8 differentiated by the usual C prefixes. (Actually, this applies to any numeric argument in any command.) For the removal you can also specify -1 here, which removes all code breakpoints.<br />
<br />
There is currently no way to directly manipulate the state of the calculator.<br />
<br />
==External Resources==<br />
[http://www.hszk.bme.hu/~pg429/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://users.hszk.bme.hu/~pg429/pindurti/changelog.txt Changelog]<br />
<br />
[http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI Idea box]<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2006-09-02T21:01:55Z
<p>CoBB: Described debugger and scripting</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is the latest addition to the TI [[Emulators|emulator]] 'family', still in development by Patai Gergely. This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
When interpreting keypresses for the calculators, PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key and so on.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Alt || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
The debug window is composed of separate modules, which show the state of the calculator from a certain aspect. Note that the components are tuned to the top left slot by default, and you have to change the slots manually in the layout editor if you want to examine a different slot.<br />
<br />
Some keys are global in the debugger, i.e. they will always have the same effect regardless of the module selected. These keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| F7 || Execute one instruction (or skip to the next interrupt when halted)<br />
|-<br />
| F8 || Step over the next instruction; the same as F7, except that CALL, DJNZ and repeat instructions (e.g. LDIR) are executed until either the program counter hits the subsequent instruction or 10000000 clock cycles elapse<br />
|-<br />
| F12 || Toggle the layout editor<br />
|}<br />
<br />
===Layout editor===<br />
<br />
This feature is still under development. Most importantly, the modified layouts are not saved. The default layout is designed not to conceal anything if the window is maximised at a resolution of at least 1024x768. The keys are the following:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Insert || Add a component module after the selected one; the type of the component can be picked from a list<br />
|-<br />
| Delete || Delete the subtree starting from the currently selected node<br />
|-<br />
| 0..3 || Set the slot of every node in the subtree starting from the selection to the number pressed (0 - top left, 1 - top right, 2 - bottom left, 3 - bottom right)<br />
|}<br />
<br />
===Modules===<br />
<br />
'''Disassembly'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Up/down arrows, Page Up/Down || Navigate<br />
|-<br />
| F2 || Set/remove execution breakpoint at the cursor<br />
|-<br />
| G || Go to a specific address (enter in hexadecimal; press Escape instead of Enter to cancel)<br />
|-<br />
| P, S, B, D, H, X, Y || Go to the address pointed by PC, SP, BC, DE, HL, IX, IY, respectively<br />
|-<br />
| R || Run from cursor, i.e. set PC to the address of the instruction under the cursor<br />
|}<br />
<br />
Important: when a breakpoint is set, it affects all the slots at the same time for the time being!<br />
<br />
'''Memory view'''<br />
<br />
This is currently a read-only view of the 64K CPU address space. You can use the arrows and the page up/down keys to navigate. The G, P, S, B, D, H, X and Y keys have the same effect as on the disassembly pane.<br />
<br />
'''Registers'''<br />
<br />
The internal state of the Z80. Each value can be edited after left clicking; the values must be entered in hexadecimal. Editing can be concluded with Enter or by clicking elsewhere, and cancelled with Escape. Note that halt can have three values: 0 - normal operation, 1 - halt active, 2 - violating execution protection (if you attempt running any further, the calculator will be forced to reset).<br />
<br />
'''Variables'''<br />
<br />
A simple, read-only VAT viewer. It can be navigated using the up/down arrows, Page Up/Down and the mouse wheel as well.<br />
<br />
'''LCD data'''<br />
<br />
Graphical display of the contents of LCD memory. Note that all the 120 columns are shown here, even though all calculators emulated can only display 96. However, the memory is still there. The current X and Y addresses are shown by a bluish colour on the byte that will be accessed through the data port.<br />
<br />
'''Key-value modules'''<br />
<br />
The following modules are in this category: LCD physics, LCD software, Information, Time, Interrupts, Memory, Keyboard, Link. All of these display a list of characteristics. The right hand sides can be edited where the cursor turns into a hand. Editing can either mean a single click (e.g. interrupt frequencies or keyboard state) or bring up a text box for numeric values, where Escape can be used to cancel as usual.<br />
<br />
==Scripting==<br />
<br />
It is possible to run the emulator in a non-interactive mode through a pipe (communicating through stdio), just invoke the executable with the -p switch and redirect the input and the output. Do not try to run it with the keyboard on the input or a terminal on the output, because it will hang.<br />
<br />
Each command sent must be on a separate line. All of them emit at least a line containing 'OK' as a response in case of success. Error conditions are signaled by outputs starting with 'Error:'.<br />
<br />
The commands are the following:<br />
<br />
*send-file <slot> <file> - send a file to the specified slot (the same as drag and drop); don't quote the filename, it's read from the first non-space after the slot number till the end of the line (the slot number must be between 0 and 15 or 0x0 and 0xf)<br />
<br />
*activate-slot <slot> - select the current slot<br />
<br />
*reset-calc - reset the calc in the current slot (you might need to run a few million cc's after this before pressing on)<br />
<br />
*run <cycles> - run for the specified number of cycles (it should be a number between 1 and 2000000000); when debugging is enabled and execution stops on a breakpoint, there will be a line starting with 'Info:' output before the usual 'OK'<br />
<br />
*step <n> - execute n instructions ignoring the breakpoints, n defaults to 1 when omitted; the firing of a possibly masked timer during a halt counts as one instruction<br />
<br />
*draw-screen-bw - dump LCD memory -- 96*64 bytes, 0 for white and 255 for black; the raw data is preceded by a line that always contains two characters: the first is '1' if the calculator is powered, '0' otherwise, and the second is '1' if the LCD is powered, '0' if it isn't (so the image should be displayed only if this line says '11')<br />
<br />
*draw-screen-gs - dump greyscale screen (only updated 25 times per calculator second) -- 96*64 bytes, same format but using the full range of values<br />
<br />
*key-down <key> - press key (calc key, so the argument is a token like '2nd', 'mode' etc.)<br />
<br />
*key-up <key> - release key<br />
<br />
<key> must be one of the tokens below:<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| &nbsp; || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0<br />
|-<br />
| 0 || &nbsp; || &nbsp; || &nbsp; || &nbsp; || up || right || left || down<br />
|-<br />
| 1 || &nbsp; || clear || ^ || / || * || - || + || enter<br />
|-<br />
| 2 || &nbsp; || vars || tan || ) || 9 || 6 || 3 || (-)<br />
|-<br />
| 3 || stat || prgm || cos || ( || 8 || 5 || 2 || .<br />
|-<br />
| 4 || x || matrx || sin || , || 7 || 4 || 1 || 0<br />
|-<br />
| 5 || alpha || math || x^-1 || x^2 || log || ln || sto || &nbsp;<br />
|-<br />
| 6 || del || mode || 2nd || y= || window || zoom || trace || graph<br />
|}<br />
<br />
The on key is called 'on', surprisingly. You can also write 'apps' instead of 'matrx'.<br />
<br />
*dump-state <type> - obtain information about the internal state of the emulated hardware; <type> must be one of the following (without quotes): 'lcd physics', 'lcd software', 'model', 'time', 'interrupt', 'pager', 'keyboard', 'link', 'cpu', 'memory'. Except for the last two the format is the following after the initial 'OK': a line containing nothing but the number of subsequent lines, and a 'key: value' pair on each line. With 'cpu' it displays the registers with a 'reg=value' pair on each line, all in hex, while 'memory' is a dump of 65536 bytes as seen in the z80 address space with the current mapping mode<br />
<br />
*{set|remove}-breakpoint <type> <args> - add/remove a breakpoint; the arguments depend on the type given; the only type currently supported is 'code' (again, no quotes). It has only one argument: a number specifying the address. It can be base 10, 16 or 8 differentiated by the usual C prefixes. (Actually, this applies to any numeric argument in any command.) For the removal you can also specify -1 here, which removes all code breakpoints.<br />
<br />
There is currently no way to directly manipulate the state of the calculator.<br />
<br />
==External Resources==<br />
[http://www.hszk.bme.hu/~pg429/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://users.hszk.bme.hu/~pg429/pindurti/changelog.txt Changelog]<br />
<br />
[http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI Idea box]<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Emulators:PindurTI
Emulators:PindurTI
2006-09-02T10:04:10Z
<p>CoBB: Major rewrite</p>
<hr />
<div>PindurTI (commonly referred to as PTI) is the latest addition to the TI [[emulator]] 'family', still in development by Patai Gergely. This page contains the up-to-date documentation.<br />
<br />
==Features==<br />
*Full support for 82 and 83. 83+ support isn't complete yet, but it's already the most accurate of all emulators.<br />
*Raw virtual linking of any number of calculators.<br />
*Built-in (animated) screenshotting ability.<br />
*Debugger.<br />
*Scripting for external tools (preliminary in the latest version), which is already used by [[LateNite]]<br />
<br />
If you have ideas you want to incorporate in the tool, you can submit your ideas at the [http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI idea box]. Repetitions and trivialities are frowned upon.<br />
<br />
==Basics==<br />
PindurTI requires no installation; it is a standalone executable you can put anywhere. It will only create a file called pti.conf in its working directory (which is by default the same as the one the executable is located in), so make sure this directory is not read-only for pindurti.exe.<br />
<br />
At the moment of writing PindurTI has no real graphical user interface (GUI) yet, only the absolute minimum required to use all the features. Here are the steps to get going:<br />
<br />
1. Start pindurti.exe. You will see any empty, fully cyan window. The four quarters of the window represent four slots where individual calculators can be run.<br />
<br />
2. Drag-and-drop a ROM image to one of the quarters, preferably the top left. The quarter chosen will turn grey for the most part, and four icons will appear above the grey area.<br />
<br />
3. Left click the grey part. This is the screen of the calculator, and the left click corresponds to the On key.<br />
<br />
4. You can drag and drop other ROM images to the other slots. You can switch between the slots by right clicking them. (Left clicking also activates the slot, but it also causes the On key to be pressed.)<br />
<br />
5. Files can be sent by dropping them to the appropriate slot. PTI uses silent linking, so the calculator must be on, somewhere in the TI-OS and ''not in receive mode'' in order for the transmission to succeed. You can also drop a group of files, they will be sent one after the other. Naturally, the file and the running ROM image must be for the same model, e.g. sending an 8xp file to a TI-82 won't work.<br />
<br />
'''Pressing calculator keys'''<br />
<br />
PTI always acts as if the layout was English, so if you use an alternative layout (e.g. AZERTY or Cyrillic), 'Q' still refers to the button next to the Tab key etc.<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! PC key !! Calculator key<br />
|-<br />
| left mouse button || On<br />
|-<br />
| A..Z || the button that yields the corresponding letter if alpha is on, see below<br />
|-<br />
| Space || 0<br />
|-<br />
| arrows, 0..9, Enter, '.', ',', numpad +-/* || the corresponding calculator key<br />
|-<br />
| [ || (<br />
|-<br />
| ] || )<br />
|-<br />
| F1 || Y=<br />
|-<br />
| F2 || Window<br />
|-<br />
| F3 || Zoom<br />
|-<br />
| F4 || Trace<br />
|-<br />
| F5 || Graph<br />
|-<br />
| Escape || Mode<br />
|-<br />
| Left Shift || 2nd<br />
|-<br />
| Left Control || Alpha<br />
|-<br />
| Right Shift || Clear<br />
|-<br />
| - || (-) (between the decimal point and Enter)<br />
|-<br />
| = || X,T,&theta;,''n''<br />
|-<br />
| Page Up || Matrx (82/83) or Apps (83+)<br />
|-<br />
| Page Down || Prgm<br />
|-<br />
| Insert || Vars<br />
|-<br />
| Delete || Del<br />
|-<br />
| Home || Math<br />
|-<br />
| End || Stat<br />
|}<br />
<br />
'''Mapping of letter keys'''<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
| '''A''' || Math || '''B''' || Matrx || '''C''' || Prgm || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|-<br />
| '''D''' || x<sup>-1</sup> || '''E''' || Sin || '''F''' || Cos || '''G''' || Tan || '''H''' || ^<br />
|-<br />
| '''I''' || x<sup>2</sup> || '''J''' || , || '''K''' || ( || '''L''' || ) || '''M''' || ÷<br />
|-<br />
| '''N''' || Log || '''O''' || 7 || '''P''' || 8 || '''Q''' || 9 || '''R''' || ×<br />
|-<br />
| '''S''' || Ln || '''T''' || 4 || '''U''' || 5 || '''V''' || 6 || '''W''' || -<br />
|-<br />
| '''X''' || Sto→ || '''Y''' || 1 || '''Z''' || 2 || &nbsp; || &nbsp; || &nbsp; || &nbsp;<br />
|}<br />
<br />
==Other keys==<br />
<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Key !! Effect<br />
|-<br />
| Tab || Start crude (9 fps) screenshot/Stop current screenshot<br />
|-<br />
| Alt || Start fine (25 fps) screenshot/Stop current screenshot<br />
|-<br />
| F9 || Reset calculator in active slot (simulates pulling batteries)<br />
|-<br />
| F10 || Open debugger<br />
|-<br />
| F11 || Enable/disable warp mode (fastest possible emulation) of active slot<br />
|}<br />
<br />
Note that only crude screenshots are displayed properly everywhere. Fine screenshots are only shown at full speed by Firefox.<br />
<br />
==Additional functions==<br />
<br />
The icons above each calculator screen can be used for the following purposes by left clicking, from left to right:<br />
<br />
1. Pause/unpause<br />
<br />
2. Enable/disable warp mode<br />
<br />
3. Plug into a link hub; plug in two calculators to open a communication line between them. Connecting more than two calculators is not supported by the TI-OS. However, the CLAP linking library allows mass linking.<br />
<br />
4. Toggle inclusion in screenshotting. If no slot is selected, always the active one will be captured. This feature can be used to allow capturing a slot even if we activate another in the meantime (e.g. to save an animated cutscene while using another calculator) or to record multiplayer games.<br />
<br />
==Debugger==<br />
<br />
TODO<br />
<br />
==Scripting==<br />
<br />
TODO<br />
<br />
==External Resources==<br />
[http://www.hszk.bme.hu/~pg429/pindurti/pindurti.exe Latest build of PindurTI]<br />
<br />
[http://users.hszk.bme.hu/~pg429/pindurti/changelog.txt Changelog]<br />
<br />
[http://www.hszk.bme.hu/~pg429/pindurti/features/ PindurTI Idea box]<br />
[[Category:Emulators]]</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Talk:83Plus:OS:TIOS_Alternatives
Talk:83Plus:OS:TIOS Alternatives
2006-03-27T21:11:01Z
<p>CoBB: /* Vera = exokernel? */ should learn some English :s</p>
<hr />
<div>== Nostalgy ==<br />
Well, I was on the team for that, and as far as I knew it died. I've not touched my parts of the code for about two years now. I'd be willing to take it back up if it's going to go anywhere, but... I just haven't touched it in so long I'd probably want to start over, especially since I've learned some things since I started working on it. [[User:AndyJ|Andy Janata]] 10:31, 27 March 2006 (PST)<br />
<br />
== Vera = exokernel? ==<br />
<br />
In regards to Vera: ''this architecture is very similar to that of an exokernel operating system''. Having briefly read up on Vera, it doesn't seem to me to be an exokernel. Even in its current form the operating system seems to do more than securely export hardware resources. However, I'm not intimately familiar with the project, so I'm leaving some time for someone to correct me before I change the text. --[[User:Dan Englender|Dan Englender]] 12:25, 27 March 2006 (PST)<br />
:Vera seems to have died in her cradle... Anyway, the idea is to provide a filesystem (possibly integrated with memory management), a plugin system that would enable user code to extend the assembly interface, user program execution (naturally) and maybe a common link protocol and a customisable ISR at $0038. Everything above that, including the UI and maths capabilities is not an integral part of the system. [[User:CoBB|CoBB]] 13:09, 27 March 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Talk:83Plus:OS:TIOS_Alternatives
Talk:83Plus:OS:TIOS Alternatives
2006-03-27T21:09:14Z
<p>CoBB: </p>
<hr />
<div>== Nostalgy ==<br />
Well, I was on the team for that, and as far as I knew it died. I've not touched my parts of the code for about two years now. I'd be willing to take it back up if it's going to go anywhere, but... I just haven't touched it in so long I'd probably want to start over, especially since I've learned some things since I started working on it. [[User:AndyJ|Andy Janata]] 10:31, 27 March 2006 (PST)<br />
<br />
== Vera = exokernel? ==<br />
<br />
In regards to Vera: ''this architecture is very similar to that of an exokernel operating system''. Having briefly read up on Vera, it doesn't seem to me to be an exokernel. Even in its current form the operating system seems to do more than securely export hardware resources. However, I'm not intimately familiar with the project, so I'm leaving some time for someone to correct me before I change the text. --[[User:Dan Englender|Dan Englender]] 12:25, 27 March 2006 (PST)<br />
:Vera seems to have died in her cradle... Anyway, the idea is to provide a filesystem (possibly integrated with memory management), a plugin system that would be enable user code to extend the assembly interface, user program execution (naturally) and maybe a common link protocol and a customisable ISR at $0038. Everything above that, including the UI and maths capabilities is not an integral part of the system. [[User:CoBB|CoBB]] 13:09, 27 March 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User_talk:CoBB
User talk:CoBB
2006-03-16T10:00:34Z
<p>CoBB: </p>
<hr />
<div>Very nice job. Let us know when it's "done" then we can move it into the main namespace. :) [[User:AndyJ|Andy Janata]] 04:28, 1 Mar 2006 (PST)<br />
:It is finished now, although someone else should proofread it for safety. It is formatted not to break lines at 1024x768. [[User:CoBB|CoBB]] 00:54, 7 Mar 2006 (PST)<br />
::The only (minor) complaint I see is that in, for example, "ld Q,A 00qq0001 alalalal ahahahah", the a1a1a1a1 looks like A one, A one, A one, A one, which confused me until I noticed that the number one and the letter L are nearly identical in the default fixed width font (for my browser anyway). In general though, I'd say it's in good shape to transfer over to the instruction set page. --[[User:Dan Englender|Dan Englender]] 22:41, 15 March 2006 (PST)<br />
:::Indeed, they look identical, but I guess it's quite obvious if you realise that A is a 16-bit constant. Okay then, I'm handing it over, do as you wish. [[User:CoBB|CoBB]] 02:00, 16 March 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Talk:83Plus:Ports:2E
Talk:83Plus:Ports:2E
2006-03-07T15:29:24Z
<p>CoBB: a pat on the shoulder</p>
<hr />
<div>Okay I did more research into port 2e, it does not affect the CPU clock speed at all. It still runs at either 6mhz or 15mhz. The effects of this port makes it appear that the clock has slowed down, rather reads and writes to the memory have slowed. Please bare with me, it's rather difficult to explain.<br />
<br />
On whim I decided to test the accuracy of opcodes tstates. I set up the SE timers to run on the CPU clock. Between setting the clock and reading the clock I would be able to calculate the tstates of any given opcode. Here is the code.<br />
<br />
xor a ;clear<br />
out ($30),a<br />
out ($31),a<br />
ld a,$80 ;cpu clock<br />
out ($30),a<br />
xor a ;no looping, no interrupt<br />
out ($31),a<br />
ld a,100 ;countdown from 100.<br />
out ($32),a<br />
;---OP CODES HERE!!!---<br />
in a,($32) ;read ticks since write<br />
ld l,a<br />
ld a,90<br />
sub l ;from writing to reading is 10 clocks<br />
ld l,a ;I adjust so the output gives me only the tstates of the opcodes<br />
ld h,0<br />
bcall(_disphl)<br />
<br />
The code above simply display the number of tstates in the given space. 'Nothing' renders an answer of 0, NOP renders 4, ld a,($8000) renders 13, jp c,$ when NO CARRY renders 10. I've tested enough to assume that this working correctly.<br />
<br />
I will state my findings based on my inputs.<br />
<br />
<br />
For the 83+SE the default value of port 2E is 44. The default value of port 29 is 14. Port 2E and the LCD delay ports are linked. I used only a range of a few opcodes on each test. They were:<br />
<br />
ld (ix+0),0 ;ix=ramaddress<br />
ld (ramaddress),a<br />
ld a,(ramaddress)<br />
ldi ;hl=ramaddress, de=ramaddress, bc=1<br />
out (1),a ;a=100<br />
"NULL" ;NO OPCODE!!<br />
<br />
<br />
Here is a table of the tested opcodes, and some of the trials. I excluded most due to the fact they did not show relevant info. The values under ports 29 and 2e are the contents of the ports at given trial. the values under the opcodes are the return TStates. NOTE: Although no opcode should always return a value of 0, the difference is probably because of writing to port 32 prior and reading port 32 after. So take that into consideration when you look at the other tstates in the given trial.<br />
<br />
{| WIDTH=590 BORDER=1 CELLPADDING=2 CELLSPACING=2 STYLE="page-break-before: always"<br />
|-<br />
| WIDTH=55 HEIGHT=27 | <P ALIGN=CENTER>Port 29</P><br />
| WIDTH=55 | <P ALIGN=CENTER>Port 2E</P><br />
| WIDTH=75 | <P ALIGN=CENTER>ld (ix+0),0</P><br />
| WIDTH=75 | <P ALIGN=CENTER>ld (*),a</P><br />
| WIDTH=75 | <P ALIGN=CENTER>ld a,(*)</P><br />
| WIDTH=75 | <P ALIGN=CENTER>ldi</P><br />
| WIDTH=75 | <P ALIGN=CENTER>out (1),a</P><br />
| WIDTH=105 | <P ALIGN=CENTER>NO OPCODE</P><br />
|-<br />
| WIDTH=55 HEIGHT=31 | <P ALIGN=CENTER>14</P><br />
| WIDTH=55 | <P ALIGN=CENTER>44</P><br />
| WIDTH=75 | <P ALIGN=CENTER>19</P><br />
| WIDTH=75 | <P ALIGN=CENTER>13</P><br />
| WIDTH=75 | <P ALIGN=CENTER>13</P><br />
| WIDTH=75 | <P ALIGN=CENTER>16</P><br />
| WIDTH=75 | <P ALIGN=CENTER>11</P><br />
| WIDTH=105 | <P ALIGN=CENTER>0</P><br />
|-<br />
| WIDTH=55 HEIGHT=31 | <P ALIGN=CENTER>14</P><br />
| WIDTH=55 | <P ALIGN=CENTER>CF</P><br />
| WIDTH=75 | <P ALIGN=CENTER>19</P><br />
| WIDTH=75 | <P ALIGN=CENTER>13</P><br />
| WIDTH=75 | <P ALIGN=CENTER>13</P><br />
| WIDTH=75 | <P ALIGN=CENTER>16</P><br />
| WIDTH=75 | <P ALIGN=CENTER>11</P><br />
| WIDTH=105 | <P ALIGN=CENTER>0</P><br />
|-<br />
| WIDTH=55 HEIGHT=31 | <P ALIGN=CENTER>16</P><br />
| WIDTH=55 | <P ALIGN=CENTER>44</P><br />
| WIDTH=75 | <P ALIGN=CENTER>20</P><br />
| WIDTH=75 | <P ALIGN=CENTER>14</P><br />
| WIDTH=75 | <P ALIGN=CENTER>13</P><br />
| WIDTH=75 | <P ALIGN=CENTER>17</P><br />
| WIDTH=75 | <P ALIGN=CENTER>11</P><br />
| WIDTH=105 | <P ALIGN=CENTER>0</P><br />
|-<br />
| WIDTH=55 HEIGHT=31 | <P ALIGN=CENTER>16</P><br />
| WIDTH=55 | <P ALIGN=CENTER>54</P><br />
| WIDTH=75 | <P ALIGN=CENTER>23</P><br />
| WIDTH=75 | <P ALIGN=CENTER>16</P><br />
| WIDTH=75 | <P ALIGN=CENTER>15</P><br />
| WIDTH=75 | <P ALIGN=CENTER>20</P><br />
| WIDTH=75 | <P ALIGN=CENTER>13</P><br />
| WIDTH=105 | <P ALIGN=CENTER>1</P><br />
|-<br />
| WIDTH=55 HEIGHT=31 | <P ALIGN=CENTER>16</P><br />
| WIDTH=55 | <P ALIGN=CENTER>64</P><br />
| WIDTH=75 | <P ALIGN=CENTER>23</P><br />
| WIDTH=75 | <P ALIGN=CENTER>17</P><br />
| WIDTH=75 | <P ALIGN=CENTER>17</P><br />
| WIDTH=75 | <P ALIGN=CENTER>19</P><br />
| WIDTH=75 | <P ALIGN=CENTER>13</P><br />
| WIDTH=105 | <P ALIGN=CENTER>1</P><br />
|-<br />
| WIDTH=55 HEIGHT=31 | <P ALIGN=CENTER>16</P><br />
| WIDTH=55 | <P ALIGN=CENTER>75</P><br />
| WIDTH=75 | <P ALIGN=CENTER>26</P><br />
| WIDTH=75 | <P ALIGN=CENTER>19</P><br />
| WIDTH=75 | <P ALIGN=CENTER>19</P><br />
| WIDTH=75 | <P ALIGN=CENTER>22</P><br />
| WIDTH=75 | <P ALIGN=CENTER>15</P><br />
| WIDTH=105 | <P ALIGN=CENTER>2</P><br />
|-<br />
| WIDTH=55 HEIGHT=30 | <P ALIGN=CENTER>17</P><br />
| WIDTH=55 | <P ALIGN=CENTER>FF</P><br />
| WIDTH=75 | <P ALIGN=CENTER>26</P><br />
| WIDTH=75 | <P ALIGN=CENTER>19</P><br />
| WIDTH=75 | <P ALIGN=CENTER>19</P><br />
| WIDTH=75 | <P ALIGN=CENTER>22</P><br />
| WIDTH=75 | <P ALIGN=CENTER>15</P><br />
| WIDTH=105 | <P ALIGN=CENTER>2</P><br />
|}<br />
<br />
<br />
When bit 1 of port 29 is set and 2e is default, all writes to the ram take 1 extra tstate per byte.<br />
<br />
When bit 1 of port 29 is set and 2e contains 74, all reads and writes to the ram take 1 extras tstate per bytes.<br />
<br />
The other information on seems rather confusing...<br />
<br />
Also my test only occurred on an 83+SE, at 6mhz, and all other ports at default. I made no tests for the 84+SE yet. Also I'd like to note that i believe timers based on the cpu clock are correct, I timed these instructions be hand to verify that. Finally all code occurred in the ram, as did reads and writes.<br />
<br />
So I post this on the discussion page due to the fact I lack a certain bit of knowledge on how memory is access on this system. What exactly goes on between the micro controller and the cpu? (though the SE cpu is in the micro controller) Is there a memory clock or is it based on the cpu clocks? I really don't the info to explain the effects when port 2e contains 54 or 64. I'd hope some one else can shed some more light on the subject.<br />
<br />
....sigh... I have a feeling that I am the only one in the world that would actually care about this.--[[User:Jim e|Jim e]] 05:02, 7 Mar 2006 (PST)<br />
:Just remember that someone has to implement all this, and that someone wouldn't want to backtrack after realising that the implementation is based on a fundamentally wrong model. ;) [[User:CoBB|CoBB]] 07:29, 7 Mar 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User_talk:CoBB
User talk:CoBB
2006-03-07T08:54:54Z
<p>CoBB: </p>
<hr />
<div>Very nice job. Let us know when it's "done" then we can move it into the main namespace. :) [[User:AndyJ|Andy Janata]] 04:28, 1 Mar 2006 (PST)<br />
:It is finished now, although someone else should proofread it for safety. It is formatted not to break lines at 1024x768. [[User:CoBB|CoBB]] 00:54, 7 Mar 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User_talk:CoBB
User talk:CoBB
2006-03-07T08:53:03Z
<p>CoBB: </p>
<hr />
<div>Very nice job. Let us know when it's "done" then we can move it into the main namespace. :) [[User:AndyJ|Andy Janata]] 04:28, 1 Mar 2006 (PST)<br />
:It is finished now, although someone else should proofread it for safety. [[User:CoBB|CoBB]] 00:53, 7 Mar 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-07T08:50:20Z
<p>CoBB: /* Miscellaneous */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B]<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B],<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B],<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R, xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J, xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N, xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl), xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D), xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || tmp := ((c))<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7, a := [a << 1] + ocf<br />
|-<br />
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7, R := [R << 1] + ocf<br />
|-<br />
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf<br />
|-<br />
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + ocf<br />
|-<br />
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + ocf<br />
|-<br />
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf<br />
|-<br />
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf<br />
|-<br />
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf<br />
|-<br />
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + cf<br />
|-<br />
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + cf<br />
|-<br />
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,<br>a := [a AND 0xf0] + [tmp >> 8] => flags<br />
|-<br />
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]<br />
|-<br />
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0, R := [R >> 1] + [ocf << 7]<br />
|-<br />
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0,<br>(hl) := [(hl) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7]<br />
|-<br />
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7]<br />
|-<br />
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl),<br>(hl) := [tmp >> 4] + [[a AND 0x0f] << 4],<br>a := [a AND 0xf0] + [tmp AND 0x0f] => flags<br />
|-<br />
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S<br />
|-<br />
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf<br />
|-<br />
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf<br />
|-<br />
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf<br />
|-<br />
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf<br />
|-<br />
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf<br />
|-<br />
| sbc hl,Q || <tt>11101101 01qq0010</tt> || 15 || + || + || + || + || + || V || 1 || + || hl -= Q + cf<br />
|-<br />
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else<br />
|-<br />
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]<br />
|-<br />
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]<br />
|-<br />
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]<br />
|-<br />
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]<br />
|-<br />
| sla R || <tt>11001011 00100rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := R << 1<br />
|-<br />
| sla (hl) || <tt>11001011 00100110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := (hl) << 1<br />
|-<br />
| sla (I+D) || <tt>11i11101 11001011 dddddddd 00100110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := (I+D) << 1<br />
|-<br />
| sla (I+D)->R || <tt>11i11101 11001011 dddddddd 00100rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := (I+D) << 1<br />
|-<br />
| sra R || <tt>11001011 00101rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1, R.7 := R.6<br />
|-<br />
| sra (hl) || <tt>11001011 00101110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6<br />
|-<br />
| sra (I+D) || <tt>11i11101 11001011 dddddddd 00101110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := (I+D) >> 1, (I+D).7 := (I+D).6<br />
|-<br />
| sra (I+D)->R || <tt>11i11101 11001011 dddddddd 00101rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>tmp := (I+D) >> 1, tmp.7 := tmp.6<br>(I+D) := R := tmp<br />
|-<br />
| sll R || <tt>11001011 00110rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + 1<br />
|-<br />
| sll (hl) || <tt>11001011 00110110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + 1<br />
|-<br />
| sll (I+D) || <tt>11i11101 11001011 dddddddd 00110110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + 1<br />
|-<br />
| sll (I+D)->R || <tt>11i11101 11001011 dddddddd 00110rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + 1<br />
|-<br />
| srl R || <tt>11001011 00111rrr</tt> || 8 || 0 || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1<br />
|-<br />
| srl (hl) || <tt>11001011 00111110</tt> || 15 || 0 || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1<br />
|-<br />
| srl (I+D) || <tt>11i11101 11001011 dddddddd 00111110</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1<br />
|-<br />
| srl (I+D)->R || <tt>11i11101 11001011 dddddddd 00111rrr</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := (I+D) >> 1<br />
|-<br />
| sub R || <tt>10010rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R<br />
|-<br />
| sub J || <tt>11i11101 1001010b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J<br />
|-<br />
| sub N || <tt>11010110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N<br />
|-<br />
| sub (hl) || <tt>10010110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl)<br />
|-<br />
| sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)<br />
|-<br />
| xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R<br />
|-<br />
| xor J || <tt>11i11101 1010110b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR J<br />
|-<br />
| xor N || <tt>11101110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR N<br />
|-<br />
| xor (hl) || <tt>10101110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (hl)<br />
|-<br />
| xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|-<br />
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags', otherwise by the only non-single-bit operation):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)<br />
* memptr = an internal 16-bit register connected to 16-bit operations<br />
* tmp, tmp2 = temporary storage whose value is thrown away after each instruction</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-07T08:49:01Z
<p>CoBB: /* Flags */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B]<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B],<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B],<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R, xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J, xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N, xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl), xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D), xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || tmp := ((c))<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7, a := [a << 1] + ocf<br />
|-<br />
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7, R := [R << 1] + ocf<br />
|-<br />
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf<br />
|-<br />
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + ocf<br />
|-<br />
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + ocf<br />
|-<br />
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf<br />
|-<br />
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf<br />
|-<br />
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf<br />
|-<br />
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + cf<br />
|-<br />
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + cf<br />
|-<br />
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,<br>a := [a AND 0xf0] + [tmp >> 8] => flags<br />
|-<br />
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]<br />
|-<br />
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0, R := [R >> 1] + [ocf << 7]<br />
|-<br />
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0,<br>(hl) := [(hl) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7]<br />
|-<br />
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7]<br />
|-<br />
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl),<br>(hl) := [tmp >> 4] + [[a AND 0x0f] << 4],<br>a := [a AND 0xf0] + [tmp AND 0x0f] => flags<br />
|-<br />
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S<br />
|-<br />
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf<br />
|-<br />
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf<br />
|-<br />
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf<br />
|-<br />
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf<br />
|-<br />
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf<br />
|-<br />
| sbc hl,Q || <tt>11101101 01qq0010</tt> || 15 || + || + || + || + || + || V || 1 || + || hl -= Q + cf<br />
|-<br />
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else<br />
|-<br />
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]<br />
|-<br />
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]<br />
|-<br />
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]<br />
|-<br />
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]<br />
|-<br />
| sla R || <tt>11001011 00100rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := R << 1<br />
|-<br />
| sla (hl) || <tt>11001011 00100110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := (hl) << 1<br />
|-<br />
| sla (I+D) || <tt>11i11101 11001011 dddddddd 00100110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := (I+D) << 1<br />
|-<br />
| sla (I+D)->R || <tt>11i11101 11001011 dddddddd 00100rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := (I+D) << 1<br />
|-<br />
| sra R || <tt>11001011 00101rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1, R.7 := R.6<br />
|-<br />
| sra (hl) || <tt>11001011 00101110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6<br />
|-<br />
| sra (I+D) || <tt>11i11101 11001011 dddddddd 00101110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := (I+D) >> 1, (I+D).7 := (I+D).6<br />
|-<br />
| sra (I+D)->R || <tt>11i11101 11001011 dddddddd 00101rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>tmp := (I+D) >> 1, tmp.7 := tmp.6<br>(I+D) := R := tmp<br />
|-<br />
| sll R || <tt>11001011 00110rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + 1<br />
|-<br />
| sll (hl) || <tt>11001011 00110110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + 1<br />
|-<br />
| sll (I+D) || <tt>11i11101 11001011 dddddddd 00110110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + 1<br />
|-<br />
| sll (I+D)->R || <tt>11i11101 11001011 dddddddd 00110rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + 1<br />
|-<br />
| srl R || <tt>11001011 00111rrr</tt> || 8 || 0 || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1<br />
|-<br />
| srl (hl) || <tt>11001011 00111110</tt> || 15 || 0 || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1<br />
|-<br />
| srl (I+D) || <tt>11i11101 11001011 dddddddd 00111110</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1<br />
|-<br />
| srl (I+D)->R || <tt>11i11101 11001011 dddddddd 00111rrr</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := (I+D) >> 1<br />
|-<br />
| sub R || <tt>10010rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R<br />
|-<br />
| sub J || <tt>11i11101 1001010b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J<br />
|-<br />
| sub N || <tt>11010110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N<br />
|-<br />
| sub (hl) || <tt>10010110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl)<br />
|-<br />
| sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)<br />
|-<br />
| xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R<br />
|-<br />
| xor J || <tt>11i11101 1010110b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR J<br />
|-<br />
| xor N || <tt>11101110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR N<br />
|-<br />
| xor (hl) || <tt>10101110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (hl)<br />
|-<br />
| xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|-<br />
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags', otherwise by the only non-single-bit operation):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)<br />
* memptr = an internal 16-bit register connected to 16-bit operations</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-07T08:48:00Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B]<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B],<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B],<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R, xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J, xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N, xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl), xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D), xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || tmp := ((c))<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7, a := [a << 1] + ocf<br />
|-<br />
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7, R := [R << 1] + ocf<br />
|-<br />
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf<br />
|-<br />
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + ocf<br />
|-<br />
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + ocf<br />
|-<br />
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf<br />
|-<br />
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf<br />
|-<br />
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf<br />
|-<br />
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + cf<br />
|-<br />
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + cf<br />
|-<br />
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,<br>a := [a AND 0xf0] + [tmp >> 8] => flags<br />
|-<br />
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]<br />
|-<br />
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0, R := [R >> 1] + [ocf << 7]<br />
|-<br />
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0,<br>(hl) := [(hl) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7]<br />
|-<br />
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7]<br />
|-<br />
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl),<br>(hl) := [tmp >> 4] + [[a AND 0x0f] << 4],<br>a := [a AND 0xf0] + [tmp AND 0x0f] => flags<br />
|-<br />
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S<br />
|-<br />
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf<br />
|-<br />
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf<br />
|-<br />
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf<br />
|-<br />
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf<br />
|-<br />
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf<br />
|-<br />
| sbc hl,Q || <tt>11101101 01qq0010</tt> || 15 || + || + || + || + || + || V || 1 || + || hl -= Q + cf<br />
|-<br />
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else<br />
|-<br />
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]<br />
|-<br />
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]<br />
|-<br />
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]<br />
|-<br />
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]<br />
|-<br />
| sla R || <tt>11001011 00100rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := R << 1<br />
|-<br />
| sla (hl) || <tt>11001011 00100110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := (hl) << 1<br />
|-<br />
| sla (I+D) || <tt>11i11101 11001011 dddddddd 00100110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := (I+D) << 1<br />
|-<br />
| sla (I+D)->R || <tt>11i11101 11001011 dddddddd 00100rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := (I+D) << 1<br />
|-<br />
| sra R || <tt>11001011 00101rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1, R.7 := R.6<br />
|-<br />
| sra (hl) || <tt>11001011 00101110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6<br />
|-<br />
| sra (I+D) || <tt>11i11101 11001011 dddddddd 00101110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := (I+D) >> 1, (I+D).7 := (I+D).6<br />
|-<br />
| sra (I+D)->R || <tt>11i11101 11001011 dddddddd 00101rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>tmp := (I+D) >> 1, tmp.7 := tmp.6<br>(I+D) := R := tmp<br />
|-<br />
| sll R || <tt>11001011 00110rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + 1<br />
|-<br />
| sll (hl) || <tt>11001011 00110110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + 1<br />
|-<br />
| sll (I+D) || <tt>11i11101 11001011 dddddddd 00110110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + 1<br />
|-<br />
| sll (I+D)->R || <tt>11i11101 11001011 dddddddd 00110rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + 1<br />
|-<br />
| srl R || <tt>11001011 00111rrr</tt> || 8 || 0 || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1<br />
|-<br />
| srl (hl) || <tt>11001011 00111110</tt> || 15 || 0 || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1<br />
|-<br />
| srl (I+D) || <tt>11i11101 11001011 dddddddd 00111110</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1<br />
|-<br />
| srl (I+D)->R || <tt>11i11101 11001011 dddddddd 00111rrr</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := (I+D) >> 1<br />
|-<br />
| sub R || <tt>10010rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R<br />
|-<br />
| sub J || <tt>11i11101 1001010b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J<br />
|-<br />
| sub N || <tt>11010110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N<br />
|-<br />
| sub (hl) || <tt>10010110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl)<br />
|-<br />
| sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)<br />
|-<br />
| xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R<br />
|-<br />
| xor J || <tt>11i11101 1010110b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR J<br />
|-<br />
| xor N || <tt>11101110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR N<br />
|-<br />
| xor (hl) || <tt>10101110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (hl)<br />
|-<br />
| xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|-<br />
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)<br />
* memptr = an internal 16-bit register connected to 16-bit operations</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-07T08:47:12Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B]<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B],<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B],<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags, xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J, xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N, xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl), xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D),<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || tmp := ((c))<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7, a := [a << 1] + ocf<br />
|-<br />
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7, R := [R << 1] + ocf<br />
|-<br />
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf<br />
|-<br />
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + ocf<br />
|-<br />
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + ocf<br />
|-<br />
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf<br />
|-<br />
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf<br />
|-<br />
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf<br />
|-<br />
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + cf<br />
|-<br />
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + cf<br />
|-<br />
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,<br>a := [a AND 0xf0] + [tmp >> 8] => flags<br />
|-<br />
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]<br />
|-<br />
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0, R := [R >> 1] + [ocf << 7]<br />
|-<br />
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0,<br>(hl) := [(hl) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7]<br />
|-<br />
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7]<br />
|-<br />
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl),<br>(hl) := [tmp >> 4] + [[a AND 0x0f] << 4],<br>a := [a AND 0xf0] + [tmp AND 0x0f] => flags<br />
|-<br />
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S<br />
|-<br />
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf<br />
|-<br />
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf<br />
|-<br />
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf<br />
|-<br />
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf<br />
|-<br />
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf<br />
|-<br />
| sbc hl,Q || <tt>11101101 01qq0010</tt> || 15 || + || + || + || + || + || V || 1 || + || hl -= Q + cf<br />
|-<br />
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else<br />
|-<br />
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]<br />
|-<br />
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]<br />
|-<br />
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]<br />
|-<br />
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]<br />
|-<br />
| sla R || <tt>11001011 00100rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := R << 1<br />
|-<br />
| sla (hl) || <tt>11001011 00100110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := (hl) << 1<br />
|-<br />
| sla (I+D) || <tt>11i11101 11001011 dddddddd 00100110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := (I+D) << 1<br />
|-<br />
| sla (I+D)->R || <tt>11i11101 11001011 dddddddd 00100rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := (I+D) << 1<br />
|-<br />
| sra R || <tt>11001011 00101rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1, R.7 := R.6<br />
|-<br />
| sra (hl) || <tt>11001011 00101110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6<br />
|-<br />
| sra (I+D) || <tt>11i11101 11001011 dddddddd 00101110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := (I+D) >> 1, (I+D).7 := (I+D).6<br />
|-<br />
| sra (I+D)->R || <tt>11i11101 11001011 dddddddd 00101rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>tmp := (I+D) >> 1, tmp.7 := tmp.6<br>(I+D) := R := tmp<br />
|-<br />
| sll R || <tt>11001011 00110rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + 1<br />
|-<br />
| sll (hl) || <tt>11001011 00110110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + 1<br />
|-<br />
| sll (I+D) || <tt>11i11101 11001011 dddddddd 00110110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + 1<br />
|-<br />
| sll (I+D)->R || <tt>11i11101 11001011 dddddddd 00110rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + 1<br />
|-<br />
| srl R || <tt>11001011 00111rrr</tt> || 8 || 0 || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1<br />
|-<br />
| srl (hl) || <tt>11001011 00111110</tt> || 15 || 0 || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1<br />
|-<br />
| srl (I+D) || <tt>11i11101 11001011 dddddddd 00111110</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1<br />
|-<br />
| srl (I+D)->R || <tt>11i11101 11001011 dddddddd 00111rrr</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := (I+D) >> 1<br />
|-<br />
| sub R || <tt>10010rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R<br />
|-<br />
| sub J || <tt>11i11101 1001010b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J<br />
|-<br />
| sub N || <tt>11010110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N<br />
|-<br />
| sub (hl) || <tt>10010110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl)<br />
|-<br />
| sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)<br />
|-<br />
| xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R<br />
|-<br />
| xor J || <tt>11i11101 1010110b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR J<br />
|-<br />
| xor N || <tt>11101110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR N<br />
|-<br />
| xor (hl) || <tt>10101110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (hl)<br />
|-<br />
| xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|-<br />
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)<br />
* memptr = an internal 16-bit register connected to 16-bit operations</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-07T08:43:44Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B] => flags,<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags, xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags, xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags, xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags, xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7, a := [a << 1] + ocf<br />
|-<br />
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7, R := [R << 1] + ocf<br />
|-<br />
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf<br />
|-<br />
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + ocf<br />
|-<br />
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + ocf<br />
|-<br />
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf<br />
|-<br />
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf<br />
|-<br />
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf<br />
|-<br />
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + cf<br />
|-<br />
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + cf<br />
|-<br />
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,<br>a := [a AND 0xf0] + [tmp >> 8] => flags<br />
|-<br />
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]<br />
|-<br />
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0, R := [R >> 1] + [ocf << 7]<br />
|-<br />
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0,<br>(hl) := [(hl) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [ocf << 7]<br />
|-<br />
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7]<br />
|-<br />
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7]<br />
|-<br />
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [cf << 7]<br />
|-<br />
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl),<br>(hl) := [tmp >> 4] + [[a AND 0x0f] << 4],<br>a := [a AND 0xf0] + [tmp AND 0x0f] => flags<br />
|-<br />
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S<br />
|-<br />
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf<br />
|-<br />
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf<br />
|-<br />
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf<br />
|-<br />
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf<br />
|-<br />
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf<br />
|-<br />
| sbc hl,Q || <tt>11101101 01qq0010</tt> || 15 || + || + || + || + || + || V || 1 || + || hl -= Q + cf<br />
|-<br />
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else<br />
|-<br />
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]<br />
|-<br />
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]<br />
|-<br />
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]<br />
|-<br />
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]<br />
|-<br />
| sla R || <tt>11001011 00100rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := R << 1<br />
|-<br />
| sla (hl) || <tt>11001011 00100110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := (hl) << 1<br />
|-<br />
| sla (I+D) || <tt>11i11101 11001011 dddddddd 00100110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := (I+D) << 1<br />
|-<br />
| sla (I+D)->R || <tt>11i11101 11001011 dddddddd 00100rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := (I+D) << 1<br />
|-<br />
| sra R || <tt>11001011 00101rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1, R.7 := R.6<br />
|-<br />
| sra (hl) || <tt>11001011 00101110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6<br />
|-<br />
| sra (I+D) || <tt>11i11101 11001011 dddddddd 00101110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := (I+D) >> 1, (I+D).7 := (I+D).6<br />
|-<br />
| sra (I+D)->R || <tt>11i11101 11001011 dddddddd 00101rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>tmp := (I+D) >> 1, tmp.7 := tmp.6<br>(I+D) := R := tmp<br />
|-<br />
| sll R || <tt>11001011 00110rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + 1<br />
|-<br />
| sll (hl) || <tt>11001011 00110110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + 1<br />
|-<br />
| sll (I+D) || <tt>11i11101 11001011 dddddddd 00110110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + 1<br />
|-<br />
| sll (I+D)->R || <tt>11i11101 11001011 dddddddd 00110rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + 1<br />
|-<br />
| srl R || <tt>11001011 00111rrr</tt> || 8 || 0 || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1<br />
|-<br />
| srl (hl) || <tt>11001011 00111110</tt> || 15 || 0 || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1<br />
|-<br />
| srl (I+D) || <tt>11i11101 11001011 dddddddd 00111110</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1<br />
|-<br />
| srl (I+D)->R || <tt>11i11101 11001011 dddddddd 00111rrr</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := (I+D) >> 1<br />
|-<br />
| sub R || <tt>10010rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R<br />
|-<br />
| sub J || <tt>11i11101 1001010b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J<br />
|-<br />
| sub N || <tt>11010110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N<br />
|-<br />
| sub (hl) || <tt>10010110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl)<br />
|-<br />
| sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)<br />
|-<br />
| xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R<br />
|-<br />
| xor J || <tt>11i11101 1010110b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR J<br />
|-<br />
| xor N || <tt>11101110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR N<br />
|-<br />
| xor (hl) || <tt>10101110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (hl)<br />
|-<br />
| xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|-<br />
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)<br />
* memptr = an internal 16-bit register connected to 16-bit operations</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-06T21:36:20Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B] => flags,<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags, xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags, xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags, xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags, xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7,<br>a := [a << 1] + ocf => flags<br />
|-<br />
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7,<br>R := [R << 1] + ocf => flags<br />
|-<br />
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7,<br>(hl) := [(hl) << 1] + ocf => flags<br />
|-<br />
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + ocf => flags<br />
|-<br />
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + ocf => flags<br />
|-<br />
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf => flags<br />
|-<br />
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf => flags<br />
|-<br />
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf => flags<br />
|-<br />
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + cf => flags<br />
|-<br />
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + cf => flags<br />
|-<br />
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,<br>a := [a AND 0xf0] + [tmp >> 8] => flags<br />
|-<br />
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0,<br>a := [a >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0,<br>R := [R >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0,<br>(hl) := [(hl) >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [ocf << 7] => flags<br />
|-<br />
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0,<br>(hl) := [(hl) >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [cf << 7] => flags<br />
|-<br />
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl),<br>(hl) := [tmp >> 4] + [[a AND 0x0f] << 4],<br>a := [a AND 0xf0] + [tmp AND 0x0f] => flags<br />
|-<br />
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S<br />
|-<br />
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf<br />
|-<br />
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf<br />
|-<br />
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf<br />
|-<br />
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf<br />
|-<br />
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 15 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf<br />
|-<br />
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else<br />
|-<br />
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]<br />
|-<br />
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]<br />
|-<br />
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]<br />
|-<br />
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|-<br />
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-06T08:07:07Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B] => flags,<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags, xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags, xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags, xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags, xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7,<br>a := [a << 1] + ocf => flags<br />
|-<br />
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7,<br>R := [R << 1] + ocf => flags<br />
|-<br />
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7,<br>(hl) := [(hl) << 1] + ocf => flags<br />
|-<br />
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + ocf => flags<br />
|-<br />
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + ocf => flags<br />
|-<br />
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf => flags<br />
|-<br />
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf => flags<br />
|-<br />
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf => flags<br />
|-<br />
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7,<br>(I+D) := [(I+D) << 1] + cf => flags<br />
|-<br />
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7,<br>(I+D) := R := [(I+D) << 1] + cf => flags<br />
|-<br />
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,<br>a := [a AND 0xf0] + [tmp >> 8] => flags<br />
|-<br />
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0,<br>a := [a >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0,<br>R := [R >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0,<br>(hl) := [(hl) >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [ocf << 7] => flags<br />
|-<br />
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [ocf << 7] => flags<br />
|-<br />
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0,<br>(hl) := [(hl) >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := [(I+D) >> 1] + [cf << 7] => flags<br />
|-<br />
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0,<br>(I+D) := R := [(I+D) >> 1] + [cf << 7] => flags<br />
|-<br />
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl),<br>(hl) := [tmp >> 4] + [[a AND 0x0f] << 4],<br>a := [a AND 0xf0] + [tmp AND 0x0f] => flags<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-05T17:47:24Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B] => flags,<br>xf := memptr.13, yf := memptr.11<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2<br />
|-<br />
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l,<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I<br />
|-<br />
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]<br />
|-<br />
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]<br />
|-<br />
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || R := (I+D) := (I+D) AND ~[1 << B]<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|-<br />
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2<br />
|-<br />
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|-<br />
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-05T10:29:49Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2<br />
|-<br />
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1,<br>bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3<br />
|-<br />
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2<br />
|-<br />
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a<br />
|-<br />
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing<br />
|-<br />
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R<br />
|-<br />
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J<br />
|-<br />
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N<br />
|-<br />
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)<br />
|-<br />
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)<br />
|-<br />
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a<br />
|-<br />
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R<br />
|-<br />
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
* C = set if the counter (bc) is nonzero after decrementing<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E<br />
* &#42; = any bit value (0 or 1)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-03T17:26:31Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)<br />
|-<br />
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a<br />
|-<br />
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a<br />
|-<br />
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A<br />
|-<br />
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A<br />
|-<br />
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]<br />
|-<br />
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)<br />
|-<br />
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)<br />
|-<br />
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]<br />
|-<br />
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl<br />
|-<br />
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I<br />
|-<br />
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl<br />
|-<br />
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address or immediate || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-03T17:13:07Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E<br />
|-<br />
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E<br />
|-<br />
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E<br />
|-<br />
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E<br />
|-<br />
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J<br />
|-<br />
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R<br />
|-<br />
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl<br />
|-<br />
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh<br />
|-<br />
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl<br />
|-<br />
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh<br />
|-<br />
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N<br />
|-<br />
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)<br />
|-<br />
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)<br />
|-<br />
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R<br />
|-<br />
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N<br />
|-<br />
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R<br />
|-<br />
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N<br />
|-<br />
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)<br />
|-<br />
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)<br />
|-<br />
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a<br />
|-<br />
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a<br />
|-<br />
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2<br />
|-<br />
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-03T15:29:38Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-03T08:03:19Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + [[c - 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b > 0 and nz then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + [[c + 1] AND 0xff],<br>pf := parity of [[tmp2 AND 0x07] XOR b],<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b > 0 and nz then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-03T07:58:07Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 = tmp + ((c - 1) AND 0xff),<br>pf := parity((tmp2 AND 0x07) XOR b),<br>hf := cf := tmp2 > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b > 0 and nz then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>tmp2 := tmp + ((c + 1) AND 0xff),<br>pf := parity((tmp2 AND 0x07) XOR b),<br>hf := cf := tmp2 > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b > 0 and nz then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-02T16:49:46Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>pf := PAR(((tmp + c - 1) AND 0x07) XOR b),<br>hf := cf := (tmp + c - 1) > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b > 0 and nz then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>pf := PAR(((tmp + c + 1) AND 0x07) XOR b),<br>hf := cf := (tmp + c + 1) > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b > 0 and nz then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-02T16:30:58Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>pf := PAR(((tmp + cf - 1) AND 0x07) XOR b),<br>hf := cf := (tmp + cf - 1) > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b > 0 and nz then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>pf := PAR(((tmp + cf + 1) AND 0x07) XOR b),<br>hf := cf := (tmp + cf + 1) > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b > 0 and nz then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-02T16:27:36Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1,<br>b -= 1 => flags, nf := tmp.7,<br>pf := PAR(((tmp + cf - 1) AND 0x07) XOR b),<br>hf := cf := (tmp + cf - 1) > 255<br />
|-<br />
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || X || + || X || X || 1 || - || ind, if b > 0 and nz then pc -= 2<br />
|-<br />
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1,<br>b -= 1 => flags, nf := tmp.7,<br>pf := PAR(((tmp + cf + 1) AND 0x07) XOR b),<br>hf := cf := (tmp + cf + 1) > 255<br />
|-<br />
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || X || + || X || X || 1 || - || ini, if b > 0 and nz then pc -= 2<br />
|-<br />
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A<br />
|-<br />
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl<br />
|-<br />
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I<br />
|-<br />
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition (if noted, by the operation marked with '=> flags'):<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-02T07:15:01Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl<br />
|-<br />
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I<br />
|-<br />
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'<br />
|-<br />
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl<br />
|-<br />
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'<br />
|-<br />
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt<br />
|-<br />
| im 0 || <tt>11101101 01000110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus<br />
|-<br />
| im 1 || <tt>11101101 01010110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38<br />
|-<br />
| im 2 || <tt>11101101 01011110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)<br />
|-<br />
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))<br />
|-<br />
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))<br />
|-<br />
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || ((c)) => flags<br />
|-<br />
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1<br />
|-<br />
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1<br />
|-<br />
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1<br />
|-<br />
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1<br />
|-<br />
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1<br />
|-<br />
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* (()) = I/O port<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Talk:3D_engines
Talk:3D engines
2006-03-01T20:42:30Z
<p>CoBB: </p>
<hr />
<div>I have the source of Matt Roberts's engine. However, I'm not sure if I'm allowed to distribute it. [[User:CoBB|CoBB]] 12:42, 1 Mar 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-01T13:50:18Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 7 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-01T13:44:49Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00101111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 7 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-03-01T07:41:25Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J => flags,<br>xf := J.5, yf = J.3<br />
|-<br />
| cp N || <tt>11111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00101111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1<br />
|-<br />
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1<br />
|-<br />
| dec (hl) || <tt>00110101</tt> || 7 || + || + || + || + || + || V || 1 || - || (hl) -= 1<br />
|-<br />
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1<br />
|-<br />
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1<br />
|-<br />
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1<br />
|-<br />
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0<br />
|-<br />
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E<br />
|-<br />
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| E || 16-bit relative address || dddddddd (E minus address of next instruction)<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-28T18:09:06Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb110</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp N || <tt>11111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00101111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-28T14:40:33Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 11001011 01bbb110 dddddddd</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp N || <tt>11111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00101111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-27T19:16:19Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 01bbb110 dddddddd</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp N || <tt>11111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := N.5, yf = N.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := (hl).5, yf = (hl).3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := (I+D).5, yf = (I+D).3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00101111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-27T13:01:58Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 01bbb110 dddddddd</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp N || <tt>11111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl) => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D) => flags,<br>xf := R.5, yf = R.3<br />
|-<br />
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl -= 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpd, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || X || 1 || - || tmp := a - (hl) => flags,<br>bc -= 1, hl += 1, pf := bc <> 0,<br>xf := [tmp - hf].1, yf = [tmp - hf].3<br />
|-<br />
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || X || 1 || - || cpi, if bc > 0 and nz then pc -= 2<br />
|-<br />
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a<br />
|-<br />
| daa || <tt>00101111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp -= 0x06<br>&nbsp;if cf or (a > 0x99) then tmp -= 0x60<br>else<br>&nbsp;if hf or (a AND 0x0f > 9) then tmp += 0x06<br>&nbsp;if cf or (a > 0x99) then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR (a > 0x99),<br>hf := a.4 XOR tmp.4, a := tmp<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-26T22:22:39Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)<br />
|-<br />
| bit B,R || <tt>01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(I+D) || <tt>11i11101 01bbb110 dddddddd</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B] => flags,<br>xf := [I+D].13, yf := [I+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| I || Index register: ix, iy || i = 0, 1<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-26T22:16:19Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(ix+D) || <tt>11011101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D) + cf<br />
|-<br />
| adc a,(iy+D) || <tt>11111101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(ix+D) || <tt>11011101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D)<br />
|-<br />
| add a,(iy+D) || <tt>11111101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add ix,Q || <tt>11011101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || ix += Q<br />
|-<br />
| add iy,Q || <tt>11111101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || iy += Q<br />
|-<br />
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R<br />
|-<br />
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N<br />
|-<br />
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)<br />
|-<br />
| and (ix+D) || <tt>11011101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (ix+D)<br />
|-<br />
| and (iy+D) || <tt>11111101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (iy+D)<br />
|-<br />
| bit B,R || <tt>01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B] => flags<br />
|-<br />
| bit B,(hl) || <tt>01bbb110</tt> || 12 || + || + || ? || 1 || ? || P || 0 || - || tmp := (hl) AND [1 << B] => flags<br />
|-<br />
| bit B,(ix+D) || <tt>11011101 01bbb110 dddddddd</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (ix+D) AND [1 << B] => flags,<br>xf := [ix+D].13, yf := [ix+D].11<br />
|-<br />
| bit B,(iy+D) || <tt>11111101 01bbb110 dddddddd</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (iy+D) AND [1 << B] => flags,<br>xf := [iy+D].13, yf := [iy+D].11<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| B || Bit number: 0..7 || bbb = 000..111<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator<br />
<br />
=== Miscellaneous ===<br />
<br />
* () = indirection<br />
* [] = operator precedence (to avoid confusion with indirection)<br />
* E.B = the Bth bit of the value of expression E</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-26T08:20:28Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(ix+D) || <tt>11011101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D) + cf<br />
|-<br />
| adc a,(iy+D) || <tt>11111101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(ix+D) || <tt>11011101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D)<br />
|-<br />
| add a,(iy+D) || <tt>11111101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add ix,Q || <tt>11011101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || ix += Q<br />
|-<br />
| add iy,Q || <tt>11111101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || iy += Q<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border="1" cellspacing="0" cellpadding="2"<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-26T08:14:56Z
<p>CoBB: /* Reference */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(ix+D) || <tt>11011101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D) + cf<br />
|-<br />
| adc a,(iy+D) || <tt>11111101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(ix+D) || <tt>11011101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D)<br />
|-<br />
| add a,(iy+D) || <tt>11111101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q<br />
|-<br />
| add ix,Q || <tt>11011101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || ix += Q<br />
|-<br />
| add iy,Q || <tt>11111101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || iy += Q<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-26T07:46:51Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf<br />
|-<br />
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf<br />
|-<br />
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf<br />
|-<br />
| adc a,(ix+D) || <tt>11011101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D) + cf<br />
|-<br />
| adc a,(iy+D) || <tt>11111101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D) + cf<br />
|-<br />
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf<br />
|-<br />
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R<br />
|-<br />
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N<br />
|-<br />
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)<br />
|-<br />
| add a,(ix+D) || <tt>11011101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (ix+D)<br />
|-<br />
| add a,(iy+D) || <tt>11111101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (iy+D)<br />
|-<br />
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q + cf<br />
|-<br />
| add ix,Q || <tt>11011101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || ix += Q + cf<br />
|-<br />
| add iy,Q || <tt>11111101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || iy += Q + cf<br />
|-<br />
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf<br />
|-<br />
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || alalalal ahahahah<br />
|-<br />
| D || 8-bit signed relative offset || dddddddd<br />
|-<br />
| N || 8-bit immediate || nnnnnnnn<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl, sp || qq = 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* + = change by definition:<br />
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)<br />
** Z = zero, set if the result is zero (8 or 16-bit value)<br />
** X = undocumented, bit 5 of the result byte<br />
** H = half-carry, the carry of the low nibble of the result byte<br />
** Y = undocumented, bit 3 of the result byte<br />
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified<br />
** N = negative, set if the previous operation was a subtraction; always specified<br />
** C = carry, the theoretical bit 8 of the result byte<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change described under Effect<br />
* P = parity (only for the parity flag)<br />
* V = overflow (only for the parity flag)<br />
* A = OR with the respective bit of the accumulator</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-25T11:32:46Z
<p>CoBB: /* Z80 instruction set */</p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| call A || <tt>11001101 Al Ah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ccf || <tt>00111111</tt> || 4 || - || - || v || X || v || - || 0 || X || hf := cf, cf := !cf<br />
|-<br />
| ld R1,R2 || <tt>01xxxyyy</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11xx0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11xx0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || Al - low byte, Ah - high byte<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl, sp || 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || 111, 000, 001, 010, 011, 100, 101<br />
|}<br />
<br />
=== Flags ===<br />
* - = no change<br />
* 0 = always reset<br />
* 1 = always set<br />
* X = change, described under Effect<br />
* v = OR with the respective bit of the accumulator</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-25T11:18:03Z
<p>CoBB: </p>
<hr />
<div>== About this page ==<br />
Ez az én kis játszóterem.<br />
<br />
== Z80 instruction set ==<br />
=== Reference ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect<br />
|-<br />
| call A || <tt>11001101 Al Ah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A<br />
|-<br />
| ld R1,R2 || <tt>01xxxyyy</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2<br />
|-<br />
| pop P || <tt>11xx0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2<br />
|-<br />
| push P || <tt>11xx0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P<br />
|-<br />
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2<br />
|}<br />
<br />
=== Legend ===<br />
{| border=1 cellspacing=0 cellpadding=2<br />
! Notation !! Meaning !! Respective opcode bits<br />
|-<br />
| A || 16-bit address || Al - low byte, Ah - high byte<br />
|-<br />
| P || 16-bit register pair: bc, de, hl, af || 00, 01, 10, 11<br />
|-<br />
| Q || 16-bit register: bc, de, hl, sp || 00, 01, 10, 11<br />
|-<br />
| R || 8-bit general purpose register: a, b, c, d, e, h, l || 111, 000, 001, 010, 011, 100, 101<br />
|}</div>
CoBB
https://wikiti.brandonw.net/index.php?title=Talk:Z80_Instruction_Set
Talk:Z80 Instruction Set
2006-02-25T10:52:04Z
<p>CoBB: </p>
<hr />
<div>We could probably just use one of the publically available instruction set lists to save the time and trouble of typing everything out again.<br />
--Dan 00:28, 22 Dec 2005<br />
<br />
:Emacs.<br />
:Anyway, what you've got so far is not particularly clear, and doesn't really present the important information. I'm thinking of a series of tables something like this:<br />
<br />
{| border="1" cellpadding="2"<br />
! Oct !! Hex !! Instruction !! States !! Clock !! S !! Z !! X !! H !! Y !! P !! N !! C<br />
|-<br />
| 100 || 40 || ld b, b || OCF(4) || 4 || - || - || - || - || - || - || - || -<br />
|-<br />
| 101 || 41 || ld b, c || OCF(4) || 4 || - || - || - || - || - || - || - || -<br />
|-<br />
| 102 || 42 || ld b, d || OCF(4) || 4 || - || - || - || - || - || - || - || -<br />
|-<br />
| 103 || 43 || ld b, e || OCF(4) || 4 || - || - || - || - || - || - || - || -<br />
|}<br />
<br />
:A quick reference for people who actually know what they're doing. For those who don't, these tables should of course be accompanied by detailed descriptions of what the various opcodes actually do.<br />
:Any comments before I go and waste a few hours wikifying the rest of the Z80 instruction set?<br />
::Perhaps we can be more intelligent about this and not do this by hand? At least have some source file and then we have a nice program we auto-generate the list from? I sure don't want you wasting hours wikifying the instruction set, no matter how good vi might be. ;-) --[[User:JasonM|JasonM]] 14:13, 30 Dec 2005 (PST)<br />
:Please don't use parentheses for anything other than indirection!<br />
:[[User:FloppusMaximus|FloppusMaximus]] 12:28, 23 Dec 2005 (PST)<br />
::Is providing an octal representation actually useful for anything?<br />
<br />
:A binary representation would be more useful -- [[User:Jib|Jib]]<br />
<br />
::You're right, it could be. Of course octal is useful -- just take a look at a complete table of the instructions; everything is grouped by eights and sixty-fours. So I know that 1''r'' ''s'' = LD ''r'',''s'', or that 3''a''6 ''nnn'' = ALU(''a'') ''nnn'', or that 3''z''7 = RST 0''z''0, or less obviously that 3''c''0 = RET ''c''. Much easier to remember than hexadecimal. But that's just me. I think you're right, binary would be better. [[User:FloppusMaximus|FloppusMaximus]] 15:53, 25 Dec 2005 (PST)<br />
:::Can we just do both? I think I have enough screen real-estate. --[[User:JasonM|JasonM]] 14:13, 30 Dec 2005 (PST)<br />
<br />
:Since I coded the Z80 core of PindurTI from scratch, I have some useful information at my disposal that I hunted down from various places on the web, especially regarding flags. A big table would be the most effective method in my opinion, I'll start building something on my user page. [[User:CoBB|CoBB]] 02:52, 25 Feb 2006 (PST)</div>
CoBB
https://wikiti.brandonw.net/index.php?title=User:CoBB
User:CoBB
2006-02-25T10:45:46Z
<p>CoBB: </p>
<hr />
<div>Ez az én kis játszóterem.</div>
CoBB