WikiTI - User contributions [en]

Talk:83Plus:Ports:08

2008-01-01T08:25:08Z

Jim e:

==Interrupts==
If the link assistant generates interrupts, does that mean that one needs to setup an IM2 interrupt routine to handle them or is there another way to use it? [[User:Saibot84|Saibot84]] 11:49, 27 December 2007 (PST)

:Nope, the 83+SE OS doesn't even seem to bother checking if it generated an interrupt. I haven't check the 84+ os(that's brandon's job) but I doubt they added any means to specifically support link assist. You'll need to use IM 2 if the code is running under TI-OS.--[[User:Jim e|Jim e]] 00:25, 1 January 2008 (PST)

Talk:83Plus:Ports:09

2008-01-01T08:20:52Z

Jim e:

==84+SE==
According to the comments section, this port only exists on the 83+SE and 84+. Was the exclusion of the 84+SE intentional? If the answer is unknown, since I have an 84+SE, is there a way I can verify this with my calc w/o crashing it? [[User:Saibot84|Saibot84]] 11:52, 27 December 2007 (PST)
: Everything except the original 83+ has this link assist. Usually it's split between "the original 83+" and "everything else", except the clock and USB hardware, which are 84+ and 84+SE only. [[User:Brandonw|Brandonw]] 09:22, 31 December 2007 (PST)

::There was no intention to exclude it, it just seemed obviously included being that the only difference between the 84+ and the 84+SE is the flash chip. Then again, WikiTI doesn't really have anything laid out dictating what hardware each model has. 83+ does have its own inferior link assist, but its significantly different from this one. --[[User:Jim e|Jim e]] 00:20, 1 January 2008 (PST)

Talk:WikiTI Home

2007-09-22T03:50:50Z

Jim e: Searching

= Discussion =
What do you think about this wiki?

== More! ==

I think it needs information on more calculators than just the Ti-83+ series, and general assembly information (like a good cathegorized tutorial overview for instance) wouldn't hurt either, I think :)

Timendus

== I hope we can do that soon ==

Just, we don't want to waste time getting it all set up for that and have no one use it. If we see a lot of people milling around here, contributing, then by all means, we'll expand. But one thing we '''DON'T''' want to do is mirror 28 Days. We can link TO it, but we don't want it actually here.

--[[User:AndyJ|AndyJ]] 06:50, 27 Mar 2005 (PST)

== Categories ==

On many pages, there is now a sizable blank space at the top due to several lines of category links. What, if anything, should we do about this? [[User:FloppusMaximus|FloppusMaximus]] 19:06, 29 Mar 2005 (PST)

== Move them? ==

Move the Category links to the bottom should do it. :) That, or put them all on one line.

--[[User:AndyJ|AndyJ]] 19:07, 29 Mar 2005 (PST)

:Yeah, that sounds like a good idea. :) [[User:FloppusMaximus|FloppusMaximus]] 20:18, 29 Mar 2005 (PST)

:: I think I officially qualify as a robot now. You can tell I was getting tired towards the end, as I missed the minor-edit button a few times... sorry about that... [[User:FloppusMaximus|FloppusMaximus]] 21:28, 29 Mar 2005 (PST)
:: Actually, I was going to just mod the php code to fix this bug....keeping the category tags on the top might be a good idea actually. (JasonM)
:::That might still be a good idea. [[User:FloppusMaximus|FloppusMaximus]] 13:18, 3 Apr 2005 (PDT)

== Caching ==

Is it just me, or are there some serious caching problems here?
[[User:FloppusMaximus|FloppusMaximus]] 21:32, 1 Apr 2005 (PST)

: In particular? --[[User:Dan Englender|Dan Englender]] 21:42, 1 Apr 2005 (PST)

:: Ya, the wiki seems to have weird caching problems, especially since it appears the reload the page every time, even if it doesn't get changes. I don't know what's up. --[[User:AndyJ|AndyJ]] 22:35, 1 Apr 2005 (PST)

::: Considering the dynamic nature of a wiki (a page could be edited, at pretty much any time), I wouldn't mind not having it cached. (Though I would personally disable browser caching altogether if firefox would let me... :P ) --[[User:Aquanight|Aquanight]] 22:44, 1 Apr 2005 (PST)

:::: Er... I think I see what you mean... stuff is getting cached when it shouldn't be. (I could've sworn I told firefox to only use 0 KB (aka none) for cache and it's still caching ... argh.) --[[User:Aquanight|Aquanight]] 22:46, 1 Apr 2005 (PST)

::::: I've disabled caching myself as well. Perhaps we should just disable caching altogether? (JasonM)

::::::Caching has been disabled. (JasonM)

::: I found a "Disable Caching" option in Misc. Preferences, if that helps. [[User:Gambit|Gambit]] 00:28, 2 Apr 2005 (PST)

== On Other Calculators ==

Just a random idea I had -- a lot of the ROM calls, RAM addresses, and ports are very similar, if not identical, between the 83 and 83+, and more generally, between all of the Z80 calculators. For some of them -- [[83Plus:RAM:86D8]] and [[83:RAM:8253]], for instance -- it may be possible to combine the two into a single page, though I'm not sure that would be a good idea, given the potential for confusion. So here's what I propose instead:
* For simple things like penRow, we can just have two copies of the page, as there isn't very much to keep synchronized.
* For more detailed pages such as GetKey, have a brief description with a link -- "This routine waits for the user to press a key and returns it. It is equivalent to [[83Plus:BCALLs:4972|GetKey]] on the TI-83 Plus." -- on one page, and the more detailed description on the other. Not a redirect in this case; I'm talking about a distinct page, which would point out the different call points and RAM addresses; in the case of GetKey, for instance, the address of keyExtend is different and should be noted.
* In either case, on ''both'' pages, add a new section "On Other Calculators" near the bottom, with appropriate links. This section serves two purposes: First, it's simply useful information to have available, both for people trying to write cross-platform code, and for those of us who are interested in researching the OS. Secondly, it would serve as a reminder to editors that there are multiple pages that may need to be updated.
* It's also important to maintain the distinction between routines/variables/ports that are ''identical'' as opposed to those which merely have related functions. For example, the widely used GetK routine on the 83 isn't known -- to my knowledge -- on the 73, but GetCSC serves as an adequate substitute in many situations. This is something that belongs in "See Also," not in this section.
* Some templates might be in order here.

[[User:FloppusMaximus|FloppusMaximus]] 18:41, 24 May 2005 (PDT)

:It's not a bad idea. The only problem is that it makes a lot more work for people who just want to make a simple addition to the wiki. There's already a fairly high initial barrier (figuring out the templates and categories) to overcome for someone who wants to stroll along and add something to the wiki. For you and I it wouldn't be a big deal, but I'm worried it's going to dissuade a random person who floats by from adding ErrMemory to 83 Plus, because then 83 (and 86 or 73, if someone decides to start them) will have to be added/changed as well. --[[User:Dan Englender|Dan Englender]] 10:01, 25 May 2005 (PDT)
:It might also be cool to hack up the interlanguage features so we can have the nifty language link-box similar to what exists on wikipedia. --[[User:Dan Englender|Dan Englender]] 12:57, 27 March 2006 (PST)

== Wanted Pages ==
I decided it was too minor to post as news on the main page, but I modified the [[Special:wantedpages|Wanted Pages]] page so that the threshold is 1 link instead of 2 links. A *lot* more wanted pages show up now, though there is some junk in the list now too (like fake links from templates). I figure wanted pages are as good a place as any to start adding, so I'm going to try to make a dent in the list. Anyone who would like to help is welcome to do so :) --[[User:Dan Englender|Dan Englender]] 10:06, 25 May 2005 (PDT)

== Not "hardware" specific documents ==

I was so free to edit the artilce over Emulator(s). I also created an article regarding PindurTI.

As I already stated on the MaxCoderz board (http://joepnet.com/hosted/maxcoderz/phpBB2/viewtopic.php?t=1521), I think WikiTI has a lot of potential to collect information about the TI community aswell. Thinks like PindurTI, GrayScale and maybe even information about all the Zelda attempts. In my opinion, people can benefit from that information. --[[User:Kv83|Vincent Junemann]] 15:00, 21 February 2006 (CET)
:Hehe... Zelda attempts? We really do need a page for that ;) [[User:TD-Linux|TD-Linux]] 09:24, 19 October 2006 (PDT)

== Required logon ==

If the spam is being done by bots, perhaps instead of requiring a log-on, we can require either a log-on or a captcha? I realize there's additional coding involved, but we've had a fair number of useful contributions by non-logged in contributors, and it would be a shame to scare them off by prospects of account creation or the fact that we can track their activities, or what have you. --[[User:Dan Englender|Dan Englender]] 13:55, 23 Feb 2006 (PST)
:Agreed, if we can either find a mod for that or code one ourselves. Of course, maybe even a simple "check this box" thing would work if the bots are programmed just to hit mediawiki and not check for stuff... And if a botrunner ever finds it and fixes their bots, we can either just change it or go to a captcha... However, I think most of the legit anon edits were by people who have an account but just didn't notice they weren't logged in at the time. [[User:AndyJ|Andy Janata]] 18:40, 23 Feb 2006 (PST)

== Wiki update ==

Whats this undefined link I see on a lot of the pages?--[[User:Jim e|Jim e]] 06:07, 14 March 2006 (PST)
:Example? --[[User:Dan Englender|Dan Englender]] 06:12, 14 March 2006 (PST)

::This page has it right under the contents.--[[User:Jim e|Jim e]] 06:18, 14 March 2006 (PST)
:::I'm not seeing it. Screen grab? (Also, try clearing your browser's cache in case something's not playing nice between this and the old wiki) --[[User:Dan Englender|Dan Englender]] 06:21, 14 March 2006 (PST)

::::....It's gone now. I guess it was a fluke, but I did get an image before it disappeared, just to prove i'm not crazy. Pic
:::::I removed the link to that pic since your domain expired and it was snagged by nice search spammy people. [[User:AndyJ|Andy Janata]] 12:11, 21 July 2007 (PDT)

== Motivation Idea ==

Here's an idea that might spark more interest in WikiTI...

Usually, this stuff occurs on the subconscious level, but what if it was brought out from these depths? We have this inquisitive.. knowledge.. accumulate thing... and so what if there was a page (or maybe a set of them) that had a list of questions about the unknowns of the TI-OS? This idea came from this quote:

<nowiki>In mathematics the art of asking questions is more valuable than solving problems. ~ Georg Cantor</nowiki>

All questions would be welcome (not sure about programming help oriented ones though), but maybe not all questions would be answerable, and maybe some questions would be better off not being answered. Other users will fill in the blanks and try to answer the question (because of generosity/competition/whatever). Concurrently, some users might think that some Q&A sections fit well together and then they will merge these into a wiki page. It might also be possible for someone to write a wiki page as an answer to a question!

The point of such a page as this is to 'encourage hacking' in its traditional sense, as it were. As a side effect, it ''might possibly'' help us all (new and old alike) with our hesitancy in editing a page. Furthermore, I think that this idea will only work if there is a continual asking of questions; otherwise, it will lag and eventually '''fail'''. Hence, the [[Wikipedia:WP:BB|Be Bold]] slogan of Wikipedia.

For example:
What are the specific differences between GarbageCollect-ing and "Defragmenting..."?

[[User:Brandonw|Brandonw]] and I talked about this on IRC:
<nowiki><BrandonW> It's a good idea, but I'm not so sure about it working on WikiTI.
<BrandonW> Maybe the question is elsewhere and the answer can be posted on WikiTI.
<BrandonW> The answer to every question can be a WikiTI link.
<BrandonW> That makes WikiTI bigger with more information and people get their questions answered.
<Gambit_> hmm, asked where? Is there a central location somewhere where these would be asked?
<Gambit_> WikiTI subforum in DS, perhaps?
<BrandonW> It could be hosted anywhere...someplace new.
<Gambit_> hm
<BrandonW> Perhaps.</nowiki>

Good or bad? Thoughts? --[[User:Gambit|Gambit]] 23:55, 10 February 2007 (PST)

: It's a good idea, but I'd rather see a broader page about general requests/wanted pages for the wiki, not just TI-OS related ones. [[User:Guillaumeh|Guillaumeh]] 03:55, 18 February 2007 (PST)

== WikiTI Favicon ==

I was going through WikiTI when I noticed that it lacked a favicon. I don't know what you guys think about favicons, but I think they are an important part of a website's identity. With that thought in mind, I created a favicon for WikiTI. I placed the favicon on a [http://www.freewebs.com/tibasicdev/wikitifavicon.html sample page] available on my site so you guys can see it. I wanted to hear what you guys thought of it, if you had any improvements, and if you would use it. Thanks. --[[User:Burr|Burr]] 12:17, 17 February 2007 (PST)

== Searching ==

Why doesn't searching work well. If I type "scf" I would expect to get the z80 opcode reference. Or "LCD" brings up nothing pertaining to the LCD. Is it just me or is searching broken somewhat?--[[User:Jim e|Jim e]] 20:50, 21 September 2007 (PDT)

83Plus:Ports:00

2007-06-30T14:10:57Z

Jim e: Little more clarification

[[Category:83Plus:Ports:By_Address|00 - Link]] [[Category:83Plus:Ports:By_Name|Link]]
== Synopsis ==
'''Port Number:''' 00h

'''Function:''' Link

This port controls the calculator's serial link port (the standard link port present on the 83+, 83+ SE, 84+ and 84+ SE - do not confuse this with the 84+/84+SE's USB link port).

=== Read Values ===
* Bits 0 and 1: These bits indicate the state of the link port's two lines. If a bit is set that indicates the line is high, and if it is reset that indicates the line is low. When idle (no transfer in progress, no cable plugged in, etc), both lines are usually high. When a cable is connected on both ends, a line reads high if and only if both ends have set the line high. The line will read low if either calculator sets it low. Bit 0 is the tip and bit 1 is the ring.
*'''83+ only:''' Bit 2: Set means link receive assist is active.
*'''83+ only:''' Bit 3: Set when link assist has received a complete byte. The only way to reset this bit is to read [[83Plus:Ports:05|port 5]].
* Bit 4 and 5: Bits 4 and 5 indicate which lines are pulled low by the calculator (unlike bits 0 and 1 they are not influenced by the other calculator). A 1 bit indicates your calculator is holding the line low. A 0 bit indicates your calculator is not holding the line low. (When both calculators have a 0 bit here, the corresponding line will read 1.) In other words, these bits reflect bits 0 and 1 from the most recent write to this port.

=== Write Values ===
* Bits 0 and 1: Setting a bit will pull the line low. Resetting a bit will stop holding the line low (allowing it to go high if the other calculator is not holding it low). Remember a low line will read as a bit being reset, but when writing setting a bit brings the line low.
*'''83+ only:''' Bit 2: Set this bit to enable the link receive assist. After setting this bit, poll port 0 until bit 3 is high, at which point read from [[83Plus:Ports:05|port 5]] to get the byte.
 

== Comments ==

=== Ti-OS interference ===
One thing to keep in mind when writing link port related software is that the Ti-OS checks for silent transfers in the background of input routines. When two calculators are connected and one pulls a line low, the other calculator will respond by pulling the other line low to acknowledge that it has received a bit. Even when the other calculator is running an assembly program that uses the getkey romcall. This phenomenon is known to cause severe headaches for programmers who attempt to write synchronization routines :).

=== Data transfer ===
Transferring an entire byte requires you to implement some form of protocol. Examples include TI's official linking protocol, and [http://www.ticalc.org/archives/files/fileinfo/277/27718.html Michael Vincent's TachyonLink protocol].

Other useful information on linking in general:
* [http://www.ticalc.org/archives/files/fileinfo/247/24750.html TI Link Protocol & File Format Guide] 
* [http://www.ticalc.org/archives/files/fileinfo/294/29418.html Ti-83 Link Port Tutorial] (note that this deals with the TI-83, not the 83 Plus, where the the hardware is [[83:Ports:00|somewhat different]].)
* [http://www.ticalc.org/archives/files/fileinfo/242/24244.html All about the Ti-86 link port]

== Example ==

=== Sending/Setting ===
<nowiki> ld a,0 ; Set both lines high
out (0),a

ld a,2 ; Set tip high, ring low
out (0),a

ld a,1 ; Set tip low, ring high
out (0),a

ld a,3 ; Set both low
out (0),a</nowiki>

=== Receiving/Reading ===
<nowiki> in a,(0) ; Get link port value

bit 0,a ; Check tip
jr z,tip_low
jr nz,tip_high

bit 1,a ; Check ring
jr z,ring_low
jr nz,ring_high</nowiki>

83Plus:Ports:04

2007-06-27T16:14:09Z

Jim e: added info for se timers.

[[Category:83Plus:Ports:By_Address|04 - Memory Map / Interrupt]] [[Category:83Plus:Ports:By_Name|Memory Map / Interrupt]]
== Synopsis ==
'''Port Number:''' 04h

'''Function:''' Interrupting Device Identification and Memory Map Control

This port serves two purposes. When read it indicates the device that triggered an interrupt. When written it sets the memory map mode and hardware timer speed. When an interrupt is triggered, it should be cleared by reseting the corresponding bit in [[83Plus:Ports:03|port 3]]. Otherwise, it will continuously call the interrupt code once interrupts are reenabled with ei.

=== Read Values ===
* Bits 0~2 and 4~7 are set according to which device triggered the running interrupt.
** Bit 0: Set if pressing the ON Key triggered the interrupt.
** Bit 1: Set if the first hardware timer triggered the interrupt.
** Bit 2: Set if the second hardware timer triggered the interrupt.
** Bit 4: Link activity generated an interrupt.
** '''83+SE / 84+ only:''' Bit 5: First crystal timer has expired.
** '''83+SE / 84+ only:''' Bit 6: Second crystal timer has expired.
** '''83+SE / 84+ only:''' Bit 7: Third crystal timer has expired.
* Bit 3 is reset if the ON key is being pressed, set otherwise.

=== Write Values ===
* Bit 0 reset to select memory map mode 0. In mode 0 the RAM and ROM is mapped to CPU memory as follows:
** Address 0000h ~ 3FFFh: ROM Page 0
** Address 4000h ~ 7FFFh: Memory Bank A (Page selected in [[83Plus:Ports:06|Port 06h]])
** Address 8000h ~ BFFFh: Memory Bank B (Page selected in [[83Plus:Ports:07|Port 07h]])
** '''83+ Basic''': Address C000h ~ FFFFh: RAM Page 0
** '''Everything else''': Address C000h ~ FFFFh: Page selected in [[83Plus:Ports:05|Port 05h]]
* Bit 0 set to select memory map mode 1. In mode 1 the RAM and ROM is mapped to CPU memory as follows:
** Address 0000h ~ 3FFFh: ROM Page 0
** Address 4000h ~ 7FFFh: RAM Page 0
** Address 8000h ~ BFFFh: Memory Bank A (Page selected in [[83Plus:Ports:06|Port 06h]])
** Address C000h ~ FFFFh: Memory Bank B (Page selected in [[83Plus:Ports:07|Port 07h]])
* Bits 1 and 2 control the hardware timer frequency. Setting both 0 sets the timer to the fastest speed, and both 1 is the slowest speed. The normal speed is with both bits 1.
{| width="90%" border="1" cellpadding="2" cellspacing="0" align="center" style="text-align: center"
|+Frequency (Hz)
|-
! 
!colspan="2"|first timer
!colspan="2"|second timer
!colspan="2"|both enabled
|-
!value
!width="15%"|83+
!width="15%"|83+SE 84+(SE)
!width="15%"|83+
!width="15%"|83+SE 84+(SE)
!width="15%"|83+
!width="15%"|83+SE 84+(SE)
|-
!00
|560||512||1120||1024||1680||1536
|-
!01
|248||227.55||497||455.11||746||682.66
|-
!10
|170||146.29||344||292.57||517||438.86
|-
!11
|118||107.79||236||215.58||353||323.37
|}
* Bits 4~6 should be 1 on the 83+ and 83+SE, and 0 on the 84+ and 84+SE.

== Comments ==
The calculator uses mode 0 for normal operation. If you change the memory map mode be sure to change it back before returning control.
Also, do not switch from mode 0 to mode 1 inside the 4000h ~ 7FFFh range, as it will basically crash the calculator because RAM Page 0 will take over that section and RAM Page 0 cannot execute code.

Interrupt timers may not be independent of the CPU speed for the 83+. However on the 83+SE, 84+ and 84+SE the standard timers are based on the crystal timer. Timer1 fires at 32768/(64+(80*i))hz, where i is bit 1 and 2 set in port 4, making it 0<=i<=3.

== Example ==
This example shows successful use of this port, switching to mode 1 and back. Mode 1 is the only way to execute code beyond address C000h on the 83+ Basic. (Assumes code is running from 4000h (i.e. an application))
<nowiki> in a, (7) ;Save current Bank B page because we'll trash it.
push af
in a,(6) ;Put this app's page into 8000
out (7), a
jp $ + 4003h ;This will actually jump to the next statement, but in Bank B.
ld a, 77h ;Select mode 1 and keep the timer speed at normal...
out (4), a ;Now we're in mode 1.
;We're still at 8000h here but we are back in Bank A.
;Now to go back.
ld a, 76h ;I could dec a for this example, but...
out (4), a ;Back in mode 0 and bank B.
jp $ - 3FFDh ;Jump back to bank A.
pop af
out (7), a ;Restore bank B.</nowiki>

== Credits and Contributions ==
* '''Dan Englender''': Originally documented memory map modes [http://www.detachedsolutions.com/forum/viewtopic.php?p=21593#21593 here]
* '''Michael Vincent''': For his docs [http://www.michaelv.org/programs/calcs/ports/port4.html here], which helped me figure out the interrupt device bits.
* '''James Montelongo''': For his docs [http://www.geocities.com/jimm09876/calc/port4.html here] on the hardware timer.

83Plus:Ports:30

2007-06-27T15:51:42Z

Jim e: updated frequencies

[[Category:83Plus:Ports:By_Address|30-38 - Timers]] [[Category:83Plus:Ports:By_Name|Timers]]
{{SE-Only Port|10}}

== Synopsis ==
'''Port Number:''' 30 - 38

'''Function:''' Timers
On the 83+SE and 84+(SE) there are 3 timers that are independent of each other and each timer is controlled by 3 ports, On/off, Loop control, and the counter itself. They can be used for accurate delay waiting, interrupts that execute at almost any desired frequency, or for just keeping time.

{| width="40%" cellspacing="1"
| width="20%" |
| width="20%" bgcolor="808080" | On/Off
| width="20%" bgcolor="808080" | Loop Control
| width="20%" bgcolor="808080" | Counter
|-
| width="20%" bgcolor="808080" | Timer1
| width="20%" bgcolor="C0C0C0" | 30
| width="20%" bgcolor="C0C0C0" | 31
| width="20%" bgcolor="C0C0C0" | 32
|-
| width="20%" bgcolor="808080" | Timer2
| width="20%" bgcolor="C0C0C0" | 33
| width="20%" bgcolor="C0C0C0" | 34
| width="20%" bgcolor="C0C0C0" | 35
|-
| width="20%" bgcolor="808080" | Timer3
| width="20%" bgcolor="C0C0C0" | 36
| width="20%" bgcolor="C0C0C0" | 37
| width="20%" bgcolor="C0C0C0" | 38
|}

===On/Off ports:===

The On/Off ports are 30, 33, and 36. These ports control what clock is used for this timer and a divisor(needed since the counter is only 8bit). The upper two bits(6 & 7) tell what clock is being used. 00 if none and the timer is off, 01 for the crystal timer, and 02 for the CPU clock. 03 would suggest a combination of the CPU clock and the crystal timers, but I highly doubt it. Bits 0-5 of the On/Off ports control the divisor. For simplicity, here is a table with the output values next to the the frequencies that would be generated.

{| width="30%" cellspacing="1"
|- bgcolor="808080"
| width="20%" | Value
| width="80%" | Frequency
|- bgcolor="C0C0C0"
| width="20%" | 00h
| width="80%" | OFF
|- bgcolor="C0C0C0"
| width="20%" | ~
| width="80%" | ~
|- bgcolor="C0C0C0"
| width="20%" | 40h
| width="80%" | 10922.667 Hz (32768/3)
|- bgcolor="C0C0C0"
| width="20%" | 41h
| width="80%" | 992.9697 Hz (32768/33)
|- bgcolor="C0C0C0"
| width="20%" | 42h
| width="80%" | 99.902 Hz (32768/328)
|- bgcolor="C0C0C0"
| width="20%" | 43h
| width="80%" | 9.9993 Hz (32768/3277)
|- bgcolor="C0C0C0"
| width="20%" | 44h
| width="80%" | 32768 Hz
|- bgcolor="C0C0C0"
| width="20%" | 45h
| width="80%" | 2048 Hz
|- bgcolor="C0C0C0"
| width="20%" | 46h
| width="80%" | 128 Hz
|- bgcolor="C0C0C0"
| width="20%" | 47h
| width="80%" | 8 Hz
|- bgcolor="C0C0C0"
| width="20%" | ~
| width="80%" | ~
|- bgcolor="C0C0C0"
| width="20%" | 80h
| width="80%" | CPU clock speed
|- bgcolor="C0C0C0"
| width="20%" | 81h
| width="80%" | CPU clock / 2
|- bgcolor="C0C0C0"
| width="20%" | 82h
| width="80%" | CPU clock / 4
|- bgcolor="C0C0C0"
| width="20%" | 84h
| width="80%" | CPU clock / 8
|- bgcolor="C0C0C0"
| width="20%" | 88h
| width="80%" | CPU clock / 16
|- bgcolor="C0C0C0"
| width="20%" | 90h
| width="80%" | CPU clock / 32
|- bgcolor="C0C0C0"
| width="20%" | A0h
| width="80%" | CPU clock / 64
|}

Since Silver Edition calculators CPU speed can be adjusted the timers will run at whatever the current CPU speed is(if selected of course).

===Loop Control ports:===

The Loop Control ports are 31, 34, and 37.

When bit 0 is set on this port it causes the timer to loop when the counter hits 0. Once it does, the counter will start back at the value you initially placed in it. To keep it looping from that value, you must output to the loop control port at every loop. If you miss one bit 2 of this port will be set, and the counter will carry to FF continue to count down.

When bit 1 is set this timer will generate an interrupt when the counter hits 0. The interrupt must acknowledge or it will recurse upon EI. Acknowledge it by writing to the Loop control port. Depending on whether you have looping enabled or not, you can start the timer again by write to the counter port.

At this point I want to stress that you must acknowledge the timers whenever the counter reaches zero. Every time the counter hits zero the appropriate bit is set in [[83Plus:Ports:04|port 04h]]. To reset those bits you MUST write to the loop control port, whether you have interrupts enabled or not.

===Counter ports:===

The Counter ports are 32, 35, and 38.

Once the prior 2 ports have been setup all that is need to activate the timer is to send the desired value you wish to count down from to the counter port. However if you send 0 it will loop no matter what and it will not affect port 4, so keep it above 0.

Also note that you should turn off the timer when you are done, do this by writing 0 to the on/off port and loop control.

== Comments ==
For some reasons the timers do not seem to generate interrupts if the CPU is halt. I can only imagine that this is either a bug in the hardware or that there is more information missing. In any case, if you intend to use the crystal timers to generate an interrupt leave the normal timers on so that you can escape any halt.

== Example Code ==

<nowiki> ;Setup up a timer that waits 2 seconds
di
ld a,$47 ;8 hz
out ($30),a
ld a,0 ; no loop, no interrupt
out ($31),a
ld a,16 ;16 ticks / 8 hz equals 2 seconds
out ($32),a
wait:
in a,(4)
bit 5,a ;bit 5 tells if timer 1
jr z,wait ;is done
xor a
out ($30),a ;Turn off the timer.
out ($31),a</nowiki>

== Credits and Contributions ==
* '''Michael Vincent''': Documentation found [http://www.michaelv.org/programs/calcs/rtc.txt here].
* '''James Montelongo''': Documentation found [http://www.geocities.com/jimm09876/calc/timers.html here].

Z80 Routines:Graphic:largesprite

2007-06-25T13:21:54Z

Jim e: just realized something dumb

[[Category:Z80 Routines:Graphic|largesprite]][[Category:Z80 Routines|largesprite]]
The '''Largesprite''' routine is used to copy the contents of a variable sized sprite to the Graph Buffer.

== Code ==
Here is Joe Wingbermuehle's version, which is the one used in ION. Gbuf must be defined before its use.

<nowiki>
;=======================
;LargeSprite
;by Joe Wingbermuehle
;=======================
;Does: Copy a sprite to the gbuf
;Input: ix=sprite address, a='x', l='y', b='height' (in pixels), c='width' (in bytes, e.g. 2 would be 16)
;Output: The sprite is copied to the gbuf
;-----------------------
largeSprite:
di ;turn interrupts off (we want to use shadow registers)
ex af,af'
;exchange af with af' \
ld a,c ;ld c in a (a = 'width') | for not destroying a ('x')
push af ;push a |
ex af,af'
;exchange back | and 'width' is now in a' (saved)
ld e,l ;e = 'y'
ld h,$00 ;h = 0
ld d,h ;d = 0
add hl,de ;'y' *2 \
add hl,de ; *3 | calculate 'y' *12 because 'y' is 'in rows'
add hl,hl ; *6 | (screen is 12 bytes in length)
add hl,hl ; *12 /
ld e,a ;e = 'x'
and $07 ;and %00000111
ld c,a ;last 3 bits in c (amount of bits to shift all bytes)
srl e ;e/2 | shifting e ('x') 3 bits to the right
srl e ; /4 | %11111111 becomes %00011111 for example
srl e ; /8 /
add hl,de ;hl = 'y'; de = 'x' (rounded) | add them
ld de, gbuf ;de = the adress of graph buffer
add hl,de ;add hl to the adress of the gbuf
largeSpriteLoop1:
push hl ;save adress
largeSpriteLoop2:
ld d,(ix) ;first sprite data in d
ld e,$00 ;e = 0
ld a,c ;a = c (to not destroy c)
or a ;is a = 0? (same as cp 0)
jr z,largeSpriteSkip1 ;if theres nothing to shift (a = 0) loop it
largeSpriteLoop3:
srl d ;shift one bit to the right; put the destroyed bit in the carry flag
rr e ;put the carry flag in e (%00000000 becomes %10000000 if carry flag = 1)
dec a ;decrease counter (with was 'the amount of bits to shift')
jr nz,largeSpriteLoop3 ;if the counter is not 0 loop back
largeSpriteSkip1:
ld a,(hl) ;graphbyte in a
xor d ;xor first byte of sprite (that can be changed to 'or d' if you want a OR-routine)
ld (hl),a ;back to buffer
inc hl ;increase pointer
ld a,(hl) ;graphbyte in a
xor e ;xor with shifted sprite byte (change to 'or e' for OR-routine)
ld (hl),a ;back to buffer
inc ix ;increase sprite adress
ex af,af'
;exchange af with af' ( a is now the 'width' from the first line)
dec a ;decrease 'width'
push af ;push the 'width'
ex af,af'
;exchange back
pop af ;pop the 'width'
jr nz,largeSpriteLoop2 ;if a is not 0 (if a = 0 then we would be done) loop it
pop hl ;pop gbuf adress (search the last push hl!)
pop af ;pop | to restore the real 'width'
push af ;push /
ex af,af'
;af' must be the original 'width' when loop 'largeSpriteLoop1'
ld de,$0C ;ld de,12
add hl,de ;next line
djnz largeSpriteLoop1 ;if not b = 0 loop (b = height of sprite)
pop af ;pop because we dont want a stack problem :)
ret ;return</nowiki>

== Example ==
<nowiki>
;...
ld l,8 ;y
ld a,16 ;x
ld b,8 ;height
ld c,2 ;width in bytes
ld ix,sprite
call largesprite
call fastcopy
;...
sprite:
.db %11111111,%11111111
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %11111111,%11111111</nowiki>

== Version without shadow registers ==

by Tijl Coosemans, made for Venus. Compatible with ION's routine. screenBuf must be defined.

<nowiki>
iLargeSprite
ld h,0
ld d,h
ld e,l
add hl,de
add hl,de
add hl,hl
add hl,hl
ld e,a
srl e
srl e
srl e
add hl,de
ld de,screenBuf
add hl,de
and 7
ld e,a
iLargeSpriteLoop1
push bc
push hl
ld b,c
iLargeSpriteLoop2
ld c,(ix)
ld d,0
inc ix
ld a,e
or a
jr z,iLargeSprite1
iLargeSpriteLoop3
srl c
rr d
dec a
jr nz,iLargeSpriteLoop3
iLargeSprite1
ld a,c
xor (hl)
ld (hl),a
inc hl
ld a,d
xor (hl)
ld (hl),a
djnz iLargeSpriteLoop2
pop hl
ld c,12
add hl,bc
pop bc
djnz iLargeSpriteLoop1
ret
</nowiki>

== Version with Clipping ==
This is a version that supports clipping the large sprite. It's considerable larger and requires Self modifying code. The SMC can be removed without to much difficulty. It has different inputs than ION's.

<nowiki>;--------------------------------
;Clip Big Sprite
;by James Montelongo
;MAX SIZE: 64x64
;ix - Sprite
;b - height
;c - width in bytes
;d - x
;e - y

ClipBigSprite:
; Early out, Check if its even remotely on screen
ld a,e
cp 64
ret p
add a,b
ret m
ret z
ld a,d
cp 96
ret p
ld a,c
add a,a
add a,a
add a,a
add a,d
ret m
ret z

ld a,e
or a
jp p,Check_clip_bottom
neg
push de
ld hl,0
ld d,l
ld e,a
bit 2,c
jr z,$+2+1
add hl,de
add hl,hl
bit 1,c
jr z,$+2+1
add hl,de
add hl,hl
bit 0,c
jr z,$+2+1
add hl,de
pop de
ex de,hl
add ix,de ;Here you can save the top offset
ex de,hl
ld e,0
neg
add a,b
ld b,a
Check_clip_bottom:

ld a,e
add a,b
sub 64
jp m,Check_clip_Left
neg
add a,b
ld b,a
Check_clip_Left:
; at this point you may want to save b
xor a
ld (bigskip),a
ld a,Clipleftsize
ld (Do_Clipleft),a
ld a,d
or a
jp p,Check_clip_right
cpl
and $F8
rra
rra
rra
ex de,hl ;save the clipped left offset
ld e,a
ld d,0
add ix,de
ld (bigskip),a
ex de,hl
inc a
neg
add a,c
ld c,a
xor a
ld (Do_Clipleft),a
ld a,d
and $07
ld d,a
Check_clip_right:

ld a,Cliprightsize
ld (Do_Clipright),a
ld a,c
add a,a
add a,a
add a,a
add a,d
sub 96
jp m,Check_clip_middle
and $F8
rra
rra
rra
ld l,a
ld a,(bigskip)
add a,l
inc a
ld (bigskip),a
neg
add a,c
ld c,a
xor a
ld (Do_Clipright),a
Check_clip_middle:
; This is where C should be saved.
xor a
ld (Do_ClipMiddle),a
ld a,c
or a
jp nz,dontskipmiddle
ld a,ClipMiddlesize
ld (Do_ClipMiddle),a
dontskipmiddle:
ld l,e
ld a,d
ld h,0
ld d,h
add hl,hl
add hl,de
add hl,hl
add hl,hl
ld e,a
and $07
xor 7
ld (BigRot1),a
ld (BigRot2),a
ld (BigRot3),a
add a,a
ld (clipbigrot1),a
ld a,$ff
clipbigrot1 = $+1
jr $
srl a
srl a
srl a
srl a
srl a
srl a
srl a
srl e
srl e
srl e
add hl,de
ld de,gbuf
add hl,de
; This is where gbuf offset should be saved.
ld d,a
cpl
ld e,a
;masks should be saved to
BigSpriteRow:
push bc
push hl
ld b,c
Do_Clipleft = $+1
jr Clipleft
ld a,(ix)
inc ix
BigRot1 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
BigMask0:
and e
or (hl)
ld (hl),a
Clipleft:
Clipleftsize = Clipleft-(Do_Clipleft+1)

Do_ClipMiddle = $+1
jr $+2
BigSpriteloop:
ld a,(ix)
inc ix
BigRot2 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
ld c,a
BigMask1:
and d
or (hl)
ld (hl),a
inc hl
ld a,c
BigMask2:
and e
or (hl)
ld (hl),a
djnz BigSpriteloop
ClipMiddle:
ClipMiddlesize = ClipMiddle-(Do_ClipMiddle+1)

Do_ClipRight = $+1
jr ClipRight
ld a,(ix)
BigRot3 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
BigMask3:
and d
or (hl)
ld (hl),a
ClipRight:
Cliprightsize = ClipRight-(Do_ClipRight+1)
pop hl

ld bc,12 ;width of the screen
add hl,bc

bigskip = $+1
ld bc,0
add ix,bc
pop bc
djnz BigSpriteRow
ret
</nowiki>

Z80 Routines:Graphic:largesprite

2007-06-25T13:20:04Z

Jim e: minor fix...

[[Category:Z80 Routines:Graphic|largesprite]][[Category:Z80 Routines|largesprite]]
The '''Largesprite''' routine is used to copy the contents of a variable sized sprite to the Graph Buffer.

== Code ==
Here is Joe Wingbermuehle's version, which is the one used in ION. Gbuf must be defined before its use.

<nowiki>
;=======================
;LargeSprite
;by Joe Wingbermuehle
;=======================
;Does: Copy a sprite to the gbuf
;Input: ix=sprite address, a='x', l='y', b='height' (in pixels), c='width' (in bytes, e.g. 2 would be 16)
;Output: The sprite is copied to the gbuf
;-----------------------
largeSprite:
di ;turn interrupts off (we want to use shadow registers)
ex af,af'
;exchange af with af' \
ld a,c ;ld c in a (a = 'width') | for not destroying a ('x')
push af ;push a |
ex af,af'
;exchange back | and 'width' is now in a' (saved)
ld e,l ;e = 'y'
ld h,$00 ;h = 0
ld d,h ;d = 0
add hl,de ;'y' *2 \
add hl,de ; *3 | calculate 'y' *12 because 'y' is 'in rows'
add hl,hl ; *6 | (screen is 12 bytes in length)
add hl,hl ; *12 /
ld e,a ;e = 'x'
and $07 ;and %00000111
ld c,a ;last 3 bits in c (amount of bits to shift all bytes)
srl e ;e/2 | shifting e ('x') 3 bits to the right
srl e ; /4 | %11111111 becomes %00011111 for example
srl e ; /8 /
add hl,de ;hl = 'y'; de = 'x' (rounded) | add them
ld de, gbuf ;de = the adress of graph buffer
add hl,de ;add hl to the adress of the gbuf
largeSpriteLoop1:
push hl ;save adress
largeSpriteLoop2:
ld d,(ix) ;first sprite data in d
ld e,$00 ;e = 0
ld a,c ;a = c (to not destroy c)
or a ;is a = 0? (same as cp 0)
jr z,largeSpriteSkip1 ;if theres nothing to shift (a = 0) loop it
largeSpriteLoop3:
srl d ;shift one bit to the right; put the destroyed bit in the carry flag
rr e ;put the carry flag in e (%00000000 becomes %10000000 if carry flag = 1)
dec a ;decrease counter (with was 'the amount of bits to shift')
jr nz,largeSpriteLoop3 ;if the counter is not 0 loop back
largeSpriteSkip1:
ld a,(hl) ;graphbyte in a
xor d ;xor first byte of sprite (that can be changed to 'or d' if you want a OR-routine)
ld (hl),a ;back to buffer
inc hl ;increase pointer
ld a,(hl) ;graphbyte in a
xor e ;xor with shifted sprite byte (change to 'or e' for OR-routine)
ld (hl),a ;back to buffer
inc ix ;increase sprite adress
ex af,af'
;exchange af with af' ( a is now the 'width' from the first line)
dec a ;decrease 'width'
push af ;push the 'width'
ex af,af'
;exchange back
pop af ;pop the 'width'
jr nz,largeSpriteLoop2 ;if a is not 0 (if a = 0 then we would be done) loop it
pop hl ;pop gbuf adress (search the last push hl!)
pop af ;pop | to restore the real 'width'
push af ;push /
ex af,af'
;af' must be the original 'width' when loop 'largeSpriteLoop1'
ld de,$0C ;ld de,12
add hl,de ;next line
djnz largeSpriteLoop1 ;if not b = 0 loop (b = height of sprite)
pop af ;pop because we dont want a stack problem :)
ret ;return</nowiki>

== Example ==
<nowiki>
;...
ld l,8 ;y
ld a,16 ;x
ld b,8 ;height
ld c,2 ;width in bytes
ld ix,sprite
call largesprite
call fastcopy
;...
sprite:
.db %11111111,%11111111
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %11111111,%11111111</nowiki>

== Version without shadow registers ==

by Tijl Coosemans, made for Venus. Compatible with ION's routine. screenBuf must be defined.

<nowiki>
iLargeSprite
ld h,0
ld d,h
ld e,l
add hl,de
add hl,de
add hl,hl
add hl,hl
ld e,a
srl e
srl e
srl e
add hl,de
ld de,screenBuf
add hl,de
and 7
ld e,a
iLargeSpriteLoop1
push bc
push hl
ld b,c
iLargeSpriteLoop2
ld c,(ix)
ld d,0
inc ix
ld a,e
or a
jr z,iLargeSprite1
iLargeSpriteLoop3
srl c
rr d
dec a
jr nz,iLargeSpriteLoop3
iLargeSprite1
ld a,c
xor (hl)
ld (hl),a
inc hl
ld a,d
xor (hl)
ld (hl),a
djnz iLargeSpriteLoop2
pop hl
ld c,12
add hl,bc
pop bc
djnz iLargeSpriteLoop1
ret
</nowiki>

== Version with Clipping ==
This is a version that supports clipping the large sprite. It's considerable larger and requires Self modifying code. The SMC can be removed without to much difficulty. It has different inputs than ION's.

<nowiki>;--------------------------------
;Clip Big Sprite
;by James Montelongo
;MAX SIZE: 64x64
;ix - Sprite
;b - height
;c - width in bytes
;d - x
;e - y

ClipBigSprite:
; Early out, Check if its even remotely on screen
ld a,e
cp 64
ret p
add a,b
ret m
ret z
ld a,d
cp 96
ret p
ld a,c
add a,a
add a,a
add a,a
add a,d
ret m
ret z

ld a,e
or a
jp p,Check_clip_bottom
neg
push de
ld hl,0
ld d,l
ld e,a
bit 2,c
jr z,$+2+1
add hl,de
add hl,hl
bit 1,c
jr z,$+2+1
add hl,de
add hl,hl
bit 0,c
jr z,$+2+1
add hl,de
pop de
ex de,hl
add ix,de ;Here you can save the top offset
ex de,hl
ld e,0
neg
add a,b
ld b,a
Check_clip_bottom:

ld a,e
add a,b
sub 64
jp m,Check_clip_Left
neg
add a,b
ld b,a
Check_clip_Left:
; at this point you may want to save b
xor a
ld (bigskip),a
ld a,Clipleftsize
ld (Do_Clipleft),a
ld a,d
or a
jp p,Check_clip_right
neg
dec a
and $F8
rra
rra
rra
ex de,hl ;save the clipped left offset
ld e,a
ld d,0
add ix,de
ld (bigskip),a
ex de,hl
inc a
neg
add a,c
ld c,a
xor a
ld (Do_Clipleft),a
ld a,d
and $07
ld d,a
Check_clip_right:

ld a,Cliprightsize
ld (Do_Clipright),a
ld a,c
add a,a
add a,a
add a,a
add a,d
sub 96
jp m,Check_clip_middle
and $F8
rra
rra
rra
ld l,a
ld a,(bigskip)
add a,l
inc a
ld (bigskip),a
neg
add a,c
ld c,a
xor a
ld (Do_Clipright),a
Check_clip_middle:
; This is where C should be saved.
xor a
ld (Do_ClipMiddle),a
ld a,c
or a
jp nz,dontskipmiddle
ld a,ClipMiddlesize
ld (Do_ClipMiddle),a
dontskipmiddle:
ld l,e
ld a,d
ld h,0
ld d,h
add hl,hl
add hl,de
add hl,hl
add hl,hl
ld e,a
and $07
xor 7
ld (BigRot1),a
ld (BigRot2),a
ld (BigRot3),a
add a,a
ld (clipbigrot1),a
ld a,$ff
clipbigrot1 = $+1
jr $
srl a
srl a
srl a
srl a
srl a
srl a
srl a
srl e
srl e
srl e
add hl,de
ld de,gbuf
add hl,de
; This is where gbuf offset should be saved.
ld d,a
cpl
ld e,a
;masks should be saved to
BigSpriteRow:
push bc
push hl
ld b,c
Do_Clipleft = $+1
jr Clipleft
ld a,(ix)
inc ix
BigRot1 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
BigMask0:
and e
or (hl)
ld (hl),a
Clipleft:
Clipleftsize = Clipleft-(Do_Clipleft+1)

Do_ClipMiddle = $+1
jr $+2
BigSpriteloop:
ld a,(ix)
inc ix
BigRot2 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
ld c,a
BigMask1:
and d
or (hl)
ld (hl),a
inc hl
ld a,c
BigMask2:
and e
or (hl)
ld (hl),a
djnz BigSpriteloop
ClipMiddle:
ClipMiddlesize = ClipMiddle-(Do_ClipMiddle+1)

Do_ClipRight = $+1
jr ClipRight
ld a,(ix)
BigRot3 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
BigMask3:
and d
or (hl)
ld (hl),a
ClipRight:
Cliprightsize = ClipRight-(Do_ClipRight+1)
pop hl

ld bc,12 ;width of the screen
add hl,bc

bigskip = $+1
ld bc,0
add ix,bc
pop bc
djnz BigSpriteRow
ret
</nowiki>

Z80 Routines:Graphic:largesprite

2007-06-24T18:30:50Z

Jim e: Adding a clipping large sprite routine.

[[Category:Z80 Routines:Graphic|largesprite]][[Category:Z80 Routines|largesprite]]
The '''Largesprite''' routine is used to copy the contents of a variable sized sprite to the Graph Buffer.

== Code ==
Here is Joe Wingbermuehle's version, which is the one used in ION. Gbuf must be defined before its use.

<nowiki>
;=======================
;LargeSprite
;by Joe Wingbermuehle
;=======================
;Does: Copy a sprite to the gbuf
;Input: ix=sprite address, a='x', l='y', b='height' (in pixels), c='width' (in bytes, e.g. 2 would be 16)
;Output: The sprite is copied to the gbuf
;-----------------------
largeSprite:
di ;turn interrupts off (we want to use shadow registers)
ex af,af'
;exchange af with af' \
ld a,c ;ld c in a (a = 'width') | for not destroying a ('x')
push af ;push a |
ex af,af'
;exchange back | and 'width' is now in a' (saved)
ld e,l ;e = 'y'
ld h,$00 ;h = 0
ld d,h ;d = 0
add hl,de ;'y' *2 \
add hl,de ; *3 | calculate 'y' *12 because 'y' is 'in rows'
add hl,hl ; *6 | (screen is 12 bytes in length)
add hl,hl ; *12 /
ld e,a ;e = 'x'
and $07 ;and %00000111
ld c,a ;last 3 bits in c (amount of bits to shift all bytes)
srl e ;e/2 | shifting e ('x') 3 bits to the right
srl e ; /4 | %11111111 becomes %00011111 for example
srl e ; /8 /
add hl,de ;hl = 'y'; de = 'x' (rounded) | add them
ld de, gbuf ;de = the adress of graph buffer
add hl,de ;add hl to the adress of the gbuf
largeSpriteLoop1:
push hl ;save adress
largeSpriteLoop2:
ld d,(ix) ;first sprite data in d
ld e,$00 ;e = 0
ld a,c ;a = c (to not destroy c)
or a ;is a = 0? (same as cp 0)
jr z,largeSpriteSkip1 ;if theres nothing to shift (a = 0) loop it
largeSpriteLoop3:
srl d ;shift one bit to the right; put the destroyed bit in the carry flag
rr e ;put the carry flag in e (%00000000 becomes %10000000 if carry flag = 1)
dec a ;decrease counter (with was 'the amount of bits to shift')
jr nz,largeSpriteLoop3 ;if the counter is not 0 loop back
largeSpriteSkip1:
ld a,(hl) ;graphbyte in a
xor d ;xor first byte of sprite (that can be changed to 'or d' if you want a OR-routine)
ld (hl),a ;back to buffer
inc hl ;increase pointer
ld a,(hl) ;graphbyte in a
xor e ;xor with shifted sprite byte (change to 'or e' for OR-routine)
ld (hl),a ;back to buffer
inc ix ;increase sprite adress
ex af,af'
;exchange af with af' ( a is now the 'width' from the first line)
dec a ;decrease 'width'
push af ;push the 'width'
ex af,af'
;exchange back
pop af ;pop the 'width'
jr nz,largeSpriteLoop2 ;if a is not 0 (if a = 0 then we would be done) loop it
pop hl ;pop gbuf adress (search the last push hl!)
pop af ;pop | to restore the real 'width'
push af ;push /
ex af,af'
;af' must be the original 'width' when loop 'largeSpriteLoop1'
ld de,$0C ;ld de,12
add hl,de ;next line
djnz largeSpriteLoop1 ;if not b = 0 loop (b = height of sprite)
pop af ;pop because we dont want a stack problem :)
ret ;return</nowiki>

== Example ==
<nowiki>
;...
ld l,8 ;y
ld a,16 ;x
ld b,8 ;height
ld c,2 ;width in bytes
ld ix,sprite
call largesprite
call fastcopy
;...
sprite:
.db %11111111,%11111111
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %10000000,%00000001
.db %11111111,%11111111</nowiki>

== Version without shadow registers ==

by Tijl Coosemans, made for Venus. Compatible with ION's routine. screenBuf must be defined.

<nowiki>
iLargeSprite
ld h,0
ld d,h
ld e,l
add hl,de
add hl,de
add hl,hl
add hl,hl
ld e,a
srl e
srl e
srl e
add hl,de
ld de,screenBuf
add hl,de
and 7
ld e,a
iLargeSpriteLoop1
push bc
push hl
ld b,c
iLargeSpriteLoop2
ld c,(ix)
ld d,0
inc ix
ld a,e
or a
jr z,iLargeSprite1
iLargeSpriteLoop3
srl c
rr d
dec a
jr nz,iLargeSpriteLoop3
iLargeSprite1
ld a,c
xor (hl)
ld (hl),a
inc hl
ld a,d
xor (hl)
ld (hl),a
djnz iLargeSpriteLoop2
pop hl
ld c,12
add hl,bc
pop bc
djnz iLargeSpriteLoop1
ret
</nowiki>

== Version with Clipping ==
This is a version that supports clipping the large sprite. It's considerable larger and requires Self modifying code. The SMC can be removed without to much difficulty. It has different inputs than ION's.

<nowiki>;--------------------------------
;Clip Big Sprite
;by James Montelongo
;MAX SIZE: 64x64
;ix - Sprite
;b - height
;c - width in bytes
;d - x
;e - y

ClipBigSprite:
; Early out, Check if its even remotely on screen
ld a,e
cp 64
ret p
add a,b
ret m
ret z
ld a,d
cp 96
ret p
ld a,c
add a,a
add a,a
add a,a
add a,d
ret m
ret z

ld a,e
or a
jp p,Check_clip_bottom
neg
push de
ld hl,0
ld d,l
ld e,a
bit 2,c
jr z,$+2+1
add hl,de
add hl,hl
bit 1,c
jr z,$+2+1
add hl,de
add hl,hl
bit 0,c
jr z,$+2+1
add hl,de
pop de
ex de,hl
add ix,de ;Here you can save the top offset
ex de,hl
ld e,0
neg
add a,b
ld b,a
Check_clip_bottom:

ld a,e
add a,b
sub 64
jp m,Check_clip_Left
neg
add a,b
ld b,a
Check_clip_Left:
; at this point you may want to save b
xor a
ld (bigskip),a
ld a,Clipleftsize
ld (Do_Clipleft),a
ld a,d
or a
jp p,Check_clip_right
neg
and $F8
rra
rra
rra
ex de,hl ;save the clipped left offset
ld e,a
ld d,0
add ix,de
ld (bigskip),a
ex de,hl
inc a
neg
add a,c
ld c,a
xor a
ld (Do_Clipleft),a
ld a,d
and $07
ld d,a
Check_clip_right:

ld a,Cliprightsize
ld (Do_Clipright),a
ld a,c
add a,a
add a,a
add a,a
add a,d
sub 96
jp m,Check_clip_middle
and $F8
rra
rra
rra
ld l,a
ld a,(bigskip)
add a,l
inc a
ld (bigskip),a
neg
add a,c
ld c,a
xor a
ld (Do_Clipright),a
Check_clip_middle:
; This is where C should be saved.
xor a
ld (Do_ClipMiddle),a
ld a,c
or a
jp nz,dontskipmiddle
ld a,ClipMiddlesize
ld (Do_ClipMiddle),a
dontskipmiddle:
ld l,e
ld a,d
ld h,0
ld d,h
add hl,hl
add hl,de
add hl,hl
add hl,hl
ld e,a
and $07
xor 7
ld (BigRot1),a
ld (BigRot2),a
ld (BigRot3),a
add a,a
ld (clipbigrot1),a
ld a,$ff
clipbigrot1 = $+1
jr $
srl a
srl a
srl a
srl a
srl a
srl a
srl a
srl e
srl e
srl e
add hl,de
ld de,gbuf
add hl,de
; This is where gbuf offset should be saved.
ld d,a
cpl
ld e,a
;masks should be saved to
BigSpriteRow:
push bc
push hl
ld b,c
Do_Clipleft = $+1
jr Clipleft
ld a,(ix)
inc ix
BigRot1 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
BigMask0:
and e
or (hl)
ld (hl),a
Clipleft:
Clipleftsize = Clipleft-(Do_Clipleft+1)

Do_ClipMiddle = $+1
jr $+2
BigSpriteloop:
ld a,(ix)
inc ix
BigRot2 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
ld c,a
BigMask1:
and d
or (hl)
ld (hl),a
inc hl
ld a,c
BigMask2:
and e
or (hl)
ld (hl),a
djnz BigSpriteloop
ClipMiddle:
ClipMiddlesize = ClipMiddle-(Do_ClipMiddle+1)

Do_ClipRight = $+1
jr ClipRight
ld a,(ix)
BigRot3 = $+1
jr $
rrca
rrca
rrca
rrca
rrca
rrca
rrca
BigMask3:
and d
or (hl)
ld (hl),a
ClipRight:
Cliprightsize = ClipRight-(Do_ClipRight+1)
pop hl

ld bc,12 ;width of the screen
add hl,bc

bigskip = $+1
ld bc,0
add ix,bc
pop bc
djnz BigSpriteRow
ret
</nowiki>

83Plus:BCALLs:42FD

2007-06-21T12:40:34Z

Jim e: Quickly putting a page. Borrowed template from MemChk.

[[Category:83Plus:BCALLs:By_Name:Memory|EnoughMem]] [[Category:83Plus:BCALLs:By_Name|EnoughMem]] [[Category:83Plus:BCALLs:By_Address|42FD - EnoughMem]]
== Synopsis ==
'''Official Name:''' EnoughMem

'''BCALL Address:''' 42FD

Checks if an imputed amount of RAM is available. This routine will also attempt to free RAM that is taken by temporary variables that have been marked dirty but not yet deleted.

=== Inputs ===
* HL = amount of RAM to check for being available

=== Outputs ===
* DE = amount of RAM to check for being available
* Carry set if there is insufficient RAM available

=== Destroys ===
* All

== Remarks ==
No error is generated.

== Example ==
<nowiki>B_CALL EnoughMem</nowiki>

Z80 Routines:Graphic:Fastcopy

2007-06-15T03:03:41Z

Jim e: minor changes

[[Category:Z80 Routines:Graphic|fastcopy]][[Category:Z80 Routines|fastcopy]]
__FORCETOC__

==IonFastcopy==
'''Warning:''' ''The routines presented below may fail on some calculators due to manufacturing defects. Before using any of the routines below, read the safecopy section below.''

The '''Fastcopy''' routine is used to copy the content of the Graph Buffer to the screen. It concerns all TI-z80 calculators, except TI-85 and TI-86, that has a special RAM area directly mapped to the screen.

Fastcopy is widely used, because the rom call _GrBufCpy waits too long between each output to the LCD driver. Using Fastcopy instead of _GrBufCpy increases significantly the speed of a program if it refreshes often the display (such as a lot of games). Most shells have this routine as built-in (ION, MirageOS, Venus ...).

Here is Joe Wingbermuehle's version, which is the one used in ION.

<nowiki>
;-----> Copy the gbuf to the screen (fast)
;Input: nothing
;Output:graph buffer is copied to the screen
fastCopy:
di
ld a,$80
out ($10),a
ld hl,gbuf-12-(-(12*64)+1)
ld a,$20
ld c,a
inc hl
dec hl
fastCopyAgain:
ld b,64
inc c
ld de,-(12*64)+1
out ($10),a
add hl,de
ld de,10
fastCopyLoop:
add hl,de
inc hl
inc hl
inc de
ld a,(hl)
out ($11),a
dec de
djnz fastCopyLoop
ld a,c
cp $2B+1
jr nz,fastCopyAgain
ret
</nowiki>

==Remarks and Improvements==
* Some instructions in Joe Wingbermuehle's Fastcopy are only there for having enough delay between two outputs to the LCD driver. One can modify Fastcopy to change these useless instructions into instructions that will clear the Graph Buffer at the same time:
<nowiki>
;-----> Copy the gbuf to the screen and clear graph buffer (fast)
;Input: nothing
;Output:graph buffer is copied to the screen and subsequently cleared
fastCopy:
di
ld a,$80
out ($10),a
ld hl,gbuf-12-(-(12*64)+1)
ld a,$20
ld c,a
inc hl
dec hl
fastCopyAgain:
ld b,64
inc c
ld de,-(12*64)+1
out ($10),a
add hl,de
ld de,11
fastCopyLoop:
add hl,de
inc hl
inc de
ld a,(hl)
ld (hl),0 ; clears the graph buffer at the same time
out ($11),a
dec de
djnz fastCopyLoop
ld a,c
cp $2B+1
jr nz,fastCopyAgain
ret
</nowiki>

'''ld (hl),0''' takes 10 cycles, so we can do with one less '''inc hl''' (6 cycles) and thus load 11 into de instead of 10.

==Safe Copy==
Many calculators recently manufactured by TI contained a buggy LCD driver, which had different (or varying) delays required to interface with it. Using the fast copy routines above with the LCDs will cause the LCD to display garbled information. However, we can do some additional hardware work to solve this problem, by waiting until we know the LCD is ready to accept a command:

* Bit 7 of Port 10 tells us that the lcd can accept an instruction
* '''SE Only:''' Bit 1 of Port 2 tells us that how long since the last lcd access

The TI-OS and other apps generally use port 2 but being that bit 7 is sign bit we can use that as faster method of waiting.

<nowiki>
;-----> Copy the gbuf to the screen, guaranteed
;Input: nothing
;Output:graph buffer is copied to the screen, no matter the speed settings
;
;in f,(c) is an unofficial instruction.
;It must be noted that you cannot specify any other register. Only f works.
;You may have to add it in order for the routine to work.
;if addinstr doesn't work, you may manually insert the opcodes .db 0EDh,070h

.addinstr IN F,(C) 70ED 2 NOP 1

SafeCopy:
di ;DI is only required if an interrupt will alter the lcd.

ld hl,PlotSScreen ;This can be commented out or another entry placed after it
;so the buffer can be provided by option.
ld c,$10
ld a,$80
setrow:
in f,(c)
jp m,setrow
out ($10),a
ld de,12
ld a,$20
col:
in f,(c)
jp m,col
out ($10),a
push af
ld b,64
row:
ld a,(hl)
rowwait:
in f,(c)
jp m,rowwait
out ($11),a
add hl,de
djnz row
pop af
dec h
dec h
dec h
inc hl
inc a
cp $2c
jp nz,col
ret
</nowiki>

Talk:83Plus:Ports:01

2007-06-02T16:14:09Z

Jim e: In reply

==reset needed==
From my experimentation with PindurTI, it seems to me that it is impossible to poll more than one group without reseting the keyport in betweeen. Being that I have never tested any direct key input routines. I know the directin routine from MirageOS resets before polling, and LearnAsm28d merely says that one "should" reset the port before switching groups. I hesitate to add this to the comments section without further confirmation. [[User:Saibot84|Saibot84]] 21:48, 1 June 2007 (PDT)

:Well, for one 28days is not the best reference for hardware. And pindur is an emulator, so it has the limitations of the PC hardware and what CoBB was willing to put in. However, I decided to check this more since some people keep bringing it up. I have to say my result is not what I expected. It seems that it's possible that groups not even being monitored can affect what is read. I wrote this test program: [http://jim.revsoft.org/code/key.zip Link for download]. It checks the top row and the arrow group.

{| WIDTH=600 BORDER=1 CELLPADDING=1 CELLSPACING=1 STYLE="page-break-before: always"
|-
| WIDTH=120 | Actually being pressed
| WIDTH=120 | Arrow
| WIDTH=120 | Top Row
| WIDTH=120 | Setting arrow without reset
| WIDTH=120 | Both arrow and top row
|-
| WIDTH=120 | Down
| WIDTH=120 | 11111110
| WIDTH=120 | 11111111
| WIDTH=120 | 11111110
| WIDTH=120 | 11111110
|-
| WIDTH=120 | Zoom & Graph
| WIDTH=120 | 11111111
| WIDTH=120 | 11111010
| WIDTH=120 | 11111111
| WIDTH=120 | 11111010
|-
| WIDTH=120 | Zoom & Graph & Down
| WIDTH=120 | 11111010
| WIDTH=120 | 11111010
| WIDTH=120 | 11111010
| WIDTH=120 | 11111010
|-
| WIDTH=120 | Down & 0 & Sin
| WIDTH=120 | 11011110
| WIDTH=120 | 11111111
| WIDTH=120 | 11011110
| WIDTH=120 | 11011110
|-
| WIDTH=120 | Down & sin
| WIDTH=120 | 11111110
| WIDTH=120 | 11111111
| WIDTH=120 | 11111110
| WIDTH=120 | 11111110
|}

It seems to be a bug in hardware, dealing with when multiple keys are being pressed. It looks like the AND logic doesn't exists as much as we all thought before. Still though TI set the convention of reseting the key port, but they do it following reads, that may have an impact on the results. Though we still need more confirmation, I tested this with an 83+, 83+SE and 84+SE. --[[User:Jim e|Jim e]] 09:14, 2 June 2007 (PDT)

83Plus:Ports:30

2007-06-01T00:48:41Z

Jim e: So many spelling errors, What moron wrote this?

[[Category:83Plus:Ports:By_Address|30-38 - Timers]] [[Category:83Plus:Ports:By_Name|Timers]]
{{SE-Only Port|10}}

== Synopsis ==
'''Port Number:''' 30 - 38

'''Function:''' Timers
On the 83+SE and 84+(SE) there are 3 timers that are independent of each other and each timer is controlled by 3 ports, On/off, Loop control, and the counter itself. They can be used for accurate delay waiting, interrupts that execute at almost any desired frequency, or for just keeping time.

{| width="40%" cellspacing="1"
| width="20%" |
| width="20%" bgcolor="808080" | On/Off
| width="20%" bgcolor="808080" | Loop Control
| width="20%" bgcolor="808080" | Counter
|-
| width="20%" bgcolor="808080" | Timer1
| width="20%" bgcolor="C0C0C0" | 30
| width="20%" bgcolor="C0C0C0" | 31
| width="20%" bgcolor="C0C0C0" | 32
|-
| width="20%" bgcolor="808080" | Timer2
| width="20%" bgcolor="C0C0C0" | 33
| width="20%" bgcolor="C0C0C0" | 34
| width="20%" bgcolor="C0C0C0" | 35
|-
| width="20%" bgcolor="808080" | Timer3
| width="20%" bgcolor="C0C0C0" | 36
| width="20%" bgcolor="C0C0C0" | 37
| width="20%" bgcolor="C0C0C0" | 38
|}

===On/Off ports:===

The On/Off ports are 30, 33, and 36. These ports control what clock is used for this timer and a divisor(needed since the counter is only 8bit). The upper two bits(6 & 7) tell what clock is being used. 00 if none and the timer is off, 01 for the crystal timer, and 02 for the CPU clock. 03 would suggest a combination of the CPU clock and the crystal timers, but I highly doubt it. Bits 0-5 of the On/Off ports control the divisor. For simplicity, here is a table with the output values next to the the frequencies that would be generated.

{| width="30%" cellspacing="1"
|- bgcolor="808080"
| width="20%" | Value
| width="80%" | Frequency
|- bgcolor="C0C0C0"
| width="20%" | 00h
| width="80%" | OFF
|- bgcolor="C0C0C0"
| width="20%" | ~
| width="80%" | ~
|- bgcolor="C0C0C0"
| width="20%" | 40h
| width="80%" | 10922.67 Hz
|- bgcolor="C0C0C0"
| width="20%" | 41h
| width="80%" | 933 Hz
|- bgcolor="C0C0C0"
| width="20%" | 42h
| width="80%" | 100 Hz
|- bgcolor="C0C0C0"
| width="20%" | 43h
| width="80%" | 10 Hz
|- bgcolor="C0C0C0"
| width="20%" | 44h
| width="80%" | 32768 Hz
|- bgcolor="C0C0C0"
| width="20%" | 45h
| width="80%" | 2048 Hz
|- bgcolor="C0C0C0"
| width="20%" | 46h
| width="80%" | 128 Hz
|- bgcolor="C0C0C0"
| width="20%" | 47h
| width="80%" | 8 Hz
|- bgcolor="C0C0C0"
| width="20%" | ~
| width="80%" | ~
|- bgcolor="C0C0C0"
| width="20%" | 80h
| width="80%" | CPU clock speed
|- bgcolor="C0C0C0"
| width="20%" | 81h
| width="80%" | CPU clock / 2
|- bgcolor="C0C0C0"
| width="20%" | 82h
| width="80%" | CPU clock / 4
|- bgcolor="C0C0C0"
| width="20%" | 84h
| width="80%" | CPU clock / 8
|- bgcolor="C0C0C0"
| width="20%" | 88h
| width="80%" | CPU clock / 16
|- bgcolor="C0C0C0"
| width="20%" | 90h
| width="80%" | CPU clock / 32
|- bgcolor="C0C0C0"
| width="20%" | A0h
| width="80%" | CPU clock / 64
|}

Since Silver Edition calculators CPU speed can be adjusted the timers will run at whatever the current CPU speed is(if selected of course).

===Loop Control ports:===

The Loop Control ports are 31, 34, and 37.

When bit 0 is set on this port it causes the timer to loop when the counter hits 0. Once it does, the counter will start back at the value you initially placed in it. To keep it looping from that value, you must output to the loop control port at every loop. If you miss one bit 2 of this port will be set, and the counter will carry to FF continue to count down.

When bit 1 is set this timer will generate an interrupt when the counter hits 0. The interrupt must acknowledge or it will recurse upon EI. Acknowledge it by writing to the Loop control port. Depending on whether you have looping enabled or not, you can start the timer again by write to the counter port.

At this point I want to stress that you must acknowledge the timers whenever the counter reaches zero. Every time the counter hits zero the appropriate bit is set in [[83Plus:Ports:04|port 04h]]. To reset those bits you MUST write to the loop control port, whether you have interrupts enabled or not.

===Counter ports:===

The Counter ports are 32, 35, and 38.

Once the prior 2 ports have been setup all that is need to activate the timer is to send the desired value you wish to count down from to the counter port. However if you send 0 it will loop no matter what and it will not affect port 4, so keep it above 0.

Also note that you should turn off the timer when you are done, do this by writing 0 to the on/off port and loop control.

== Comments ==
For some reasons the timers do not seem to generate interrupts if the CPU is halt. I can only imagine that this is either a bug in the hardware or that there is more information missing. In any case, if you intend to use the crystal timers to generate an interrupt leave the normal timers on so that you can escape any halt.

== Example Code ==

<nowiki> ;Setup up a timer that waits 2 seconds
di
ld a,$47 ;8 hz
out ($30),a
ld a,0 ; no loop, no interrupt
out ($31),a
ld a,16 ;16 ticks / 8 hz equals 2 seconds
out ($32),a
wait:
in a,(4)
bit 5,a ;bit 5 tells if timer 1
jr z,wait ;is done
xor a
out ($30),a ;Turn off the timer.
out ($31),a</nowiki>

== Credits and Contributions ==
* '''Michael Vincent''': Documentation found [http://www.michaelv.org/programs/calcs/rtc.txt here].
* '''James Montelongo''': Documentation found [http://www.geocities.com/jimm09876/calc/timers.html here].

83Plus:Ports:03

2007-05-19T18:01:47Z

Jim e: spelling

[[Category:83Plus:Ports:By_Address|03 - Interrupt Mask]] [[Category:83Plus:Ports:By_Name|Interrupt Mask]]
== Synopsis ==
'''Port Number:''' 03h

'''Function:''' Interrupt Masking Port

This port controls what devices will be allowed to trigger interrupts. When an interrupt is triggered, it should be cleared by reseting the corresponding bit. Otherwise, it will continuously call the interrupt code once interrupts are reenabled with ei.

=== Read Values ===
* Bit 0: Set if pressing the ON key will generate an interrupt.
* Bit 1: Set if the first hardware timer will generate an interrupt (range: 108Hz-512Hz).
* Bit 2: Set if the second hardware timer will generate an interrupt (range: 216Hz-1024Hz).
* Bit 4: Set if the linkport will generate an interrupt.

=== Write Values ===
* Bit 0: Set 1 to enable the ON key. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 1: Set 1 to enable the first hardware timer. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 2: Set 1 to enable the second hardware timer. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 3: Set 0 to put the calculator in low power mode if and only if the Z80 cpu enters the halt state (during the executing of a halt instruction). Set 1 to keep the calculator powered.
* Bit 4: Set 1 to enable the linkport interrupt. Set 0 acknowledge the interrupt request and/or to disable it. (Does not completely disable the linkport.)

== Comments ==
* For normal operation, write 0B (00001011) to this port. This will allow the first timer to generate interrupts, and the on key.
* In low power mode it is known that at least the lcd driver enters standby mode and that the timer hardware has been disabled.

== Example ==
===Soft Powerdown===
This example shows how to do a soft powerdown (similar to the auto powerdown) on the calculator.
This may or may not wipe the LCD screen, so you should first copy its contents to a buffer like saveSScreen and then copy it back afterwards.
<nowiki> push af
ld a, 11h ;Enable linkport, ON key. Disable timer.
;Set low power mode.
out (3), a
halt ;Enter low power mode (disabling various devices)
;and wait for an interrupt (either ON key or
;link activity) which will enable all hardware
;devices again.
ld a, 0Bh ;Enable ON key, timer. Disable linkport.
;Keep calculator powered.
out (3), a
pop af</nowiki>

===Simple Interrupt===
This example will show how to set up the first timer for an interrupt and its use in the [[wikipedia:Interrupt_handler|ISR]]. It will also show beyond just port 3 usage since this port requires more complex interaction for its typical use.
<nowiki>Install_ISR:

;Disabling interrupts prior to installation.
;This is in case an im 2 interrupt is already running.
;(MirageOS would present such a case.)
;
di

;A 257 byte vector table(located in StatVars) is
;filled with the same byte. This byte will determine
;the location of the interrupt code's start.
;If the table is filled with $XY then the code must be
;located at $XYXY.
;
ld hl,$8B00
ld (hl),$8A
ld de,$8B01
ld bc,256
ldir

;The interrupt code is copied to a safe code buffer(StatVars).
;If the interrupt code is to large, you may alternatively
;place jp instruction in this code buffer that jumps to your
;interrupt code. Interrupt code should be located in ram. While
;nothing physically prevents use of bank4000 area, it is
;commonly swapped out and so at the very least precautions
;would be required to use that area.
;
ld hl,Interrupt_Start
ld de,$8A8A
ld bc,Interrupt_End-Interrupt_Start
ldir

;You must designate what hardware will generate an interrupt.
;For safety, acknowledging any waiting requests may
;also be done.
;
ld a,%00001000 ;Acknowledge and disable
out (3),a
ld a,%00001010 ;Set 1st timer active
out (3),a
ld a,%00000110 ;Slowest frequency, ~110hz
out (4),a

;i is the higher byte of the address that points to the
;vector table. The lower byte, for all practicality,
;should be considered random.
;
ld a,$8B
ld i,a
im 2
ei
ret

;This small function simply ends the installed interrupt.
;This should be done prior to exit, or when it is not safe
;to have a custom interrupt running.
;
Kill_ISR:
di
im 1
ret

Interrupt_Start:
exx
ex af,af'

;<- Interrupt Code Here
;This code should be small and brief.
;Assuming, that the interrupt is occurring 110 times a second, this
;code would have to execute in (CPU_Speed / Frequency) tstates
;ex: 6000000hz / 110hz = ~54545 tstates
;
;Failure to execute in that time would result in missing an
;interrupt request, in other words you would skip interrupts.
;
;However using less than that amount of time, but near to it
;would result in leaving little time for the main code's execution.
;For example, if the timer generates interrupts every 54545 tstates,
;and your interrupt code executes in 54000 tstates, you would leave
;only 545 tstates for your main programs execution in that time slice.
;The interrupt would take up 99% of the cpu time.
;(This would be a likely issue in gray scale applications.)
;

ld a,%00001000 ;Acknowledge and disable
out (3),a
ld a,%00001010 ;Set 1st timer active
out (3),a
ld a,%00000110 ;Slowest frequency, ~110hz
out (4),a
ex af,af'
exx
ei
ret
Interrupt_End:</nowiki>

== Credits and Contributions ==
*'''Michael Vincent''': For documenting [http://www.michaelv.org/programs/calcs/ports/port3.html here] on the interrupt bits.
*'''James Montelongo''': For documenting the interrupt bits.

83Plus:Ports:03

2007-05-19T08:59:56Z

Jim e: Just noticed I loaded i with the wrong value

[[Category:83Plus:Ports:By_Address|03 - Interrupt Mask]] [[Category:83Plus:Ports:By_Name|Interrupt Mask]]
== Synopsis ==
'''Port Number:''' 03h

'''Function:''' Interrupt Masking Port

This port controls what devices will be allowed to trigger interrupts. When an interrupt is triggered, it should be cleared by reseting the corresponding bit. Otherwise, it will continuously call the interrupt code once interrupts are reenabled with ei.

=== Read Values ===
* Bit 0: Set if pressing the ON key will generate an interrupt.
* Bit 1: Set if the first hardware timer will generate an interrupt (range: 108Hz-512Hz).
* Bit 2: Set if the second hardware timer will generate an interrupt (range: 216Hz-1024Hz).
* Bit 4: Set if the linkport will generate an interrupt.

=== Write Values ===
* Bit 0: Set 1 to enable the ON key. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 1: Set 1 to enable the first hardware timer. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 2: Set 1 to enable the second hardware timer. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 3: Set 0 to put the calculator in low power mode if and only if the Z80 cpu enters the halt state (during the executing of a halt instruction). Set 1 to keep the calculator powered.
* Bit 4: Set 1 to enable the linkport interrupt. Set 0 acknowledge the interrupt request and/or to disable it. (Does not completely disable the linkport.)

== Comments ==
* For normal operation, write 0B (00001011) to this port. This will allow the first timer to generate interrupts, and the on key.
* In low power mode it is known that at least the lcd driver enters standby mode and that the timer hardware has been disabled.

== Example ==
===Soft Powerdown===
This example shows how to do a soft powerdown (similar to the auto powerdown) on the calculator.
This may or may not wipe the LCD screen, so you should first copy it's contents to a buffer like saveSScreen and then copy it back afterwards.
<nowiki> push af
ld a, 11h ;Enable linkport, ON key. Disable timer.
;Set low power mode.
out (3), a
halt ;Enter low power mode (disabling various devices)
;and wait for an interrupt (either ON key or
;link activity) which will enable all hardware
;devices again.
ld a, 0Bh ;Enable ON key, timer. Disable linkport.
;Keep calculator powered.
out (3), a
pop af</nowiki>

===Simple Interrupt===
This example will show how to set up the first timer for an interrupt and its use in the [http://en.wikipedia.org/wiki/Interrupt_handler ISR]. It will also show beyond just port 3 usage since this port requires more complex interaction for its typical use.
<nowiki>Install_ISR:

;Disableing interrupts prior to installation.
;This is in case an im 2 interrupt is already running.
;(MirageOS would present such a case.)
;
di

;A 257 byte vector table(located in StatVars) is
;filled with the same byte. This byte will determine
;the location of the interrupt code's start.
;If the table is filled with $XY then the code must be
;located at $XYXY.
;
ld hl,$8B00
ld (hl),$8A
ld de,$8B01
ld bc,257
ldir

;The interrupt code is copied to a safe code buffer(StatVars).
;If the interrupt code is to large, you may alternatively
;place jp instruction in this code buffer that jumps to your
;interrupt code. Interrupt code should be located in ram. While
;nothing physically prevents use of bank4000 area, it is
;commonly swapped out and so at the very least precautions
;would be required to use that area.
;
ld hl,Interupt_Start
ld de,$8A8A
ld bc,Interupt_End-Interupt_Start
ldir

;You must designate what hardware will generate an interrupt.
;For safety, acknowledging any waiting requests may
;also be done.
;
ld a,%00001000 ;Acknowledge and disable
out (3),a
ld a,%00001010 ;Set 1st timer active
out (3),a
ld a,%00000110 ;Slowest frequency, ~110hz
out (4),a

;i is the higher byte of the address that points to the
;vector table. The lower byte, for all practicality,
;should be considered random.
;
ld a,$8B
ld i,a
im 2
ei
ret

;This small function simply ends the installed interrupt.
;This should be done prior to exit, or when it is not safe
;to have a custom interrupt running.
;
Kill_ISR:
di
im 1
ret

Interupt_Start:
exx
ex af,af'

;<- Interrupt Code Here
;This code should be small and brief.
;Assuming, that the interrupt is occurring 110 times a second, this
;code would have to execute in (CPU_Speed / Frequency) tstates
;ex: 6000000hz / 110hz = ~54545 tstates
;
;Failure to execute in that time would result in missing an
;interrupt request, in other words you would skip interrupts.
;
;However using less than that amount of time, but near to it
;would result in leaving little time for the main code's execution.
;For example, if the timer generates interrupts every 54545 tstates,
;and your interrupt code executes in 54000 tstates, you would leave
;only 545 tstates for your main programs execution in that time slice.
;The interrupt would take up 99% of the cpu time.
;(This would be a likely issue in gray scale applications.)
;

ld a,%00001000 ;Acknowledge and disable
out (3),a
ld a,%00001010 ;Set 1st timer active
out (3),a
ld a,%00000110 ;Slowest frequency, ~110hz
out (4),a
ex af,af'
exx
ei
ret
Interupt_End:</nowiki>

== Credits and Contributions ==
*'''Michael Vincent''': For documenting [http://www.michaelv.org/programs/calcs/ports/port3.html here] on the interrupt bits.
*'''James Montelongo''': For documenting the interrupt bits.

83Plus:Ports:03

2007-05-18T21:39:52Z

Jim e: Another example, bit more detail in ACKs, removed link to my site since its old and deprecated.

[[Category:83Plus:Ports:By_Address|03 - Interrupt Mask]] [[Category:83Plus:Ports:By_Name|Interrupt Mask]]
== Synopsis ==
'''Port Number:''' 03h

'''Function:''' Interrupt Masking Port

This port controls what devices will be allowed to trigger interrupts. When an interrupt is triggered, it should be cleared by reseting the corresponding bit. Otherwise, it will continuously call the interrupt code once interrupts are reenabled with ei.

=== Read Values ===
* Bit 0: Set if pressing the ON key will generate an interrupt.
* Bit 1: Set if the first hardware timer will generate an interrupt (range: 108Hz-512Hz).
* Bit 2: Set if the second hardware timer will generate an interrupt (range: 216Hz-1024Hz).
* Bit 4: Set if the linkport will generate an interrupt.

=== Write Values ===
* Bit 0: Set 1 to enable the ON key. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 1: Set 1 to enable the first hardware timer. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 2: Set 1 to enable the second hardware timer. Set 0 acknowledge the interrupt request and/or to disable it.
* Bit 3: Set 0 to put the calculator in low power mode if and only if the Z80 cpu enters the halt state (during the executing of a halt instruction). Set 1 to keep the calculator powered.
* Bit 4: Set 1 to enable the linkport interrupt. Set 0 acknowledge the interrupt request and/or to disable it. (Does not completely disable the linkport.)

== Comments ==
* For normal operation, write 0B (00001011) to this port. This will allow the first timer to generate interrupts, and the on key.
* In low power mode it is known that at least the lcd driver enters standby mode and that the timer hardware has been disabled.

== Example ==
===Soft Powerdown===
This example shows how to do a soft powerdown (similar to the auto powerdown) on the calculator.
This may or may not wipe the LCD screen, so you should first copy it's contents to a buffer like saveSScreen and then copy it back afterwards.
<nowiki> push af
ld a, 11h ;Enable linkport, ON key. Disable timer.
;Set low power mode.
out (3), a
halt ;Enter low power mode (disabling various devices)
;and wait for an interrupt (either ON key or
;link activity) which will enable all hardware
;devices again.
ld a, 0Bh ;Enable ON key, timer. Disable linkport.
;Keep calculator powered.
out (3), a
pop af</nowiki>

===Simple Interrupt===
This example will show how to set up the first timer for an interrupt and its use in the [http://en.wikipedia.org/wiki/Interrupt_handler ISR]. It will also show beyond just port 3 usage since this port requires more complex interaction for its typical use.
<nowiki>Install_ISR:

;Disableing interrupts prior to installation.
;This is in case an im 2 interrupt is already running.
;(MirageOS would present such a case.)
;
di

;A 257 byte vector table(located in StatVars) is
;filled with the same byte. This byte will determine
;the location of the interrupt code's start.
;If the table is filled with $XY then the code must be
;located at $XYXY.
;
ld hl,$8B00
ld (hl),$8A
ld de,$8B01
ld bc,257
ldir

;The interrupt code is copied to a safe code buffer(StatVars).
;If the interrupt code is to large, you may alternatively
;place jp instruction in this code buffer that jumps to your
;interrupt code. Interrupt code should be located in ram. While
;nothing physically prevents use of bank4000 area, it is
;commonly swapped out and so at the very least precautions
;would be required to use that area.
;
ld hl,Interupt_Start
ld de,$8A8A
ld bc,Interupt_End-Interupt_Start
ldir

;You must designate what hardware will generate an interrupt.
;For safety, acknowledging any waiting requests may
;also be done.
;
ld a,%00001000 ;Acknowledge and disable
out (3),a
ld a,%00001010 ;Set 1st timer active
out (3),a
ld a,%00000110 ;Slowest frequency, ~110hz
out (4),a

;i is the higher byte of the address that points to the
;vector table. The lower byte, for all practicality,
;should be considered random.
;
ld a,$8A
ld i,a
im 2
ei
ret

;This small function simply ends the installed interrupt.
;This should be done prior to exit, or when it is not safe
;to have a custom interrupt running.
;
Kill_ISR:
di
im 1
ret

Interupt_Start:
exx
ex af,af'

;<- Interrupt Code Here
;This code should be small and brief.
;Assuming, that the interrupt is occurring 110 times a second, this
;code would have to execute in (CPU_Speed / Frequency) tstates
;ex: 6000000hz / 110hz = ~54545 tstates
;
;Failure to execute in that time would result in missing an
;interrupt request, in other words you would skip interrupts.
;
;However using less than that amount of time, but near to it
;would result in leaving little time for the main code's execution.
;For example, if the timer generates interrupts every 54545 tstates,
;and your interrupt code executes in 54000 tstates, you would leave
;only 545 tstates for your main programs execution in that time slice.
;The interrupt would take up 99% of the cpu time.
;(This would be a likely issue in gray scale applications.)
;

ld a,%00001000 ;Acknowledge and disable
out (3),a
ld a,%00001010 ;Set 1st timer active
out (3),a
ld a,%00000110 ;Slowest frequency, ~110hz
out (4),a
ex af,af'
exx
ei
ret
Interupt_End:</nowiki>

== Credits and Contributions ==
*'''Michael Vincent''': For documenting [http://www.michaelv.org/programs/calcs/ports/port3.html here] on the interrupt bits.
*'''James Montelongo''': For documenting the interrupt bits.

Z80 Routines:Math:Random

2007-03-29T06:37:47Z

Jim e: Minor correction, Why isn't the table of contents showing up?

[[Category:Z80 Routines:Math|Random]]
[[Category:Z80 Routines|Random]]

==Ion Random==
This is based off the tried and true [http://en.wikipedia.org/wiki/PRNG pseudorandom number generator] featured in Ion by Joe Wingbermuehle

<nowiki>;-----> Generate a random number
; ouput a=answer 0<=a<=255
; all registers are preserved except: af
random:
push hl
push de
ld hl,(randData)
ld a,r
ld d,a
ld e,(hl)
add hl,de
add a,l
xor h
ld (randData),hl
pop de
pop hl
ret</nowiki>

randData here must be a 2 byte seed located in ram. While this is a fast generator, it's generally not considered very good in terms of randomness.

==Linear Feedback Shift Register==
This particular prng is based on [http://en.wikipedia.org/wiki/LFSR Linear feedback shift register]. It uses a 64bit seed and generates 8 new bits at every call. LFSRSeed must be an 8 byte seed located in ram.

<nowiki>;------LFSR------
;James Montelongo
;optimized by Spencer Putt
;out:
; a = 8 bit random number
RandLFSR:
ld hl,LFSRSeed+4
ld e,(hl)
inc hl
ld d,(hl)
inc hl
ld c,(hl)
inc hl
ld a,(hl)
ld b,a
rl e \ rl d
rl c \ rla
rl e \ rl d
rl c \ rla
rl e \ rl d
rl c \ rla
ld h,a
rl e \ rl d
rl c \ rla
xor b
rl e \ rl d
xor h
xor c
xor d
ld hl,LFSRSeed+6
ld de,LFSRSeed+7
ld bc,7
lddr
ld (de),a
ret</nowiki>

While this may produces better numbers, it is slower, larger and requires a bigger seed than ionrandom. Assuming theres is a good seed to start, it should generate ~2^56 bytes before repeating. However if there is not a good seed(0 for example), then the numbers created will not be adequate. Unlike Ionrandom and its use of the r register, starting with the same seed the same numbers will be generated. With Ionrandom the code running may have an impact on the number generated. This means this method requires more initialization.

You can initialize with TI-OS's seeds, stored at seed1 and seed2, both are ti-floats but will serve the purpose.

Z80 Routines:Math:Random

2007-03-29T06:29:23Z

Jim e: Added some random routines, some please expand on usage and what not.

[[Category:Z80 Routines:Math|Random]]
[[Category:Z80 Routines|Random]]

==Ion Random==
This is based off the tried and true [http://en.wikipedia.org/wiki/PRNG pseudorandom number generator] featured in Ion by Joe Wingbermuehle

<nowiki>;-----> Generate a random number
; ouput a=answer 0<=a<=255
; all registers are preserved except: af
random:
push hl
push de
ld hl,(randData)
ld a,r
ld d,a
ld e,(hl)
add hl,de
add a,l
xor h
ld (randData),hl
pop de
pop hl
ret</nowiki>

randData here must be a 2 byte seed located in ram. While this is a fast generator, it's generally not considered very good in terms of randomness.

==Linear Feedback Shift Register==
This particular prng is based on [http://en.wikipedia.org/wiki/LFSR Linear feedback shift register]. It uses a 64bit seed and generates 8 new bits at every call. LFSRSeed must be an 8 byte seed located in ram.

<nowiki>;------LFSR------
;James Montelongo
;optimized by Spencer Putt
;out:
; a = 8 bit random number
RandLFSR:
ld hl,LFSRSeed+4
ld e,(hl)
inc hl
ld d,(hl)
inc hl
ld c,(hl)
inc hl
ld a,(hl)
ld b,a
rl e \ rl d
rl c \ rla
rl e \ rl d
rl c \ rla
rl e \ rl d
rl c \ rla
ld h,a
rl e \ rl d
rl c \ rla
xor b
rl e \ rl d
xor h
xor c
xor d
ld hl,LFSRSeed+6
ld de,LFSRSeed+7
ld bc,7
lddr
ld (LFSRSeed),a
ret</nowiki>

While this may produces better numbers, it is slower, larger and requires a bigger seed than ionrandom. Assuming theres is a good seed to start, it should generate ~2^56 bytes before repeating. However if there is not a good seed(0 for example), then the numbers created will not be adequate. Unlike Ionrandom and its use of the r register, starting with the same seed the same numbers will be generated. With Ionrandom the code running may have an impact on the number generated. This means this method requires more initialization.

You can initialize with TI-OS's seeds, stored at seed1 and seed2, both are ti-floats but will serve the purpose.

Category:Z80 Routines:Math

2007-03-29T05:43:48Z

Jim e: This page hasn't been added...

[[Category:Z80 Routines|Math Routines]]
This is the list of all Math routines in WikiTI.

Experiments

2007-03-24T06:28:06Z

Jim e: Removed Upgrading ram, this page is for existing experiments

Here is a place for experiments, proof of concepts, surprising stuff made on TI-83(+):

* [http://www.ticalc.org/archives/files/fileinfo/368/36889.html QuadPlayer - Four channel sound] by Benryves : stereo sound with 4 tracks on TI-83(+)
* [http://www.revsoft.org/phpBB2/viewtopic.php?t=200 8bit/32khz sound] by Jim E on 84+SE.
* [http://www.ticalc.org/archives/files/fileinfo/341/34172.html 7-level greyscale]
* [http://clap.timendus.com/ CLAP - Linking more than two calculators]
* [[3D engines]]
* [http://wikiti.denglend.net/index.php?title=User:Saibot84 using LCD RAM as temporary RAM (in Nostalgy)]

{{stub}}

Talk:Calculator Documentation

2007-02-14T07:03:25Z

Jim e: Descriptions

I changed some headings and moved stuff around a bit. I think it's more logical this way, but I don't mind if you change it back. [[User:Jib|Jib]] 02:37, 5 November 2006 (PST)
: The only thing that bugs me about it is that there's a "software" heading that includes both PC software (emulators) and calculator software (TIOS Alternatives), not to mention that software documentation is listed under a different heading. What do you think about:
Z80 Calculators
TI-83
Programming
Ports
RAM Areas
B_CALLs
etc
Software
Calculator Software
Emulators
Linking Software
TIOS Alternatives
TI-83 Plus Family
Programming
etc...
Software
etc...
General Z80 Info
Instruction Set
etc.

68k Calculators
TI-89/92+
Programming
etc.
Software
etc.
TI-92
etc.
General 68k Info
Instruction Set
etc.

TI Community
History
Programming Teams
etc.

For example, in that organization, the TI-83 Emulators page would basically just be a list of the emulators compatible with the 83, each of which would have their own separate page. So the VTI page might be linked from the TI-83 emulators page, the TI-85 emulators page, the TI-89 emulators page, etc. I like this organization because it makes it clear what calculators everything is applicable to, and it decreases the number of top-level categories. But maybe it's too complicated or has too many levels. Thoughts? --[[User:Dan Englender|Dan Englender]] 09:11, 5 November 2006 (PST)
:Yeah, it seems like a good idea to me. [[User:Jib|Jib]] 12:35, 5 November 2006 (PST)

== Descriptions ==

I was just made aware that searching doesn't always work so well when looking for certain things. I think adding little descriptions after each link may help with new user finding things that aren't easy to find using search. I would do this however I have the grammar and spelling skills of a jar of mayonaise.

Also right now the Wiki isn't very friendly to new comers. Perhaps brain storming some ways to improve ease of use is in order.--[[User:Jim e|Jim e]] 23:03, 13 February 2007 (PST)

Talk:Z80 Good Programming Practices

2006-12-27T08:29:47Z

Jim e:

To be honest this article is questionable in its function, as "good practices" is relative per situation. The examples given are bad examples when to do what is suggested. Further there isn't much substance here and it's poorly defined what would belong here. A programming guide would be a better idea than this. --[[User:Jim e|Jim e]] 12:20, 20 September 2006 (PDT)
:Well I agree that the title may be misleading, but I think that for the most part the content would be ok for a sort of "programming tips" section of a larger programming guide. In any case, feel free to add/change as you see fit. --[[User:Dan Englender|Dan Englender]] 12:56, 20 September 2006 (PDT)
::Yeah, some of the stuff (like the section on lookup tables) should say when it's more efficient to use it and when it's not (with only a few options and sequential numbers, dec a / jp z,X / dec a / jp z,Y... would be more efficient), but the idea is good. --[[User:Burntfuse|burntfuse]] 11:30, 24 September 2006 (PDT)

::I took out the ix think because it was VERY wrong, I don't know why I didn't notice it before. Opcodes were used that didn't exist, the situation for ix usage was poor and less optimized. Now without that there is only the LUT thing, I still think this page is pointless.--[[User:Jim e|Jim e]] 00:29, 27 December 2006 (PST)

Z80 Good Programming Practices

2006-12-27T08:26:05Z

Jim e: Ix thing was painfully wrong, lut code wasn't the best still isn't.

== Lookup table ==

If you have a place in your code where a value is tested to choose between a lot of things, like subroutines or data, it can be a good idea to use lookup tables instead of a series of tests. It makes the code more readable, concise and extensible.

In terms optimisation though it should be used when the data is not sequentially ordered or when the objects being pointed to are not the same size. For example, using LUTs (Look Up Tables) to find a tile in a block of memory that is only tiles would both slower and cost more memory. Using LUTs to find a particular string would be quicker but would waste more memory than a linear search. Using LUTs as a jump table to different code blocks located through out a program would be faster and smaller compared to the alternative.

However, if there aren't many jumps and many of the values of a are sequential, it would be more efficient to do something like:
<nowiki>
ld a,(Number)
or a
jp z,A_is_0
dec a
jp z,A_is_1
dec a
jp z,A_is_2
sub 2
jp z,A_is_4
dec a
jp z,A_is_5
</nowiki>

Examples:
<table border="1" cellpadding="2">
<tr><th>Without</th><th>With</th></tr>
<tr>
<td>
<nowiki>
ld a,(SpriteNumber)
cp 0
jp z,ChooseSprite0
cp 1
jp z,ChooseSprite1
cp 2
jp z,ChooseSprite2
cp 3
jp z,ChooseSprite3
cp 4
jp z,ChooseSprite4
cp 5
jp z,ChooseSprite5
...
ChooseSprite0
ld hl,Sprite0
jp DisplaySprite
ChooseSprite1
ld hl,Sprite1
jp DisplaySprite
ChooseSprite2
ld hl,Sprite2
jp DisplaySprite
ChooseSprite3
ld hl,Sprite3
jp DisplaySprite
ChooseSprite4
ld hl,Sprite4
jp DisplaySprite
ChooseSprite5
ld hl,Sprite5
jp DisplaySprite
...
DisplaySprite
ld bc,(coordinates)
call SpriteRoutine
</nowiki>
</td>
<td>
<nowiki>
ld a,(SpriteNumber)
add a,a ; a*2 (limits SpriteNumber to 128)
ld h,0
ld l,a
ld de,SpriteAddressLUT
add hl,de
ld a,(hl)
inc hl
ld h,(hl)
ld l,a
ld bc,(coordinates)
jp SpriteRoutine
...
SpriteAddressLUT
.dw Sprite0
.dw Sprite1
.dw Sprite2
.dw Sprite3
.dw Sprite4
.dw Sprite5
</nowiki>
</td>
</tr>
</table>

And this one :
<table border="1" cellpadding="2">
<tr><th>Without</th><th>With</th></tr>
<tr>
<td>
<nowiki>
ld a,(MenuChoice)
cp 0
jp z,Choice0
cp 1
jp z,Choice1
cp 2
jp z,Choice2
cp 3
jp z,Choice3
cp 4
jp z,Choice4
cp 5
jp z,Choice5
cp 6
jp z,Choice6
cp 7
jp z,Choice7
...
</nowiki>
</td>
<td>

<nowiki>
ld a,(MenuChoice)
add a,a ; a*2
ld h,0
ld l,a
ld de,CodeBranchLUT
add hl,de
ld a,(hl)
inc hl
ld h,(hl)
ld l,a
jp (hl)
...
CodeBranchLUT:
.dw Choice0
.dw Choice1
.dw Choice2
.dw Choice3
.dw Choice4
.dw Choice5
.dw Choice6
.dw Choice7
</nowiki>
</td>
</tr>
</table>
{{stub}}

Z80 Instruction Set

2006-12-15T20:12:16Z

Jim e: ld (A),hl & ld hl,(A) were incorrect in timming. Made note about their duplicate opcodes

== Reference ==
{| border="1" cellspacing="0" cellpadding="2"
! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf
|-
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf
|-
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf
|-
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf
|-
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf
|-
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf
|-
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R
|-
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J
|-
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N
|-
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)
|-
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)
|-
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q
|-
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q
|-
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R
|-
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J
|-
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N
|-
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)
|-
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)
|-
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B]
|-
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B], xf := memptr.13, yf := memptr.11
|-
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B], xf := [I+D].13, yf := [I+D].11
|-
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A
|-
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A
|-
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf
|-
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R, xf := R.5, yf = R.3
|-
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J, xf := J.5, yf = J.3
|-
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N, xf := N.5, yf = N.3
|-
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl), xf := (hl).5, yf = (hl).3
|-
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D), xf := (I+D).5, yf = (I+D).3
|-
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1, xf := [tmp - hf].1, yf = [tmp - hf].3
|-
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2
|-
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1, xf := [tmp - hf].1, yf = [tmp - hf].3
|-
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2
|-
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a
|-
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a, if nf then  if hf or [a AND 0x0f > 9] then tmp -= 0x06  if cf or [a > 0x99] then tmp -= 0x60 else  if hf or [a AND 0x0f > 9] then tmp += 0x06  if cf or [a > 0x99] then tmp += 0x60 endif, tmp => flags, cf := cf OR [a > 0x99], hf := a.4 XOR tmp.4, a := tmp
|-
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1
|-
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1
|-
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1
|-
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1
|-
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1
|-
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1
|-
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0
|-
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E
|-
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction
|-
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl
|-
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I
|-
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'
|-
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl
|-
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'
|-
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt
|-
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus
|-
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38
|-
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)
|-
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))
|-
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))
|-
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || tmp := ((c))
|-
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1
|-
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1
|-
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1
|-
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1
|-
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1
|-
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1
|-
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1, b -= 1 => flags, nf := tmp.7, tmp2 = tmp + [[c - 1] AND 0xff], pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2
|-
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1, b -= 1 => flags, nf := tmp.7, tmp2 := tmp + [[c + 1] AND 0xff], pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2
|-
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A
|-
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl
|-
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I
|-
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A
|-
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E
|-
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E
|-
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E
|-
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E
|-
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E
|-
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2
|-
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J
|-
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R
|-
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl
|-
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh
|-
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl
|-
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh
|-
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N
|-
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)
|-
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)
|-
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R
|-
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N
|-
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R
|-
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N
|-
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)
|-
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)
|-
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)
|-
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a
|-
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a
|-
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a
|-
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a
|-
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a
|-
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2
|-
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2
|-
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A
|-
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A
|-
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [ld hl,(A) has a faster non-prefixed duplicate, see below.]
|-
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 16 || - || - || - || - || - || - || - || - || hl := (A)
|-
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)
|-
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [ld (A),hl has a faster non-prefixed duplicate, see below.]
|-
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 16 || - || - || - || - || - || - || - || - || (A) := hl
|-
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I
|-
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl
|-
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I
|-
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1, bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3
|-
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2
|-
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1, bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3
|-
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2
|-
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a
|-
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing
|-
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R
|-
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J
|-
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N
|-
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)
|-
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)
|-
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a
|-
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R
|-
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)
|-
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1, b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l, pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2
|-
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1, b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l, pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2
|-
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2
|-
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2
|-
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P
|-
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I
|-
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]
|-
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]
|-
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]
|-
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]
|-
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2
|-
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2
|-
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2
|-
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2
|-
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7, a := [a << 1] + ocf
|-
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7, R := [R << 1] + ocf
|-
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf
|-
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7, (I+D) := [(I+D) << 1] + ocf
|-
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7, (I+D) := R := [(I+D) << 1] + ocf
|-
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf
|-
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf
|-
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf
|-
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + cf
|-
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + cf
|-
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp, a := [a AND 0xf0] + [tmp >> 8] => flags
|-
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]
|-
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0, R := [R >> 1] + [ocf << 7]
|-
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0, (hl) := [(hl) >> 1] + [ocf << 7]
|-
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0, (I+D) := [(I+D) >> 1] + [ocf << 7]
|-
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0, (I+D) := R := [(I+D) >> 1] + [ocf << 7]
|-
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7]
|-
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7]
|-
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]
|-
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := [(I+D) >> 1] + [cf << 7]
|-
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := [(I+D) >> 1] + [cf << 7]
|-
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl), (hl) := [tmp >> 4] + [[a AND 0x0f] << 4], a := [a AND 0xf0] + [tmp AND 0x0f] => flags
|-
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S
|-
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf
|-
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf
|-
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf
|-
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf
|-
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf
|-
| sbc hl,Q || <tt>11101101 01qq0010</tt> || 15 || + || + || + || + || + || V || 1 || + || hl -= Q + cf
|-
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else
|-
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]
|-
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]
|-
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]
|-
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]
|-
| sla R || <tt>11001011 00100rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := R << 1
|-
| sla (hl) || <tt>11001011 00100110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := (hl) << 1
|-
| sla (I+D) || <tt>11i11101 11001011 dddddddd 00100110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := (I+D) << 1
|-
| sla (I+D)->R || <tt>11i11101 11001011 dddddddd 00100rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := (I+D) << 1
|-
| sra R || <tt>11001011 00101rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1, R.7 := R.6
|-
| sra (hl) || <tt>11001011 00101110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6
|-
| sra (I+D) || <tt>11i11101 11001011 dddddddd 00101110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1, (I+D).7 := (I+D).6
|-
| sra (I+D)->R || <tt>11i11101 11001011 dddddddd 00101rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, tmp := (I+D) >> 1, tmp.7 := tmp.6 (I+D) := R := tmp
|-
| sll R || <tt>11001011 00110rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + 1
|-
| sll (hl) || <tt>11001011 00110110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + 1
|-
| sll (I+D) || <tt>11i11101 11001011 dddddddd 00110110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + 1
|-
| sll (I+D)->R || <tt>11i11101 11001011 dddddddd 00110rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + 1
|-
| srl R || <tt>11001011 00111rrr</tt> || 8 || 0 || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1
|-
| srl (hl) || <tt>11001011 00111110</tt> || 15 || 0 || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1
|-
| srl (I+D) || <tt>11i11101 11001011 dddddddd 00111110</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1
|-
| srl (I+D)->R || <tt>11i11101 11001011 dddddddd 00111rrr</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := (I+D) >> 1
|-
| sub R || <tt>10010rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R
|-
| sub J || <tt>11i11101 1001010b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J
|-
| sub N || <tt>11010110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N
|-
| sub (hl) || <tt>10010110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl)
|-
| sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)
|-
| xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R
|-
| xor J || <tt>11i11101 1010110b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR J
|-
| xor N || <tt>11101110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR N
|-
| xor (hl) || <tt>10101110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (hl)
|-
| xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)
|}

== Legend ==
{| border="1" cellspacing="0" cellpadding="2"
! Notation !! Meaning !! Respective opcode bits
|-
| A || 16-bit address or immediate || alalalal ahahahah
|-
| B || Bit number: 0..7 || bbb = 000..111
|-
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111
|-
| D || 8-bit signed relative offset || dddddddd
|-
| E || 16-bit relative address || dddddddd (E minus address of next instruction)
|-
| I || Index register: ix, iy || i = 0, 1
|-
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)
|-
| N || 8-bit immediate || nnnnnnnn
|-
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11
|-
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11
|-
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101
|-
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111
|}

== Flags ==
* - = no change
* + = change by definition (if noted, by the operation marked with '=> flags', otherwise by the only non-single-bit operation):
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)
** Z = zero, set if the result is zero (8 or 16-bit value)
** X = undocumented, bit 5 of the result byte
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte
** Y = undocumented, bit 3 of the result byte
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified
** N = negative, set if the previous operation was a subtraction; always specified
** C = carry, the theoretical bit 8 of the result byte
* 0 = always reset
* 1 = always set
* X = change described under Effect
* P = parity (only for the parity flag)
* V = overflow (only for the parity flag)
* A = OR with the respective bit of the accumulator
* C = set if the counter (bc) is nonzero after decrementing

== Miscellaneous ==
* () = indirection
* (()) = I/O port
* [] = operator precedence (to avoid confusion with indirection)
* E.B = the Bth bit of the value of expression E
* * = any bit value (0 or 1)
* memptr = an internal 16-bit register connected to 16-bit operations
* tmp, tmp2 = temporary storage whose value is thrown away after each instruction

== English Language Explanations ==
=== Data Movement ===
'''EX'''
Three possible arguments:

''EX DE, HL''
Swaps H with D and L with E

''EX AF, AF'''
Swaps AF with its shadow

''EX (SP), HL''
Swaps (SP) with L and (SP+1) with H. Index registers are also valid

'''EXX'''
Swap BC, DE and HL with their shadows

'''LD'''
Four main arguments:

''LD reg, #''
Sets the eight or 16 bit contents of reg to #

''LD reg2, reg1''
Copies the contents of 8 bit reg1 to reg2

''LD (imm16), reg''
Copies the value of 8 or 16 bit reg to 16 bit memory address imm16. Programmers should remember that 16 bit values are stored little-endian.

''LD reg, (imm16)''
Does the opposite of ''LD (imm16), reg''

'''LDIR'''
Copies a byte from (HL) to (DE), increments DE and HL, then decrements BC. The instruction is repeated if BC is not 0. Interrupts are allowed to trigger while this instruction is running.

'''PUSH'''
Used as ''PUSH reg16'' where reg16 is a register pair or index register. Decrements SP, copies regMSB to (SP), decrements SP again, then copies regLSB to (SP).

'''POP'''
Same syntax as PUSH. Copies (SP) to regLSB, increments SP, copies (SP) to regMSB, then increments SP again. The word based at the starting value of SP is zeroed.

===Control===
'''JP'''
''JP imm16'' Imm16 is copied to PC, causing execution to jump there. Can also be conditional with Z, NZ, C, NC, PO, PE, P, or M as additional arguments such as ''JP Z, imm16''. (HL) may be substituted for imm16 to have the current value of HL copied to PC

'''JR'''
''JR imm8'' The signed 8 bit value imm8 is added to PC, allowing a jump within 128 bytes of the instruction. May also be conditional, but only with Z, NZ, C, and NC arguments.

'''CALL'''
''CALL imm16'' The current value of PC+3 is PUSHed, then imm16 is loaded into PC. May be conditional with the same syntax and arguments as JP, although (HL) is not valid.

'''RET'''
''RET'' The top stack value is POPed into PC. It may be conditional with the same arguments and syntax as JP. This is usually used to return from a CALL instruction.

'''RST'''
''RST imm8'' PC+1 is PUSHed and PC is loaded with 00imm8. This opcode is only 1 byte, so it is an alternative to CALLing routines that are mapped into the beginning of memory. However, it may only be used for the following values of imm8: 00h, 08h, 18h, 20h, 28h, 30h, and 38h. Imm8 must also be in -h suffix format.

'''DJNZ'''
''DJNZ imm8'' B is decremented and if is 0, the rest of the instruction is skipped. Otherwise, the signed 8 bit value imm8 is added to PC. This instruction is usually used like a [[For(]] loop in BASIC.

'''NOP'''
''NOP'' As the name implies, it is "no operation". The CPU does nothing for four clock cycles.

== Care of ==
* Reference table thanks to [[User:CoBB|CoBB]]
* English language reference thanks to [[User:Taricorp|Taricorp]]

Talk:Z80 Good Programming Practices

2006-09-20T19:20:05Z

Jim e: Note on this page

Z80 Good Programming Practices

2006-09-20T19:11:24Z

Jim e: This entire article is questionable.

== Using IX ==

If you have objects represented by adjacent chunks of data in memory, you can use IX to easily manage them.

<table border="1" cellpadding="2">
<tr><th>Without</th><th>With</th></tr>
<tr>
<td>
<nowiki>
ld b,10
ld hl,SpritesData
DisplaySpritesLoop
ld b,(hl) ; coordx
inc hl
ld c,(hl) ; coordy
inc hl
ld d,(hl) ; first part of address
inc hl
ld e,(hl) ; end of address
inc hl
call DisplaySprite
djnz DisplaySpritesLoop
</nowiki>
</td>
<td>
<nowiki>
COORDX .equ 0
COORDY .equ 1
ADDR1 .equ 2
ADDR2 .equ 3

ld b,10
ld ix,SpritesData
DisplaySpritesLoop
ld b,(ix+COORDX)
ld c,(ix+COORDY)
ld d,(ix+ADDR1)
ld e,(ix+ADDR2)
call DisplaySprite
ld hl,4
add ix,hl
djnz DisplaySpritesLoop
</nowiki>
</td>
</tr>
</table>

Defining constants for the offsets of each field of your "objects" makes the code more understandable. However this particular example is not the best, being that the original code is faster and smaller. Typically in sequential access using the HL register would perform better, however if random access of different objects and different elements in an object is required through out a particular iteration, than ix would be the better choice.

== Lookup table ==

If you have a place in your code where a value is tested to choose between a lot of things, like subroutines or data, it can be a good idea to use lookup tables instead of a series of tests. It makes the code more readable, concise and extensible.

In terms optimisation though it should be used when the data is not sequentially ordered or when the objects being pointed to are not the same size. For example, using LUTs (Look Up Tables) to find a tile in a block of memory that is only tiles would both slower and cost more memory. Using LUTs to find a particular string would be quicker but would waste more memory than a linear search. Using LUTs as a jump table to different code blocks located through out a program would be faster and smaller compared to the alternative.

<table border="1" cellpadding="2">
<tr><th>Without</th><th>With</th></tr>
<tr>
<td>
<nowiki>
ld a,(SpriteNumber)
cp 1
jp z,ChooseSprite1
cp 2
jp z,ChooseSprite2
cp 3
jp z,ChooseSprite3
cp 4
jp z,ChooseSprite4
...
ChooseSprite1
ld hl,Sprite1
jp DisplaySprite
ChooseSprite2
ld hl,Sprite2
jp DisplaySprite
ChooseSprite3
ld hl,Sprite3
jp DisplaySprite
ChooseSprite4
ld hl,Sprite4
jp DisplaySprite
...
DisplaySprite
ld bc,(coordinates)
call SpriteRoutine
</nowiki>
</td>
<td>
<nowiki>
ld a,(SpriteNumber)
add a,a ; a*2
ld h,0
ld l,a
ld de,SpriteAddressLUT
add hl,de
ld a,(hl)
inc hl
ld h,(hl)
ld l,a
ld bc,(coordinates)
call SpriteRoutine
...
SpriteAddressLUT
.dw Sprite1
.dw Sprite2
.dw Sprite3
.dw Sprite4
</nowiki>
</td>
</tr>
</table>

And this one :
<table border="1" cellpadding="2">
<tr><th>Without</th><th>With</th></tr>
<tr>
<td>
<nowiki>
ld a,(MenuChoice)
cp 1
jp z,Choice1
cp 2
jp z,Choice2
cp 3
jp z,Choice3
cp 4
jp z,Choice4
...
</nowiki>
</td>
<td>

<nowiki>
ld a,(MenuChoice)
add a,a ; a*2
ld h,0
ld l,a
ld de,CodeBranchLUT
add hl,de
ld a,(hl)
inc hl
ld h,(hl)
ld l,a
jp (hl)
...
CodeBranchLUT
.dw Choice1
.dw Choice2
.dw Choice3
.dw Choice4
</nowiki>
</td>
</tr>
</table>
{{stub}}

83Plus:Software:usb8x/Supported Devices

2006-08-31T06:30:57Z

Jim e: added working controller

== Internal Driver ==
These devices work and usb8x contains an internal driver to control them.
* HID Keyboard
* HID Mouse
* Mass Storage Device. Tested with:
** Sandisk Cruzer
** Lexar JumpDrive/Secure
* TI Silverlink
* Some gamepad controllers. Tested with:
** Logitech Precision Gamepad
** [http://www.retrousb.com/nintendo.html RetroZone NES pad]
** [http://www.planetgamecube.com/hardArt.cfm?artid=2459 Skillz Gamecube to USB] (The company no longer seems to exist.)

== External Driver ==
These devices work and an external driver exists to control them.
* None

== Works, No Driver ==
These devices have been tested to work with usb8x, but no complete driver currently exists.
* EMS HID Playstation 2 controller adapter
* Vernier EasyTemp

== Should Work ==
These devices have been tested to properly initialize with usb8x, but no drivers have been attempted.
* Canon i850 printer
* Canon SD400 digital camera
* Motorola SURFboard cable modem
* Motorola V220 (can act as USB Modem)
* TI-84 Plus (calc<->calc)

== Not Compatible ==
These devices are not compatible with usb8x.
* Ezonics webcam - isochronous endpoints
* Netgear WG111 802.11 adapter - draws too much current?
* SMC 802.11b adapter - draws too much current
* Taurus MBT-1203 bluetooth adapter - has integrated hub

Talk:83Plus:Software:usb8x/Asm Interface/MSD/MSD Initialize

2006-08-17T17:48:57Z

Jim e:

I've been trying to work with this newest version. But I seem to get an error when I MSD_Initialize, returning an error code of 8.
<code>
ld hl,driverram
ld a,uDriverInit
call USBDriverCall
jp c,driverfailed
ld hl,appBackUpScreen
ld de,appBackUpScreen+256
ld a,uMSD_Initialize
call USBDriverCall
jp c,msdfailed ;fails here
ld a,uUFI_Initialize
call USBDriverCall
jp c,ufifailed
ld a,uFAT_Initialize
call USBDriverCall
jp c,fatfailed
</code>
I'm not using zds so I'm not using the U_call macro, does there seem to be anything wrong? MSD8x the app does get past initization and displays files.

Z80 Routines:Math:Square root

2006-07-20T21:13:53Z

Jim e: Added square root routines, been a while hope I did this right

[[Category:Z80 Routines:Math|Square root]]
[[Category:Z80 Routines|Square root]]

==Size Optimization==
This version is size optimized, it compares every perfect square against HL until a square that is larger is found. Obviously slower, but does get the job done in only 12 bytes.
<nowiki>;-------------------------------
;Square Root
;Inputs:
;HL = number to be square rooted
;Outputs:
;A = square root

sqrt:
ld a,$ff
ld de,1
sqrtloop:
inc a
dec e
dec de
add hl,de
jr c,sqrtloop
ret </nowiki>

==Speed Optimization==
This version uses the high school method of finding a square root and so it is much faster, running at about ~850 tstates. Unfortunately it requires 180 bytes and is quite obfuscated.
<nowiki>;-------------------------------
;Square Root
;Inputs:
;DE = number to be square rooted
;Outputs:
;A = square root

sqrt:
xor a
ld h,a
ld l,a
ld b,a
rl d
rl l
rl d
rl l
ld c,1
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
add a,a
rl d
rl l
rl d
rl l
ld c,a
scf
rl c
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
add a,a
rl d
rl l
rl d
rl l
ld c,a
scf
rl c
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
add a,a
rl d
rl l
rl d
rl l
ld c,a
scf
rl c
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
add a,a
rl e
adc hl,hl
rl e
adc hl,hl
ld c,a
scf
rl c
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
add a,a
rl e
adc hl,hl
rl e
adc hl,hl
ld c,a
scf
rl c
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
add a,a
rl e
adc hl,hl
rl e
adc hl,hl
ld c,a
scf
rl c
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
add a,a
rl e
adc hl,hl
rl e
adc hl,hl
ld c,a
scf
rl c
rl b
sbc hl,bc
jp c,$+3+2+1
sbc hl,bc
inc a
add hl,bc
ret</nowiki>

==Balanced Optimization==
This version is a balance between speed and size. It also uses the high school method and runs under 1200 tstates. It only costs 41 bytes.
<nowiki>;-------------------------------
;Square Root
;Inputs:
;DE = number to be square rooted
;Outputs:
;A = square root

Sqrt:
ld hl,0
ld c,l
ld b,h
ld a,8
Sqrtloop:
sla e
rl d
adc hl,hl
sla e
rl d
adc hl,hl
scf ;Can be optimised
rl c ;with SL1 instruction
rl b
sbc hl,bc
jr nc,Sqrtaddbit
add hl,bc
dec c
Sqrtaddbit:
inc c
res 0,c
dec a
jr nz,Sqrtloop
ld a,c
rr b
rra
ret</nowiki>

==Other Options==
A binary search of a square table would yield much better best case scenarios and the worst case scenarios would be similar to the high school method. However this would also require 512 byte table making it significantly larger than the other routines. Of course the table could also serve as a rapid squaring method.

== Credits and Contributions ==
* '''James Montelongo'''

Talk:History of the TI Z80 community

2006-07-16T01:52:49Z

Jim e:

* I've added DS's history <offtopic love of DS>because I consider their products to be leaps and bounds above other programs/apps. They documented A LOT of BCALLS, hooks, etc. when barely anyone knew about them. They've revolutionized programming for the TI-83 Plus</offtopic>. It is because of them that this wiki exists. [[User:Saibot84|Saibot84]] 09:16, 15 July 2006 (PDT)

* This history goes farther back. I believe it all began with ti-files. Do we have any info on them?

I really don't think mentioning every single DS product is nessacry. the maybe well produced but They aren't alone in that. Some of them should be on the proof of concept page. Anyway I think looking back at significant events woulds more helpful.--[[User:Jim e|Jim e]] 18:52, 15 July 2006 (PDT)

Talk:83Plus:OS:Ram Pages

2006-05-23T07:28:37Z

Jim e: page 83

Really I figure this is where we should decide what pages should be temporary and what could be long term. Also, if any current programs use ram pages we should claim them and possible leave some kinda of marker on the page it self. Last is to find out when tios uses these pages. --[[User:Jim e|Jim e]] 20:14, 24 March 2006 (PST)
:Anyone know what pages emu8x uses.--[[User:Jim e|Jim e]] 00:49, 25 March 2006 (PST)

== usb ==

There is definitely USB code that accesses some of the other RAM pages, but I haven't traced to see if/when it's called. I would guess it's for receiving bulk data or something along those lines. And it's also completely possible that it's never actually used by the OS, but it's something to look in to. --[[User:Dan Englender|Dan Englender]] 21:52, 24 March 2006 (PST)

:The OS has at least the capability to receive both raw and virtual packets to either the main RAM or pages 82-83 (there are separate flags, I don't remember which ones, for "write raw packets to 82-83" and "write virtual packets to 82-83.") Precisely when it does so I don't know. At any rate, during actual variable transmission I would make no assumptions about how much of those pages will be used. For ordinary silent stuff (screenshots, remote control if that exists) I'd guess that they are safe. [[User:FloppusMaximus|FloppusMaximus]] 11:39, 25 March 2006 (PST)

::I just did a simple test, it does seem to use page 83(no changes to 82). I sent a large app then checked to see if 83 was alter, it was. It contained the first page of the app I had sent. I was even able to execute my app with a simple program (3E83D306C38040). It maybe reasonable to assume that only 83 is used for such transfers, being that the os makes it a point to strike out some of what would be the header of the app.--[[User:Jim e|Jim e]] 18:36, 25 March 2006 (PST)

== page 83 ==

"4000h through 4080h"
I'm not certain that is correct. I don't see an any indicator that suggest that entire block is used, rather only the would be pages for application use. If it was though that would suggest that an OS page could bcall into an app, which, upon first inspection of 2.40, would require an OS update. I'll leave as is though because I'm not absolutely certain. Someone more OS savvy should be more thorough.--[[User:Jim e|Jim e]] 00:28, 23 May 2006 (PDT)

83Plus:Ports:0D

2006-03-31T08:25:10Z

Jim e: Just realized the original example code was laughable.

[[Category:83Plus:Ports:By_Address|0D - Link Assist Output Buffer]] [[Category:83Plus:Ports:By_Name|Link Assist Output Buffer]]
== Synopsis ==
'''Port Number:''' 0Dh

'''Function:''' Link Assist Output Buffer

This port allows you to write data to be sent by the link assist.

=== Read Values ===
''None''

=== Write Values ===
* [00h - FFh]: The byte to be written

== Comments ==
This port only exists on the 83+ SE and the 84+.

Check [[83Plus:Ports:09|port 9]] before you write this port, to be sure that the assist is ready.

== Example ==
SendByteSE:
ld b,a
WaitToSend:
in a,[[83Plus:Ports:04|(4)]]
and 8
jr z,LinkError
in a,[[83Plus:Ports:09|(9)]]
bit 5,a
jr nz,SendByteSE_OK
bit 6,a
jr z,WaitToSend
LinkError:
scf
ret
SendByteSE_OK:
ld a,b
out (0Dh),a
or a
ret

== Credits and Contributions ==
* '''Michael Vincent:''' Original documentation of the link assist

Talk:83Plus:OS:Ram Pages

2006-03-26T02:36:12Z

Jim e: 83 used.

Talk:83Plus:OS:Ram Pages

2006-03-25T08:49:11Z

Jim e: Emu8x?

83Plus:OS:Ram Pages

2006-03-25T08:46:44Z

Jim e: Add virtual calc and restore mem

[[Category:83Plus:OS_Information|Ram Pages]]

This is to mark what ram pages may be used for short term or long term use.

'''80'''
* Default for TIOS at C000h
* Execution protected

'''81'''
* Default for TIOS at 8000h

'''82'''
* Not used by TIOS under typical execution
* Execution protected

'''83'''
* 84+(se) overwrites data at 4008h through 4069h with bytes 08-69 at least prior to app execution.
* 3rd Party Uses
** Temporary swap for Virtual Calc by Michael Vincent
** Temporary code execution for Real Sound by James Montelongo

'''84'''
* Not used by TIOS under typical execution
* Execution protected
* 3rd Party Uses
** Long term use for Virtual Calc by Michael Vincent

'''85'''
* Not used by TIOS under typical execution
* 3rd Party Uses
** Long term use for Virtual Calc by Michael Vincent

'''86'''
* Not used by TIOS under typical execution
* Execution protected
* 3rd Party Uses
** Long term use for Restore Mem by Michael Vincent

'''87'''
* Not used by TIOS under typical execution
* 3rd Party Uses
** Long term use for Restore Mem by Michael Vincent

Talk:83Plus:OS:Ram Pages

2006-03-25T04:14:18Z

Jim e: some talk.

83Plus:OS:Ram Pages

2006-03-25T04:10:49Z

Jim e: I created this page for ram page claiming.

[[Category:83Plus:OS_Information|Ram Pages]]

This is to mark what ram pages may be used for short term or long term use.

'''80'''
* Defualt for TIOS at C000h
* Execution protected

'''81'''
* Defualt for TIOS at 8000h

'''82'''
* Not used by TIOS under typical execution
* Execution protected

'''83'''
* 84+(se) overwrites data at 4008h through 4069h with bytes 08-69 atleast prior to app execution.

'''84'''
* Not used by TIOS under typical execution
* Execution protected

'''85'''
* Not used by TIOS under typical execution

'''86'''
* Not used by TIOS under typical execution
* Execution protected

'''87'''
* Not used by TIOS under typical execution

83Plus:Ports:04

2006-03-16T15:34:35Z

Jim e: Note on timers

[[Category:83Plus:Ports:By_Address|04 - Memory Map / Interrupt]] [[Category:83Plus:Ports:By_Name|Memory Map / Interrupt]]
== Synopsis ==
'''Port Number:''' 04h

'''Function:''' Interrupting Device Identification and Memory Map Control

This port serves two purposes. When read it indicates the device that triggered an interrupt. When written it sets the memory map mode and hardware timer speed.

=== Read Values ===
* Bits 0~2 and 4~7 are set according to which device triggered the running interrupt.
** Bit 0: Set if pressing the ON Key triggered the interrupt.
** Bit 1: Set if the first hardware timer triggered the interrupt.
** Bit 2: Set if the second hardware timer triggered the interrupt.
** Bit 4: Link activity generated an interrupt.
** '''83+SE / 84+ only:''' Bit 5: First crystal timer has expired.
** '''83+SE / 84+ only:''' Bit 6: Second crystal timer has expired.
** '''83+SE / 84+ only:''' Bit 7: Third crystal timer has expired.
* Bit 3 is reset if the ON key is being pressed, set otherwise.

=== Write Values ===
* Bit 0 reset to select memory map mode 0. In mode 0 the RAM and ROM is mapped to CPU memory as follows:
** Address 0000h ~ 3FFFh: ROM Page 0
** Address 4000h ~ 7FFFh: Memory Bank A (Page selected in [[83Plus:Ports:06|Port 06h]])
** Address 8000h ~ BFFFh: Memory Bank B (Page selected in [[83Plus:Ports:07|Port 07h]])
** '''83+ Basic''': Address C000h ~ FFFFh: RAM Page 0
** '''Everything else''': Address C000h ~ FFFFh: Page selected in [[83Plus:Ports:05|Port 05h]]
* Bit 0 set to select memory map mode 1. In mode 1 the RAM and ROM is mapped to CPU memory as follows:
** Address 0000h ~ 3FFFh: ROM Page 0
** Address 4000h ~ 7FFFh: RAM Page 0
** Address 8000h ~ BFFFh: Memory Bank A (Page selected in [[83Plus:Ports:06|Port 06h]])
** Address C000h ~ FFFFh: Memory Bank B (Page selected in [[83Plus:Ports:07|Port 07h]])
* Bits 1 and 2 control the hardware timer frequency. Setting both 0 sets the timer to the fastest speed, and both 1 is the slowest speed. The normal speed is with both bits 1.
{| width="90%" border="1" cellpadding="2" cellspacing="0" align="center" style="text-align: center"
|+Frequency (Hz)
|-
! 
!colspan="2"|first timer
!colspan="2"|second timer
!colspan="2"|both enabled
|-
!value
!width="15%"|83+
!width="15%"|83+SE 84+(SE)
!width="15%"|83+
!width="15%"|83+SE 84+(SE)
!width="15%"|83+
!width="15%"|83+SE 84+(SE)
|-
!00
|560||512||1120||1024||1680||1536
|-
!01
|248||227||497||455||746||682
|-
!10
|170||156||344||315||517||473
|-
!11
|118||108||236||216||353||323
|}
* Bits 4~6 should be 1 on the 83+ and 83+SE, and 0 on the 84+ and 84+SE.

== Comments ==
The calculator uses mode 0 for normal operation. If you change the memory map mode be sure to change it back before returning control.
Also, do not switch from mode 0 to mode 1 inside the 4000h ~ 7FFFh range, as it will basically crash the calculator because RAM Page 0 will take over that section and RAM Page 0 cannot execute code.

Interrupt timers seem to be independant of the CPU speed, so setting an SE calculator to 15mhz will not increase the timer frequency.

== Example ==
This example shows successful use of this port, switching to mode 1 and back. Mode 1 is the only way to execute code beyond address C000h on the 83+ Basic. (Assumes code is running from 4000h (i.e. an application))
<nowiki> in a, (7) ;Save current Bank B page because we'll trash it.
push af
in a,(6) ;Put this app's page into 8000
out (7), a
jp $ + 4003h ;This will actually jump to the next statement, but in Bank B.
ld a, 77h ;Select mode 1 and keep the timer speed at normal...
out (4), a ;Now we're in mode 1.
;We're still at 8000h here but we are back in Bank A.
;Now to go back.
ld a, 76h ;I could dec a for this example, but...
out (4), a ;Back in mode 0 and bank B.
jp $ - 3FFDh ;Jump back to bank A.
pop af
out (7), a ;Restore bank B.</nowiki>

== Credits and Contributions ==
* '''Dan Englender''': Originally documented memory map modes [http://www.detachedsolutions.com/forum/viewtopic.php?p=21593#21593 here]
* '''Michael Vincent''': For his docs [http://www.michaelv.org/programs/calcs/ports/port4.html here], which helped me figure out the interrupt device bits.
* '''James Montelongo''': For his docs [http://www.geocities.com/jimm09876/calc/port4.html here] on the hardware timer.

83Plus:Ports:05

2006-03-15T18:34:12Z

Jim e: Renamed(Seems to long), revert if you disagree

[[Category:83Plus:Ports:By_Address|05 - RAM Page(SE) - Port 16 Config/Link Assist(83+)]] [[Category:83Plus:Ports:By_Name|RAM Page(SE) - Port 16 Config/Link Assist(83+)]]
== Synopsis (TI-83 Plus S.E. and TI-84 Plus Family) ==
'''Port Number:''' 05h

'''Function:''' RAM Paging Port

This port can be used to control what RAM page is paged into the C000h-FFFFh memory bank. Note that it can only page RAM pages, not flash pages.

=== Read Values ===
Returns the current RAM pages.

=== Write Values ===
Sets the current RAM page, by giving a value in 00h-07h, inclusive. When you work with the other paging ports, RAM pages are given in 80h-87h, but this port does not need bit 7 to be set. You cannot set the upper four bits.

== Synopsis (TI-83 Plus) ==
'''Port Number:''' 05h

'''Function:''' [[83Plus:Ports:16|Port 16h]] Configuration Port/Link Assist Read

This port configures which memory pages are locked or unlocked (i.e. whether or not the PC register is allowed to point within the page) by port 16h. Only bits 0..2 are considered, the rest have no effect. Also, this port is used to read the last byte the link assist received.

=== Read Values ===
The last byte received by the link assist (see [[83Plus:Ports:00|port 0]] for more information).

=== Write Values ===
Writing a set bit to 16h protects the page; writing a clear bit unprotects the page.

{|align="center" border="1" cellpadding="1" style="text-align: center"
!colspan=3|Port 05h Bit
!colspan=8|Port 16h Bit
|-
!2!!1!!0!!7!!6!!5!!4!!3!!2!!1!!0
|-
|0||0||0||ROM 0F||ROM 0E||ROM 0D||ROM 0C||ROM 0B||ROM 0A||ROM 09||ROM 08
|-
|0||0||1||ROM 17||ROM 16||ROM 15||ROM 14||ROM 13||ROM 12||ROM 11||ROM 10
|-
|0||1||0||X||X||X||X||ROM 1B||ROM 1A||ROM 19||ROM 18
|-
|1||1||1||X||X||RAM 01||X||X||X||X||RAM 00
|}

== Comments ==
At least on my TI-84+, if you output a value with bit 3 set, reading from the port will return a value with bit 3 set. This would imply that you can use RAM pages 08h-0Fh, but these RAM pages do not exist--this bit is simply ignored (only bits 0-2 actually determine what RAM page is active.)

== Credits and Contributions ==
* '''Michael Vincent:''' Initial documentation.
* '''Tijl Coosemans:''' Documenting TI-83 Plus functionality [http://www.kalimero.be/83phwinfo.txt here].

Talk:WikiTI Home

2006-03-14T14:25:13Z

Jim e:

Talk:WikiTI Home

2006-03-14T14:18:47Z

Jim e:

Talk:WikiTI Home

2006-03-14T14:07:44Z

Jim e: Wiki update

83Plus:Ports:29

2006-03-14T14:05:14Z

Jim e: added warning about lcd not updating.

[[Category:83Plus:Ports:By Address|29 - LCD Delay (6 MHz)]] [[Category:83Plus:Ports:By Name|LCD Delay (6 MHz)]]
{{SE-Only Port|01}}

== Synopsis ==
'''Port Number:''' 29h

'''Function:''' LCD Delay (6 MHz)

This port removes the amount of delay needed between accesses to the LCD driver by adding a delay to any instruction which reads from or writes to ports [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.

=== Usage ===
* Bit 0 enables the effects of the flash delay controlled by port 2E.
* Bit 1 enables the effects of the ram delay controlled by port 2E.
* Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added, divide the contents of port 29 by 4 and round off. '''NOTE:''' The contents of this port should NOT be less than 0Ch or the LCD will no longer update.

== Comments ==
This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of [[83Plus:Ports:01|Port 01h]].

Bits 0&1 are reset on the 83+SE and set on the 84+(se).

The effect of this port is only seen if the contents of [[83Plus:Ports:20|port 20h]] equals 00.

== Credits and Contributions ==
* '''Michael Vincent:''' Documentation as found [http://michaelv.org/programs/calcs/ports/port29.html here].
* '''James Montelongo:''' Documentation found at [http://www.geocities.com/jimm09876/calc/port29.html here].

83Plus:Ports:2C

2006-03-14T14:04:05Z

Jim e: added 2e info

[[Category:83Plus:Ports:By Address|2C - LCD Delay(15 MHz)(03)]] [[Category:83Plus:Ports:By Name|LCD Delay (15 MHz)(03)]]
{{SE-Only Port|04}}

== Synopsis ==
'''Port Number:''' 2Ch

'''Function:''' LCD Delay (15 MHz)(03)

This port works in the same manner 29 does, but only when the calculator is set at 15mhz and if port 20 equals 03. It removes the amount of delay needed between accesses to the lcd driver by adding a delay to any instruction which reads from or writes to ports [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.

=== Usage ===
* Bit 0 enables the effects of the flash delay controlled by port 2E.
* Bit 1 enables the effects of the ram delay controlled by port 2E.
* Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added divide the contents of port 2C by 4 and round off. '''NOTE:''' The contents of this port should NOT be less than 0Ch or the LCD will no longer update.

== Comments ==
This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of [[83Plus:Ports:04|Port 04h]].

The effect of this port is only seen if the contents of [[83Plus:Ports:20|port 20h]] equals 03.

== Credits and Contributions ==
* '''James Montelongo'''

83Plus:Ports:2B

2006-03-14T14:02:49Z

Jim e: added 2e info

[[Category:83Plus:Ports:By Address|2B - LCD Delay(15 MHz)(02)]] [[Category:83Plus:Ports:By Name|LCD Delay (15 MHz)(02)]]
{{SE-Only Port|03}}

== Synopsis ==
'''Port Number:''' 2Bh

'''Function:''' LCD Delay (15 MHz)(02)

This port works in the same manner 29 does, but only when the calculator is set at 15mhz and if port 20 equals 02. It removes the amount of delay needed between accesses to the lcd driver by adding a delay to any instruction which reads from or writes to ports [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.

=== Usage ===
* Bit 0 enables the effects of the flash delay controlled by port 2E.
* Bit 1 enables the effects of the ram delay controlled by port 2E.
*Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added divide the contents of port 2B by 4 and round off. '''NOTE:''' The contents of this port should NOT be less than 0Ch or the LCD will no longer update.

== Comments ==
This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of [[83Plus:Ports:03|Port 03h]].

The effect of this port is only seen if the contents of [[83Plus:Ports:20|port 20h]] equals 02.

== Credits and Contributions ==
* '''James Montelongo'''

83Plus:Ports:2A

2006-03-14T14:01:51Z

Jim e: added 2e info

[[Category:83Plus:Ports:By Address|2A - LCD Delay(15 MHz)]] [[Category:83Plus:Ports:By Name|LCD Delay (15 MHz)]]
{{SE-Only Port|02}}

== Synopsis ==
'''Port Number:''' 2Ah

'''Function:''' LCD Delay (15 MHz)

This port works in the same manner 29 does, but only when the calculator is set at 15mhz and if port 20 equals 01. It removes the amount of delay needed between accesses to the lcd driver by adding a delay to any instruction which reads from or writes to ports [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.

=== Usage ===
* Bit 0 enables the effects of the flash delay controlled by port 2E.
* Bit 1 enables the effects of the ram delay controlled by port 2E.
* Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added divide the contents of port 2A by 4 and round off. '''NOTE:''' The contents of this port should NOT be less than 0Ch or the LCD will no longer update.

== Comments ==
This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of [[83Plus:Ports:02|Port 02h]].

The effect of this port is only seen if the contents of [[83Plus:Ports:20|port 20h]] equals 01.

== Credits and Contributions ==
* '''Michael Vincent:''' Documentation as found [http://michaelv.org/programs/calcs/ports/port2a.html here].
* '''James Montelongo:''' Documentation found at [http://www.geocities.com/jimm09876/calc/port2a.html here].

83Plus:Ports:29

2006-03-14T14:00:00Z

Jim e: added 2e info

[[Category:83Plus:Ports:By Address|29 - LCD Delay (6 MHz)]] [[Category:83Plus:Ports:By Name|LCD Delay (6 MHz)]]
{{SE-Only Port|01}}

== Synopsis ==
'''Port Number:''' 29h

'''Function:''' LCD Delay (6 MHz)

This port removes the amount of delay needed between accesses to the LCD driver by adding a delay to any instruction which reads from or writes to ports [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.

=== Usage ===
* Bit 0 enables the effects of the flash delay controlled by port 2E.
* Bit 1 enables the effects of the ram delay controlled by port 2E.
* Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added, divide the contents of port 29 by 4 and round off.

== Comments ==
This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of [[83Plus:Ports:01|Port 01h]].

Bits 0&1 are reset on the 83+SE and set on the 84+(se).

The effect of this port is only seen if the contents of [[83Plus:Ports:20|port 20h]] equals 00.

== Credits and Contributions ==
* '''Michael Vincent:''' Documentation as found [http://michaelv.org/programs/calcs/ports/port29.html here].
* '''James Montelongo:''' Documentation found at [http://www.geocities.com/jimm09876/calc/port29.html here].

83:RAM:8E29

2006-03-13T20:38:15Z

Jim e:

[[Category:83:RAM:By_Address|8E29 - plotSScreen]] [[Category:83:RAM:By_Name|plotSScreen]]
== Synopsis ==
'''Official Name:''' plotSScreen

'''Memory Address:''' 8E29h

'''Length:''' 768 bytes.

This area of memory stores the contents of the graph screen.

83:RAM:8039

2006-03-13T12:09:15Z

Jim e:

[[Category:83:RAM:By_Address|8039 - OP Registers]] [[Category:83:RAM:By_Name|OP Registers]]
== Synopsis ==
'''Official Name:''' OP Registers

'''Memory Address:''' 8039h

'''Length:''' 66 bytes

In this RAM area the value of op1 to op6 is stored, each "register" getting 11 bytes.

'''OP Equates:'''
<nowiki>OP1 EQU 8039h
OP2 EQU 8044h
OP3 EQU 804Fh
OP4 EQU 805Ah
OP5 EQU 8065h
OP6 EQU 8070h</nowiki>

83:RAM:8E29

2006-03-13T12:08:48Z

Jim e: