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83Plus:OS:Memory Layout

2020-12-09T18:36:29Z

NonstickAtom: Fixed the memory layout to show that $FFFF is a scrap byte.

[[Category:83Plus:OS Information|Memory Layout]]
== Memory Layout ==
This table describes how the RAM is organized.

<table border="1" cellspacing="0" cellpadding="2">
<tr><th>Address</th><th>Description</th></tr>

<tr><td>[[83Plus:RAM:8000|appData]] to [[83Plus:RAM:9D95|userMem]]-1</td>
<td>System RAM: Used by the OS to store various pointers, settings, buffers, etc.</td></tr>

<tr><td>[[83Plus:RAM:9D95|userMem]] to ([[83Plus:RAM:9820|tempMem]])-1</td>
<td>User Memory: This is where all variables are stored.</td></tr>

<tr><td>([[83Plus:RAM:9820|tempMem]]) to ([[83Plus:RAM:9822|FPBase]])-1</td>
<td>Temp Memory: This is where the OS stores temporary variables.</td></tr>

<tr><td>([[83Plus:RAM:9822|FPBase]]) to ([[83Plus:RAM:9824|FPS]])-1</td>
<td>Floating Point Stack: A LIFO stack for floating point number (or variable names).</td></tr>

<tr><td>([[83Plus:RAM:9824|FPS]]) to ([[83Plus:RAM:9828|OPS]])</td>
<td>Free RAM.</td></tr>

<tr><td>([[83Plus:RAM:9828|OPS]])+1 to ([[83Plus:RAM:9826|OPBase]])</td>
<td>Operator Stack: A LIFO stack used to parse expressions and to store return information when a TI-Basic program is called from another TI-Basic program. TI won't tell anything about this.</td></tr>

<tr><td>([[83Plus:RAM:9826|OPBase]])+1 to ([[83Plus:RAM:982E|pTemp]])</td>
<td>Variable Allocation Table (VAT) for temporary variables.</td></tr>

<tr><td>([[83Plus:RAM:982E|pTemp]])+1 to ([[83Plus:RAM:9830|progPtr]])</td>
<td>Variable Allocation Table (VAT) for programs,appvars,groups and lists with variable length names.</td></tr>

<tr><td>([[83Plus:RAM:9830|progPtr]])+1 to [[83Plus:RAM:FE66|symTable]]</td>
<td>Variable Allocation Table (VAT) for all variables with a fixed name: reals, strings, ans, functions, matrices, etc.</td></tr>

<tr><td>[[83Plus:RAM:FE66|symTable]]+1 to $FFFE</td>
<td>Hardware Stack</td></tr>
</table>
the_mad_joob found that $FFFF is unused by the system. It is an extra scrap byte.

Z80 Instruction Set

2020-12-09T18:33:12Z

NonstickAtom:

== Legend ==
{| border="1" cellspacing="0" cellpadding="2"
! Notation !! Meaning !! Respective opcode bits
|-
| A || 16-bit address or immediate || alalalal ahahahah
|-
| B || Bit number: 0..7 || bbb = 000..111
|-
| C || Condition: nz, z, nc, c, po, pe, p, m || ccc = 000, 001, 010, 011, 100, 101, 110, 111
|-
| D || 8-bit signed relative offset || dddddddd
|-
| E || 16-bit relative address || dddddddd (E minus address of next instruction)
|-
| I || Index register: ix, iy || i = 0, 1
|-
| J || Half index register: ixh, ixl, iyh, iyl || (i, b) = (0, 0), (0, 1), (1, 0), (1, 1)
|-
| N || 8-bit immediate || nnnnnnnn
|-
| P || 16-bit register pair: bc, de, hl, af || pp = 00, 01, 10, 11
|-
| Q || 16-bit register: bc, de, hl/ix/iy, sp || qq = 00, 01, 10, 11
|-
| R || 8-bit general purpose register: a, b, c, d, e, h, l || rrr (or sss) = 111, 000, 001, 010, 011, 100, 101
|-
| S || Restart address: 0x00, 0x08,..., 0x38 || sss = 000, 001,..., 111
|}

=== Flags ===
* - = no change
* + = change by definition (if noted, by the operation marked with '=> flags', otherwise by the only non-single-bit operation):
** S = sign, bit 7 of the result byte (accumulator or high byte for 16-bit operations)
** Z = zero, set if the result is zero (8 or 16-bit value)
** X = undocumented, bit 5 of the result byte
** H = half-carry, the carry (theoretical bit 4) of the low nibble of the result byte
** Y = undocumented, bit 3 of the result byte
** P = parity (set if the result byte has an even number of bits set) or overflow (set when crossing the boundary of the signed range); always specified
** N = negative, set if the previous operation was a subtraction; always specified
** C = carry, the theoretical bit 8 of the result byte
* 0 = always reset
* 1 = always set
* X = change described under Effect
* P = parity (only for the parity flag)
* V = overflow (only for the parity flag)
* A = OR with the respective bit of the accumulator
* C = set if the counter (bc) is nonzero after decrementing

=== Miscellaneous ===
* () = indirection
* (()) = I/O port
* [] = operator precedence (to avoid confusion with indirection)
* E.B = the Bth bit of the value of expression E
* * = any bit value (0 or 1)
* memptr = an internal 16-bit register connected to 16-bit operations
* tmp, tmp2 = temporary storage whose value is thrown away after each instruction

== Reference ==
{| border="1" cellspacing="0" cellpadding="2"
! Instruction:''A'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf
|-
| adc a,J || <tt>11i11101 1000110b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J + cf
|-
| adc a,N || <tt>11001110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N + cf
|-
| adc a,(hl) || <tt>10001110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl) + cf
|-
| adc a,(I+D) || <tt>11i11101 10001110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D) + cf
|-
| adc hl,Q || <tt>11101101 01qq1010</tt> || 15 || + || + || + || + || + || V || 0 || + || hl += Q + cf
|-
| add a,R || <tt>10000rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R
|-
| add a,J || <tt>11i11101 1000010b</tt> || 8 || + || + || + || + || + || V || 0 || + || a += J
|-
| add a,N || <tt>11000110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 0 || + || a += N
|-
| add a,(hl) || <tt>10000110</tt> || 7 || + || + || + || + || + || V || 0 || + || a += (hl)
|-
| add a,(I+D) || <tt>11i11101 10000110 dddddddd</tt> || 19 || + || + || + || + || + || V || 0 || + || a += (I+D)
|-
| add hl,Q || <tt>00qq1001</tt> || 11 || - || - || + || + || + || - || 0 || + || hl += Q
|-
| add I,Q || <tt>11i11101 00qq1001</tt> || 15 || - || - || + || + || + || - || 0 || + || I += Q
|-
| and R || <tt>10100rrr</tt> || 4 || + || + || + || 1 || + || P || 0 || 0 || a := a AND R
|-
| and J || <tt>11i11101 1010010b</tt> || 8 || + || + || + || 1 || + || P || 0 || 0 || a := a AND J
|-
| and N || <tt>11100110 nnnnnnnn</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND N
|-
| and (hl) || <tt>10100110</tt> || 7 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (hl)
|-
| and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)
|-
! Instruction:''B'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B]
|-
| bit B,(hl) || <tt>11001011 01bbb110</tt> || 12 || + || + || X || 1 || X || P || 0 || - || tmp := (hl) AND [1 << B], xf := memptr.13, yf := memptr.11
|-
| bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B], xf := [I+D].13, yf := [I+D].11
|-
! Instruction:''C'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A
|-
| call C,A || <tt>11ccc100 alalalal ahahahah</tt> || 17/10 || - || - || - || - || - || - || - || - || if C then sp -= 2, (sp) := pc, pc := A
|-
| ccf || <tt>00111111</tt> || 4 || - || - || A || X || A || - || 0 || X || hf := cf, cf := ~cf
|-
| cp R || <tt>10111rrr</tt> || 4 || + || + || X || + || X || V || 1 || + || tmp := a - R, xf := R.5, yf = R.3
|-
| cp J || <tt>11i11101 1011110b</tt> || 8 || + || + || X || + || X || V || 1 || + || tmp := a - J, xf := J.5, yf = J.3
|-
| cp N || <tt>11111110 nnnnnnnn</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - N, xf := N.5, yf = N.3
|-
| cp (hl) || <tt>10111110</tt> || 7 || + || + || X || + || X || V || 1 || + || tmp := a - (hl), xf := (hl).5, yf = (hl).3
|-
| cp (I+D) || <tt>11i11101 10111110 dddddddd</tt> || 19 || + || + || X || + || X || V || 1 || + || tmp := a - (I+D), xf := (I+D).5, yf = (I+D).3
|-
| cpd || <tt>11101101 10101001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl -= 1, xf := [tmp - hf].1, yf = [tmp - hf].3
|-
| cpdr || <tt>11101101 10111001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpd, if bc <> 0 and nz then pc -= 2
|-
| cpi || <tt>11101101 10100001</tt> || 16 || + || + || X || + || X || C || 1 || - || tmp := a - (hl) => flags, bc -= 1, hl += 1, xf := [tmp - hf].1, yf = [tmp - hf].3
|-
| cpir || <tt>11101101 10110001</tt> || 21/16 || + || + || X || + || X || C || 1 || - || cpi, if bc <> 0 and nz then pc -= 2
|-
| cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a
|-
! Instruction:''D'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a, if nf then  if hf or [a AND 0x0f > 9] then tmp -= 0x06  if cf or [a > 0x99] then tmp -= 0x60 else  if hf or [a AND 0x0f > 9] then tmp += 0x06  if cf or [a > 0x99] then tmp += 0x60 endif, tmp => flags, cf := cf OR [a > 0x99], hf := a.4 XOR tmp.4, a := tmp
|-
| dec R || <tt>00rrr101</tt> || 4 || + || + || + || + || + || V || 1 || - || R -= 1
|-
| dec J || <tt>11i11101 0010b101</tt> || 8 || + || + || + || + || + || V || 1 || - || J -= 1
|-
| dec (hl) || <tt>00110101</tt> || 11 || + || + || + || + || + || V || 1 || - || (hl) -= 1
|-
| dec (I+D) || <tt>11i11101 00110101 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || - || (I+D) -= 1
|-
| dec Q || <tt>00qq1011</tt> || 6 || - || - || - || - || - || - || - || - || Q -= 1
|-
| dec I || <tt>11i11101 00101011</tt> || 10 || - || - || - || - || - || - || - || - || I -= 1
|-
| di || <tt>11110011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 0, iff2 := 0
|-
| djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E
|-
! Instruction:''E'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction
|-
| ex (sp),hl || <tt>11100011</tt> || 19 || - || - || - || - || - || - || - || - || (sp) <=> hl
|-
| ex (sp),I || <tt>11i11101 11100011</tt> || 23 || - || - || - || - || - || - || - || - || (sp) <=> I
|-
| ex af,af' || <tt>00001000</tt> || 4 || X || X || X || X || X || X || X || X || af <=> af'
|-
| ex de,hl || <tt>11101011</tt> || 4 || - || - || - || - || - || - || - || - || de <=> hl
|-
| exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'
|-
! Instruction:''H'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt
|-
! Instruction:''I'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus
|-
| im 1 || <tt>11101101 01*10110</tt> || 8 || - || - || - || - || - || - || - || - || mode 1: execute rst $38
|-
| im 2 || <tt>11101101 01*11110</tt> || 8 || - || - || - || - || - || - || - || - || mode 2: call (i * 256 + byte on bus)
|-
| in a,(N) || <tt>11011011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || a := ((N))
|-
| in R,(c) || <tt>11101101 01rrr000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || R := ((c))
|-
| in f,(c) || <tt>11101101 01110000</tt> || 12 || + || + || + || 0 || + || P || 0 || - || tmp := ((c))
|-
| inc R || <tt>00rrr100</tt> || 4 || + || + || + || + || + || V || 0 || - || R += 1
|-
| inc J || <tt>11i11101 0010b100</tt> || 8 || + || + || + || + || + || V || 0 || - || J += 1
|-
| inc (hl) || <tt>00110100</tt> || 11 || + || + || + || + || + || V || 0 || - || (hl) += 1
|-
| inc (I+D) || <tt>11i11101 00110100 dddddddd</tt> || 23 || + || + || + || + || + || V || 0 || - || (I+D) += 1
|-
| inc Q || <tt>00qq0011</tt> || 6 || - || - || - || - || - || - || - || - || Q += 1
|-
| inc I || <tt>11i11101 00100011</tt> || 10 || - || - || - || - || - || - || - || - || I += 1
|-
| ind || <tt>11101101 10101010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl -= 1, b -= 1 => flags, nf := tmp.7, tmp2 = tmp + [[c - 1] AND 0xff], pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| indr || <tt>11101101 10111010</tt> || 21/16 || + || + || + || X || + || X || X || X || ind, if b <> 0 then pc -= 2
|-
| ini || <tt>11101101 10100010</tt> || 16 || + || + || + || X || + || X || X || X || tmp := ((c)), (hl) := tmp, hl += 1, b -= 1 => flags, nf := tmp.7, tmp2 := tmp + [[c + 1] AND 0xff], pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2
|-
! Instruction:''J'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A
|-
| jp (hl) || <tt>11101001</tt> || 4 || - || - || - || - || - || - || - || - || pc := hl
|-
| jp (I) || <tt>11i11101 11101001</tt> || 8 || - || - || - || - || - || - || - || - || pc := I
|-
| jp C,A || <tt>11ccc010 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || if C then pc := A
|-
| jr E || <tt>00011000 dddddddd</tt> || 12 || - || - || - || - || - || - || - || - || pc := E
|-
| jr nz,E || <tt>00100000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nz then pc := E
|-
| jr z,E || <tt>00101000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if zf then pc := E
|-
| jr nc,E || <tt>00110000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if nc then pc := E
|-
| jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E
|-
! Instruction:''L'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2
|-
| ld R,J || <tt>11i11101 01rrr10b</tt> || 8 || - || - || - || - || - || - || - || - || R := J
|-
| ld J,R || <tt>11i11101 0110brrr</tt> || 8 || - || - || - || - || - || - || - || - || J := R
|-
| ld ixh,ixl || <tt>11011101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || ixh := ixl
|-
| ld ixl,ixh || <tt>11011101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || ixl := ixh
|-
| ld iyh,iyl || <tt>11111101 01100101</tt> || 8 || - || - || - || - || - || - || - || - || iyh := iyl
|-
| ld iyl,iyh || <tt>11111101 01101100</tt> || 8 || - || - || - || - || - || - || - || - || iyl := iyh
|-
| ld R,N || <tt>00rrr110 nnnnnnnn</tt> || 7 || - || - || - || - || - || - || - || - || R := N
|-
| ld R,(hl) || <tt>01rrr110</tt> || 7 || - || - || - || - || - || - || - || - || R := (hl)
|-
| ld R,(I+D) || <tt>11i11101 01rrr110 dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || R := (I+D)
|-
| ld (hl),R || <tt>01110rrr</tt> || 7 || - || - || - || - || - || - || - || - || (hl) := R
|-
| ld (hl),N || <tt>00110110 nnnnnnnn</tt> || 10 || - || - || - || - || - || - || - || - || (hl) := N
|-
| ld (I+D),R || <tt>11i11101 01110rrr dddddddd</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := R
|-
| ld (I+D),N || <tt>11i11101 00110110 dddddddd nnnnnnnn</tt> || 19 || - || - || - || - || - || - || - || - || (I+D) := N
|-
| ld a,(bc) || <tt>00001010</tt> || 7 || - || - || - || - || - || - || - || - || a := (bc)
|-
| ld a,(de) || <tt>00011010</tt> || 7 || - || - || - || - || - || - || - || - || a := (de)
|-
| ld a,(A) || <tt>00111010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || a := (A)
|-
| ld (bc),a || <tt>00000010</tt> || 7 || - || - || - || - || - || - || - || - || (bc) := a
|-
| ld (de),a || <tt>00010010</tt> || 7 || - || - || - || - || - || - || - || - || (de) := a
|-
| ld (A),a || <tt>00110010 alalalal ahahahah</tt> || 13 || - || - || - || - || - || - || - || - || (A) := a
|-
| ld i,a || <tt>11101101 01000111</tt> || 9 || - || - || - || - || - || - || - || - || i := a
|-
| ld r,a || <tt>11101101 01001111</tt> || 9 || - || - || - || - || - || - || - || - || r := a
|-
| ld a,i || <tt>11101101 01010111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := i, pf := iff2
|-
| ld a,r || <tt>11101101 01011111</tt> || 9 || + || + || + || 0 || + || X || 0 || - || a := r, pf := iff2
|-
| ld Q,A || <tt>00qq0001 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || Q := A
|-
| ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A
|-
| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [ld hl,(A) has a faster non-prefixed duplicate, see below.]
|-
| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 16 || - || - || - || - || - || - || - || - || hl := (A)
|-
| ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)
|-
| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [ld (A),hl has a faster non-prefixed duplicate, see below.]
|-
| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 16 || - || - || - || - || - || - || - || - || (A) := hl
|-
| ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I
|-
| ld sp,hl || <tt>11111001</tt> || 6 || - || - || - || - || - || - || - || - || sp := hl
|-
| ld sp,I || <tt>11i11101 11111001</tt> || 10 || - || - || - || - || - || - || - || - || sp := I
|-
| ldd || <tt>11101101 10101000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de -= 1, hl -= 1, bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3
|-
| lddr || <tt>11101101 10111000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldd, if bc <> 0 then pc -= 2
|-
| ldi || <tt>11101101 10100000</tt> || 16 || - || - || X || 0 || X || C || 0 || - || tmp := (hl), (de) := tmp, de += 1, hl += 1, bc -= 1, xf := [tmp + a].1, yf = [tmp + a].3
|-
| ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2
|-
! Instruction:''N'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a
|-
| nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing
|-
! Instruction:''O'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R
|-
| or J || <tt>11i11101 1011010b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a OR J
|-
| or N || <tt>11110110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR N
|-
| or (hl) || <tt>10110110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (hl)
|-
| or (I+D) || <tt>11i11101 10110110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a OR (I+D)
|-
| out (N),a || <tt>11010011 nnnnnnnn</tt> || 11 || - || - || - || - || - || - || - || - || ((N)) := a
|-
| out (c),R || <tt>11101101 01rrr001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := R
|-
| out (c),0 || <tt>11101101 01110001</tt> || 12 || - || - || - || - || - || - || - || - || ((c)) := ? (seems to vary with CPU)
|-
| outd || <tt>11101101 10101011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl -= 1, b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l, pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| otdr || <tt>11101101 10111011</tt> || 21/16 || + || + || + || X || + || X || X || X || outd, if b <> 0 then pc -= 2
|-
| outi || <tt>11101101 10100011</tt> || 16 || + || + || + || X || + || X || X || X || tmp := (hl), ((c)) := tmp, hl += 1, b -= 1 => flags, nf := tmp.7, tmp2 = tmp + l, pf := parity of [[tmp2 AND 0x07] XOR b], hf := cf := tmp2 > 255
|-
| otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2
|-
! Instruction:''P'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2
|-
| pop I || <tt>11i11101 11100001</tt> || 14 || - || - || - || - || - || - || - || - || I := (sp), sp += 2
|-
| push P || <tt>11pp0101</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := P
|-
| push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I
|-
! Instruction:''R'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]
|-
| res B,(hl) || <tt>11001011 10bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) AND ~[1 << B]
|-
| res B,(I+D) || <tt>11i11101 11001011 dddddddd 10bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) AND ~[1 << B]
|-
| res B,(I+D)->R || <tt>11i11101 11001011 dddddddd 10bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) AND ~[1 << B]
|-
| ret || <tt>11001001</tt> || 10 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2
|-
| ret C || <tt>11ccc000</tt> || 11/5 || - || - || - || - || - || - || - || - || if C then pc := (sp), sp += 2
|-
| reti || <tt>11101101 01**1101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2
|-
| retn || <tt>11101101 01**0101</tt> || 14 || - || - || - || - || - || - || - || - || pc := (sp), sp += 2, iff1 := iff2
|-
| rla || <tt>00010111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.7, a := [a << 1] + ocf
|-
| rl R || <tt>11001011 00010rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.7, R := [R << 1] + ocf
|-
| rl (hl) || <tt>11001011 00010110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf
|-
| rl (I+D) || <tt>11i11101 11001011 dddddddd 00010110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7, (I+D) := [(I+D) << 1] + ocf
|-
| rl (I+D)->R || <tt>11i11101 11001011 dddddddd 00010rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).7, (I+D) := R := [(I+D) << 1] + ocf
|-
| rlca || <tt>00000111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.7, a := [a << 1] + cf
|-
| rlc R || <tt>11001011 00000rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + cf
|-
| rlc (hl) || <tt>11001011 00000110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + cf
|-
| rlc (I+D) || <tt>11i11101 11001011 dddddddd 00000110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + cf
|-
| rlc (I+D)->R || <tt>11i11101 11001011 dddddddd 00000rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + cf
|-
| rld || <tt>11101101 01101111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp, a := [a AND 0xf0] + [tmp >> 8] => flags
|-
| rra || <tt>00011111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]
|-
| rr R || <tt>11001011 00011rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := R.0, R := [R >> 1] + [ocf << 7]
|-
| rr (hl) || <tt>11001011 00011110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (hl).0, (hl) := [(hl) >> 1] + [ocf << 7]
|-
| rr (I+D) || <tt>11i11101 11001011 dddddddd 00011110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0, (I+D) := [(I+D) >> 1] + [ocf << 7]
|-
| rr (I+D)->R || <tt>11i11101 11001011 dddddddd 00011rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || ocf := cf, cf := (I+D).0, (I+D) := R := [(I+D) >> 1] + [ocf << 7]
|-
| rrca || <tt>00001111</tt> || 4 || - || - || + || 0 || + || - || 0 || X || cf := a.0, a := [a >> 1] + [cf << 7]
|-
| rrc R || <tt>11001011 00001rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := [R >> 1] + [cf << 7]
|-
| rrc (hl) || <tt>11001011 00001110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]
|-
| rrc (I+D) || <tt>11i11101 11001011 dddddddd 00001110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := [(I+D) >> 1] + [cf << 7]
|-
| rrc (I+D)->R || <tt>11i11101 11001011 dddddddd 00001rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := [(I+D) >> 1] + [cf << 7]
|-
| rrd || <tt>11101101 01100111</tt> || 18 || + || + || + || 0 || + || P || 0 || - || tmp := (hl), (hl) := [tmp >> 4] + [[a AND 0x0f] << 4], a := [a AND 0xf0] + [tmp AND 0x0f] => flags
|-
| rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S
|-
! Instruction:''S'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf
|-
| sbc a,J || <tt>11i11101 1001110b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J + cf
|-
| sbc a,N || <tt>11011110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N + cf
|-
| sbc a,(hl) || <tt>10011110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl) + cf
|-
| sbc a,(I+D) || <tt>11i11101 10011110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D) + cf
|-
| sbc hl,Q || <tt>11101101 01qq0010</tt> || 15 || + || + || + || + || + || V || 1 || + || hl -= Q + cf
|-
| scf || <tt>00110111</tt> || 4 || - || - || A || 0 || A || - || 0 || 1 || nothing else
|-
| set B,R || <tt>11001011 11bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R OR [1 << B]
|-
| set B,(hl) || <tt>11001011 11bbb110</tt> || 15 || - || - || - || - || - || - || - || - || (hl) := (hl) OR [1 << B]
|-
| set B,(I+D) || <tt>11i11101 11001011 dddddddd 11bbb110</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := (I+D) OR [1 << B]
|-
| set B,(I+D)->R || <tt>11i11101 11001011 dddddddd 11bbbrrr</tt> || 23 || - || - || - || - || - || - || - || - || (I+D) := R := (I+D) OR [1 << B]
|-
| sla R || <tt>11001011 00100rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := R << 1
|-
| sla (hl) || <tt>11001011 00100110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := (hl) << 1
|-
| sla (I+D) || <tt>11i11101 11001011 dddddddd 00100110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := (I+D) << 1
|-
| sla (I+D)->R || <tt>11i11101 11001011 dddddddd 00100rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := (I+D) << 1
|-
| sra R || <tt>11001011 00101rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1, R.7 := R.6
|-
| sra (hl) || <tt>11001011 00101110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6
|-
| sra (I+D) || <tt>11i11101 11001011 dddddddd 00101110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1, (I+D).7 := (I+D).6
|-
| sra (I+D)->R || <tt>11i11101 11001011 dddddddd 00101rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).0, tmp := (I+D) >> 1, tmp.7 := tmp.6 (I+D) := R := tmp
|-
| sll R || <tt>11001011 00110rrr</tt> || 8 || + || + || + || 0 || + || P || 0 || X || cf := R.7, R := [R << 1] + 1
|-
| sll (hl) || <tt>11001011 00110110</tt> || 15 || + || + || + || 0 || + || P || 0 || X || cf := (hl).7, (hl) := [(hl) << 1] + 1
|-
| sll (I+D) || <tt>11i11101 11001011 dddddddd 00110110</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := [(I+D) << 1] + 1
|-
| sll (I+D)->R || <tt>11i11101 11001011 dddddddd 00110rrr</tt> || 23 || + || + || + || 0 || + || P || 0 || X || cf := (I+D).7, (I+D) := R := [(I+D) << 1] + 1
|-
| srl R || <tt>11001011 00111rrr</tt> || 8 || 0 || + || + || 0 || + || P || 0 || X || cf := R.0, R := R >> 1
|-
| srl (hl) || <tt>11001011 00111110</tt> || 15 || 0 || + || + || 0 || + || P || 0 || X || cf := (hl).0, (hl) := (hl) >> 1
|-
| srl (I+D) || <tt>11i11101 11001011 dddddddd 00111110</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := (I+D) >> 1
|-
| srl (I+D)->R || <tt>11i11101 11001011 dddddddd 00111rrr</tt> || 23 || 0 || + || + || 0 || + || P || 0 || X || cf := (I+D).0, (I+D) := R := (I+D) >> 1
|-
| sub R || <tt>10010rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R
|-
| sub J || <tt>11i11101 1001010b</tt> || 8 || + || + || + || + || + || V || 1 || + || a -= J
|-
| sub N || <tt>11010110 nnnnnnnn</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= N
|-
| sub (hl) || <tt>10010110</tt> || 7 || + || + || + || + || + || V || 1 || + || a -= (hl)
|-
| sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)
|-
! Instruction:''X'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
|-
| xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R
|-
| xor J || <tt>11i11101 1010110b</tt> || 8 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR J
|-
| xor N || <tt>11101110 nnnnnnnn</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR N
|-
| xor (hl) || <tt>10101110</tt> || 7 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (hl)
|-
| xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)
|}

== English Language Explanations ==
=== Data Movement ===
'''EX'''
Three possible arguments:

''EX DE, HL''
Swaps H with D and L with E

''EX AF, AF'''
Swaps AF with its shadow

''EX (SP), HL''
Swaps (SP) with L and (SP+1) with H. Index registers are also valid

'''EXX'''
Swap BC, DE and HL with their shadows

'''LD'''
Four main arguments:

''LD reg, #''
Sets the eight or 16 bit contents of reg to #

''LD reg2, reg1''
Copies the contents of 8 bit reg1 to reg2

''LD (imm16), reg''
Copies the value of 8 or 16 bit reg to 16 bit memory address imm16. Programmers should remember that 16 bit values are stored little-endian.

''LD reg, (imm16)''
Does the opposite of ''LD (imm16), reg''

'''LDIR'''
Copies a byte from (HL) to (DE), increments DE and HL, then decrements BC. The instruction is repeated if BC is not 0. Interrupts are allowed to trigger while this instruction is running.

'''PUSH'''
Used as ''PUSH reg16'' where reg16 is a register pair or index register. Decrements SP, copies regMSB to (SP), decrements SP again, then copies regLSB to (SP).

'''POP'''
Same syntax as PUSH. Copies (SP) to regLSB, increments SP, copies (SP) to regMSB, then increments SP again.

===Control===
'''JP'''
''JP imm16'' Imm16 is copied to PC, causing execution to jump there. Can also be conditional with Z, NZ, C, NC, PO, PE, P, or M as additional arguments such as ''JP Z, imm16''. (HL) may be substituted for imm16 to have the current value of HL copied to PC

'''JR'''
''JR imm8'' The signed 8 bit value imm8 is added to PC, allowing a jump within 128 bytes of the instruction. May also be conditional, but only with Z, NZ, C, and NC arguments.

'''CALL'''
''CALL imm16'' The current value of PC+3 is PUSHed, then imm16 is loaded into PC. May be conditional with the same syntax and arguments as JP, although (HL) is not valid.

'''RET'''
''RET'' The top stack value is POPed into PC. It may be conditional with the same arguments and syntax as JP. This is usually used to return from a CALL instruction.

'''RST'''
''RST imm8'' PC+1 is PUSHed and PC is loaded with 00imm8. This opcode is only 1 byte, so it is an alternative to CALLing routines that are mapped into the beginning of memory. However, it may only be used for the following values of imm8: 00h, 08h, 18h, 20h, 28h, 30h, and 38h. Imm8 must also be in -h suffix format.

'''DJNZ'''
''DJNZ imm8'' B is decremented and if is 0, the rest of the instruction is skipped. Otherwise, the signed 8 bit value imm8 is added to PC. This instruction is usually used like a [[For(]] loop in BASIC.

'''NOP'''
''NOP'' As the name implies, it is "no operation". The CPU does nothing for four clock cycles.

== Care of ==
* Reference table thanks to [[User:CoBB|CoBB]]
* English language reference thanks to [[User:Taricorp|Taricorp]]

83Plus:Ports:20

2020-12-09T18:32:01Z

NonstickAtom: Added another cpu speed switch documented by the_mad_joob

[[Category:83Plus:Ports:By Address|20 - CPU Speed Port]] [[Category:83Plus:Ports:By Name|CPU Speed Port]]
{{SE-Only Port|00}}

== Synopsis ==
'''Port Number:''' 20h

'''Function:''' CPU Speed Port

This port controls the calculator's CPU speed. The CPU can be set to run at either 6MHz or 15MHz with this port.

=== Read Values ===
* 00h : The CPU is running at 6MHz.
* 01h: The CPU is running at 15MHz.

=== Write Values ===
* 00h : Set the CPU speed to 6MHz.
* 01h: Set the CPU speed to 15MHz.

== Comments ==
This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of [[83Plus:Ports:00|Port 00h]].

This port can contain values of 2 and 3, but the difference in speed is negligible. Michal_V has indicated that values 2 and 3 were intended for use with 20 MHz and 25 MHz speeds, but this functionality was left out before production began. Using the crystal timers I came to these approximate values.
{| width="30%" border="1" cellspacing="1" bgcolor="white"
| width="40%" | Port Contents
| width="60%" | CPU Clock Speed
|-
| width="40%" | 00
| width="60%" | ~6.089 mhz
|-
| width="40%" | 01
| width="60%" | ~14.965 mhz
|-
| width="40%" | 02
| width="60%" | ~14.980 mhz
|-
| width="40%" | 03
| width="60%" | ~14.990 mhz
|}
I suggest still using 1 as the speed setting value since the speed of the other values may change in the future---unlikely as that may be---, which could seriously mess up your screen routines, or even cause opcode fetches to fail if required delay states are not configured. The slightly extra speed observed is due to capacitance of the unused pins. These modes are distinguished by LCD delaying hardware, ports 29-2C.

Newer models (with new TA1 ASICs with fewer pins) don't show any difference between 01~03, suggesting that the extra pins for speeds 02 and 03 don't exist. Furthermore, the speed is closer to 16 MHz than it is to 15 MHz, even slightly above it on 4 out of 5 calculators I've tested.

You can actually re-enable the extra values on production models with the TA3 ASIC if you find the right pins. On the TI-83+SE, there are helpful solder pads on the PCB; on the TI-84+/C/SE, you have to solder directly to the ASIC. You'll need to find a set of six pins, where one is a ground shared by a capacitor and two resistors, the next is connected to a capacitor, the next is connected to a resistor, the next two are not connected (solder to these pins), and the last is connected to another resistor. On the TA3 ASIC, they're pins 66-72, with 70 and 71 being the pins you want to tap (there are 144 pins, the side with #1 will be marked in some special way, and they're numbered counter-clockwise). On the TA1 ASIC, there are no known pins for this. Experiments on the TI-83+SE showed that the ASIC was unstable above about 22-23 MHz. The flash chip is only rated for 20 MHz, which could explain the instability.

== Example ==
<nowiki> in a, (2)
and 80h
jp z, NoCPUGoverner
rlca ;Move the 1 bit in bit 7 to bit 0 (80h -> 01h)
out (20h), a
NoCPUGoverner:</nowiki>

Michael Vincent documented another method to set the CPU speed (which is probably faster than my example).
<nowiki>in a, (2)
rla
sbc a, a
out (20h), a</nowiki>

The only side effect of this is that on the TI-83+ Basic this will cause both linkport lines to go high - which shouldn't matter too much if you're not using the linkport at that time, especially since both lines are high normally... the_mad_joob discovered that this method will switch to CPU speed 3, not 1.
That speed may not be fully supported software-wise, most notably because the default delays provided by ports $29>$2C|$2E|$2F vary from one speed to another.

the_mad_joob documented yet another method which switches to speed 1 instead without using jumps
<nowiki>in a,($02)
rlca
and %00000001
out ($20),a</nowiki>

== Credits and Contributions ==
* '''Michael Vincent:''' Documentation and his faster approach as found [http://michaelv.org/programs/calcs/ports/port20.html here].
* '''the_mad_joob'''

83Plus:Ports:01

2020-12-09T18:21:08Z

NonstickAtom: More from the_mad_joob

[[Category:83Plus:Ports:By_Address|01 - Keyboard]] [[Category:83Plus:Ports:By_Name|Keyboard]] [[Category:83:Ports:By_Address|01 - Keyboard]] [[Category:83:Ports:By_Name|Keyboard]]
== Synopsis ==
'''Port Number:''' 01h

'''Function:''' Keyboard Port

This port reads key presses from the keypad. The keypad is divided into a series of groups.

=== Read Values ===
* Bits are set according whether corresponding keys from selected groups are pressed. Groups are selected through writing to the port. A pressed key reads a 0 bit. An unpressed key reads a 1 bit. The port reads FF after a reset (write FF).

=== Write Values ===
* $FF : Reset the keypad. This unselects all groups and resets the keypad state.
* Anything else : Any 0 bit adds the corresponding group to the list of monitored groups. When a key in a monitored group is pressed, the corresponding key bit reads 0, otherwise it reads 1 (active-low).

== Key Map ==
The key map is laid out as follows:

{|
|
! Group Bit
| 0 || 1 || 2 || 3 || 4 || 5 || 6 || 7
|-
|
! Group Mask
| FE || FD || FB || F7 || EF || DF || BF || 7F
|-
! Key Bit !! (Mask)
|-
! 0 !! (FE)
| DOWN||ENTER|| (-) || . || 0 || ||GRAPH|| ||
|-
! 1 !! (FD)
| LEFT|| + || 3 || 2 || 1 || STO ||TRACE|| ||
|-
! 2 !! (FB)
|RIGHT|| - || 6 || 5 || 4 || LN ||ZOOM || ||
|-
! 3 !! (F7)
| UP || * || 9 || 8 || 7 || LOG ||WIND || ||
|-
! 4 !! (EF)
| || / || ) || ( || , || x2 || Y= || ||
|-
! 5 !! (DF)
| || ^ || TAN || COS || SIN ||x-1 || 2nd || ||
|-
! 6 !! (BF)
| ||CLEAR||VARS ||PRGM ||APPS ||MATH ||MODE || ||
|-
! 7 !! (7F)
| || || ||STAT ||X,T,θ,''n''||ALPHA|| DEL || ||
|}

* '''Note:''' Group FB Key FE is NEGATE, not to be confused with SUBTRACT.
* '''Note:''' Group DF Key FE would be ON, but the ON key is tested through [[83Plus:Ports:04|Port 04]], bit 3.
* '''Note:''' Group EF Key BF (APPS) is called MATRIX on the TI-83.

== Comments ==
You should disable interrupts or use a custom interrupt before manually reading this port, because TI's interrupt scans the keypad. If you leave TI's interrupt active when manually reading the keypad, sometimes it will fire between when you set and read the port, and you'll read garbage.

All nonexistent keys read 1.

=== Delay ===
TI's code always resets the keypad before scanning; sometimes, you may get incorrect values if you scan without resetting first.

Traditionally, a delay of a dozen or so clock cycles (6 MHz mode) is used between changing key groups and reading the result. The required delay seems to vary depending on the calculator; some require no delay, others a longer one. The delay is based on real time, not CPU clock cycles; you'll need to make your delay about 3 times longer in 15 MHz mode. However, as in the example, other people seem to find that resetting before every group change negates the need for a delay; some more experimentation is required.

For me (Sorunome) this didn't seem to work: Using the following code didn't always have the correct keygroup selected when scanning (on a TI-84+SE of a friend of mine):
<pre>ld a,$ff
out (1),a
ld a,%10111110
out (1),a
in a,(1)</pre>
While the following fixed it:
<pre>ld a,$ff
out (1),a
ld a,%10111110
out (1),a
ex (sp),hl
ex (sp),hl
in a,(1)</pre>

The reason for this has since been discovered to not be caused by slow hardware, but rather by capacitance in the keypad. When unselecting a group, it takes a while before the charge has dissipated. Resetting the keypad every time after using it will make this discharge happen while you're doing something else, and activating a group happens instantly. The more keys are pressed in the same keygroup, the faster the values are correct. The more keys are pressed in a different keygroup, but on the same bit, the longer you need to wait. A key that's pressed in a different keygroup on a different bit does not seem to influence the time required too much. Some combinations can take more than 50 clock cycles to deactivate, but for single keys being pressed, 8 clock cycles should be enough. However, this may vary from keypad to keypad.

=== Ghosting ===
Because TI didn't add a diode to each key, you can also detect keys that aren't in a currently selected keygroup, as long as the other keygroup has at least one key in common with a selected keygroup. This means, for example, if F7 is selected, and the keys 2, 3, and 6 are pressed, Then keygroup FB will also be activated because F7 and FB have one key in common (namely FD). This makes it appear as though the 5 key is also pressed. This can also be used to make nonexistent keys appear active. However, as at least three keys have to be pressed for it to be noticeable, you don't have to worry in the most common use cases.

=== Debouncing ===
While a key is in a state between pressed and released, it will repeatedly turn on and off. Such behavior only occurs for keys that were just released. If you are reading the keypad extremely quickly, it will appear as though the key is being pressed and released a number of times. You need to either wait longer between keypad scans, or you need to implement a proper debouncing algorithm. TI-OS does the first one by scanning the keypad in an interrupt that runs slowly enough for it to not have a noticeable effect.

== Example ==
<nowiki>ld a, 0FFh ;Reset the keypad.
out (1), a
ld a, 0FEh ;Select group 0.
out (1), a
in a, (1) ;Test for keys.
and 2 ;Test for Left Arrow key by making A 0 if left was pressed.
call z, LeftArrowPressed ;If 0 then left was pressed.
ld a, 0FFh ;Reset the keypad.
out (1), a</nowiki>

83Plus:Ports:2E

2020-12-09T18:17:22Z

NonstickAtom: More info from the_mad_joob. Maybe consider making him an account :D.

[[Category:83Plus:Ports:By Address|2E - Memory Access Delay]] [[Category:83Plus:Ports:By Name|Memory Access Delay]]
{{SE-Only Port|06}}

== Synopsis ==
'''Port Number:''' 2Eh

'''Function:''' Memory Access Delay

This port will add a 1 cycle delay for certain types of reads for the ram or the flash. This port's effect is enabled by the lcd delay port currently selected by the current CPU speed.

==To enable by the LCD Ports==
* Bit 0 of the LCD ports (depending on current CPU speed mode) enable the effects of the flash delay controlled be 2E.
* Bit 1 of the LCD ports (depending on current CPU speed mode) enable the effects of the ram delay controlled be 2E.

== Read and Write Values of port 2E==
* Bits 0-2 of port 2E affect the flash reads and (attempted) writes.
** Bit 0 adds a clock for every opcode read from the flash.
** Bit 1 adds a clock for every non-opcode read from the flash.
** Bit 2 adds a clock for every (attempted) write to the flash.
* Bits 4-6 of port 2E affect the ram reads and writes.
** Bit 4 adds a clock for every opcode read from the ram.
** Bit 5 adds a clock for every non-opcode read from the ram.
** Bit 6 adds a clock for every write to the ram.
* Bits 3 and 7 are not used in port 2E, though they can be toggled.

== Comments ==
With bits 0 & 4, extra clock cycle are doubled if the instruction is prefixed.
We can safely deduct that the port adds a clock cycle each time the R register is incremented.

Why this port is necessary is unknown, however it is set to 44 on the 83+SE and 45 on the 84+(SE).

This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of [[83Plus:Ports:06|Port 06h]].

== Credits and Contributions ==
* '''Michael Vincent:''' Documentation found [http://michaelv.org/programs/calcs/ports/port2e.html here].
* '''James Montelongo'''
* '''Ben Moody'''
* '''the_mad_joob'''

Category:83Plus:Ports:By Address

2020-12-09T18:11:27Z

NonstickAtom: Removed/amended an incorrect statement

[[Category:83Plus:Ports|Ports by Address/Number]]
See also [[:Category:83Plus:Ports:By Name|list of ports by name]] and [[83Plus:State_of_the_calculator_at_boot|State of the calculator at boot]].

Please read our page on [[Contributing]] before editing these pages!

'''Note on terminology:''' P:nn is shorthand for port nn, e.g. P:04 refers to port 4.

'''A note about 83+BE ports:''' On the 83+BE, many of the ports have been mirrored to the 00h-07h region. If a port is mirrored, when it is being read, take the bitwise-AND with 07h to find the actual port being accessed. Writes to mirror ports are not ignored.

Legitimate 83+BE ports (the rest are mirrored):
* '''Read values''' - 00h-07h and 10h-13h are original ports
* '''Write values''' - 00h-07h, 10h-13h, 14h, and 16h are original ports

'''Please note:''' The TI-84+CSE uses the same ASIC as the TI-84+/SE; it just has a different screen and controller. Therefore, these pages also cover the TI-84+CSE.

83Plus:OS:Certificate/Headers:Fields:Application Headers

2020-12-09T18:06:54Z

NonstickAtom: Updated some info based off of what the_mad_joob said in Omnimaga.

[[Category:83Plus:OS:Certificate/Headers:Fields_By_Number|Application Headers]] [[Category:83Plus:OS:Certificate/Headers:Fields:Application Headers|Application Headers]]

''See also [[83Plus:OS:Certificate/Headers|the page on certificate headers]]; app headers follow the same general format.''

In the past, people liked to treat application headers as structs with fixed positions for everything. This is '''wrong.''' An application header is composed of [[83Plus:OS:Certificate/Headers#Format|variable-length fields]]. A valid application header must: Start with a master field ([[http://wikiti.brandonw.net/index.php?title=Category:83Plus:OS:Certificate/Headers:Fields:800]]), end with a final field ([[83Plus:OS:Certificate/Headers:Fields:807|807]]), contain a name field ([[83Plus:OS:Certificate/Headers:Fields:804|804]]), a key ID field ([[83Plus:OS:Certificate/Headers:Fields:801|801]]), a page count ([[83Plus:OS:Certificate/Headers:Fields:808|808]]), and a date stamp field ([[83Plus:OS:Certificate/Headers:Fields:032|032]]+[[83Plus:OS:Certificate/Headers:Fields:090|090]]) followed by a date stamp signature field ([[83Plus:OS:Certificate/Headers:Fields:020|020]]). Aside from the opening field being first, closing field being last, and dates stamp signature following the date stamp, those fields can be in '''any order.''' You may also specify a build ([[83Plus:OS:Certificate/Headers:Fields:803|803]]) and revision ([[83Plus:OS:Certificate/Headers:Fields:802|802]]) and disable the TI splash screen ([[83Plus:OS:Certificate/Headers:Fields:809|809]]). There's also support for some other stuff, but it is all optional.

In theory, it is legal to specify the master field as 800DXX or 800EXXXX if the application is less than 64 K in size. However, rabbitsign won't sign it.

The name field can be less than 8 bytes, so you do not have to pad app names out to 8 bytes. You can also specify an app name greater than 8 bytes, but the calculator will ignore everything past the 8th byte.

The date stamp signature never actually gets checked, so you can put garbage there. But it gets better! You can also just specify the date stamp signature as having zero length. You can also pull a similar stunt with the date stamp itself.

The final field is usually written as 807F00000000. That four byte length field is ignored, so you can just put 8070 instead.

People like to pad the application header until it is 128 bytes in size. That is not necessary. Execution starts after the app header.

<nowiki> ; Minimal application. This application is just 31 bytes! And takes up 16 K of archive space!
; Master Field
.db 80h, 0Fh, 0, 0, 0, 0
; Name. Note that the name field reads 80 43 because the name specified here is 3 characters long.
.db 80h, 43h, "nop"
; Disable TI splash screen.
.db 80h, 90h
; Pages
.db 80h, 81h, 1
; Signing Key ID
.db 80h, 12h, 1, 4 ; or 15 for the TI-84+CSE
; Date stamp. Apparently, the calculator doesn't mind if you put
; nothing in this.
.db 03h, 22h, 09h, 00h
; Date stamp signature. Since nothing ever checks this, there's no
; reason ever to update it. Or even have data in it.
.db 02h, 00
; Final field
.db 80h, 70h
; No need for padding here. The OS will just start execution here.
b_call(_JForceCmdNoChar)
</nowiki>

Disassemblers

2020-12-04T18:39:30Z

NonstickAtom: Fixed some links and wikified a bit.

{{stub}}

== Definition ==
A disassembler is a computer program that translates machine language into assembly language — the inverse operation to that of an assembler. Source: [http://en.wikipedia.org/wiki/Disassembler wikipedia]

== z80 CPU ==

=== PC Community Disassemblers ===
* [http://www.ticalc.org/archives/files/fileinfo/162/16219.html Disassembler v1.7]
* [http://www.ticalc.org/archives/files/fileinfo/349/34903.html Z80Disassembler v1.0]

=== Oncalc ===
* [https://www.ticalc.org/archives/files/fileinfo/97/9781.html Calcsys]

=== Software (paid) ===
* [http://www.hex-rays.com/idapro IDA Pro]

== 68k ==

=== PC Community Disassemblers ===
* dasm-tigcc
* GNU m68k-coff-objdump in GCC4TI (not available in TIGCC)

=== Oncalc ===
* [http://detachedsolutions.com/cmdpost/ Command Post]

=== Freeware ===
*

=== Software (paid) ===
* [http://www.hex-rays.com/idapro IDA Pro]

Teams:Void

2020-12-04T18:31:02Z

NonstickAtom: Blanked the page

Assemblers

2020-12-04T18:20:13Z

NonstickAtom:

[[Category:PC Software|Assemblers]]
{{stub}}
{{wikify}}
= z80 Assemblers =

== [https://ticalc.org/archives/files/fileinfo/15/1504.html TASM] ==
TASM is very outdated but you can find the most recent upload of it can be found on ticalc.org [https://ticalc.org/archives/files/fileinfo/15/1504.html here].

== [https://github.com/alberthdev/spasm-ng SPASM-ng] ==
SPASM-ng is a z80/ez80 assembler with extra features to support development for TI calculators.
It uses a terminal syntax and runs on Linux and Windows and MacOS.

Features:
* App Signing
* Includes
* Defines
* Equates
* If:Then:Else Statements
* Macros
* Bitmap Support
* Fast Compiling
* TASM syntax support

To find the latest build(or to build it yourself) goto the [https://github.com/alberthdev/spasm-ng Official Github Page].

== [https://clrhome.org/asm/ ClrHome.org] ==
ClrHome.org offers a completly web based assembler/IDE that can be used inside of your browser. It is located [https://clrhome.org/asm/ here].

Features:
* One Page App Signing
* Includes
* Defines
* Equates
* If:Then:Else Statements
* Macros

== Brass ==

Features:
* TASM compatibility (partial?)
* macros

== [https://github.com/jacobly0/fasmg-z80 fasmg-z80] ==
A tool that transforms flatassembler into a z80 assembler. Latest build can be found [https://github.com/jacobly0/fasmg-z80 here].

= 68k Assemblers =

== A68k ==

A68k is ancient and originally written for programming the Amiga. It comes with TIGCC and GCC4TI. Some in the 68k community continue to use it because they prefer its syntax, though the TIGCC and GCC4TI developers strongly encourage people to move to the GNU Assembler.

== GNU as ==

This assembler ships with GCC4TI and TIGCC.

Calculator General FAQ

2020-12-04T18:05:31Z

NonstickAtom: Added more information and links and made it look pretty

= The WikiTI Calculator FAQ. =

FAQ stands for Frequently Asked Questions.
You should start to seek your answer here and in the other FAQs before asking. You have currently active users willing to help on [https://www.cemetech.net Cemetech], [http://www.omnimaga.org/index.php?board=6.0 Omnimaga], and [https://codewalr.us/ CodeWalrus] Forums.

{{stub}}

== Introduction ==

=== Linking ===

==== How do I connect my calculator to my computer? ====
First, you need a cable to connect the calculator. This should be delivered standard with the calculator.
You also need a linking program. There are several programs:
* [https://education.ti.com/en/products/computer-software/ti-connect-sw TI-Connect] (Only for Mac and Windows, NOT compatible with the CE)
* [https://education.ti.com/en/products/computer-software/ti-connect-ce-sw TI-Connect CE] (Only for Mac and Windows, Specifically for the CE)
* [https://lpg.ticalc.org/prj_tilp/ TiLP] (compatible with several types)
* [https://ticalc.link Ticalc.link] (Only compatible with TI-84 plus)

==== Where do I get programs for my calculator? ====
For a large collection of programs you can check out [https://ticalc.org ticalc.org] or the Forum links below.

== Calculator Specific ==

=== TI-83 ===

=== TI-83/84+[SE] ===

==== Can I downgrade my OS? ====
First let's check the bootcode. Click [mode][alpha][ln].

The bootcode and your base code(The OS version) will be presented. If the bootcode is anywhere below 1.03 you can downgrade by simply sending an older .8xu or a different OS like [https://knightos.org/ KnightOS] to your calculator.

==== What do I do if my bootcode is 1.03 ====
TI implemented an RSA-SHA256 encryption method to there bootcode that prevents unsigned OS's and downgrades from happening. But TI's attempts were thwarted. There is a handy tool called [https://www.ticalc.org/archives/files/fileinfo/441/44190.html UNSIGNED] that you can send to your calculator. It will patch the boot code after you change the certificate revision and/or click Signed OS's. Once that happens you can send any .8xu file that you want to your calculator.

=== TI-84+/CE ===

==== Why can't I run assembly programs on my TI-84+ CE? ====
TI has decided that from OS version 5.5.5 on that assembly programs were a security threat and have advertently removed the functionality to run them from the default OS(no other stable OS's currently). A full explanation video by Thelastmillennial can be found [https://youtu.be/dSkN0aMswXs here].

However not all hope is lost. A work around has been made to restore assembly functionality.
# Send [https://yvantt.github.io/arTIfiCE/ arTIfiCE] to your calculator
# For easier use of assembly programs: install [https://github.com/mateoconlechuga/cesium/releases/tag/v3.3.1 Cesium]
# For even more convenience: install [https://github.com/jacobly0/asmhook/releases/tag/v1.0.0 asmhook]

==== Can I downgrade my OS? ====
''Place Holder''

==== How to reset the calculator? ====
Sometimes it'll happen that the calculator freezes or that you just need to reset it. For resetting, there are several options.
To reset your calculator you can:
* Press the reset button at the back of your calculator (if your calculator is only frozen, press it short, if you really want a RAM reset, hold it down for some seconds.)
* Press [2nd]-[+]-[7], then you can choose what you want to reset.

==== Why is there stuff on my screen going through my graphs? ====
Some programs use the graph screen to draw the interface of the program on. Sometimes, this isn't cleared by the program. 
This can be solved very easy by pressing: [2nd]-[prgm]-[1]-[enter].

== Programming and developing ==

=== What programming languages are supported? ===
Well that depends on your calculator.

TI-83(84)+[SE]
[http://tutorials.eeems.ca/ASMin28Days/welcome.html z80]
[https://github.com/KnightOS/kcc C]
[https://www.ticalc.org/archives/files/fileinfo/456/45659.html Axe Parser]
[https://github.com/Zeda/Grammer2 Grammer 2]
[http://tibasicdev.wikidot.com/home TI-BASIC]
[https://www.ticalc.org/archives/files/fileinfo/416/41608.html BBC BASIC]

TI-83(84)+ CE [Premium]
[http://ez80.readthedocs.io/en/latest/tutorial/intro.html ez80]
[https://github.com/CE-Programming/ C & C++]
[https://github.com/PeterTillema/ICE ICE]
[http://tibasicdev.wikidot.com/home TI-BASIC]
Python (Exclusive to the TI-83 Premium CE Edition Python)

=== Where or how do I make programs for my calculator? ===
For a bit you will probably be using the TI-BASIC Editor found by pressing [prgm][right] and selecting the program to edit. The different programs on your calc can be made to fit a certain syntax for the different compilers and parsers that you may install on your calculator. The only two languages that you can use on your calculator are TI-BASIC and OPCode assembly until you install an application such as Grammer 2, Axe, or ICE. These languages enable the user to have more control over their calculator while still allowing you to program on calc. Another thing you might consider is BASIC Libs. Many basic libs use tokens to pass arguments to it's own flash library while still executing TI-BASIC. The OPCode assembly is not very recommended. If you insist on programming z80 on calc then I would suggest Mimas 0.4.

If you decide to dabble in some low level programming languages you will want to use a computer. C is a [https://github.com/KnightOS/kcc work in progress] on the TI-84+ but is still used in for KnightOS. C is fully supported on any ez80 calculator and C++ is getting there. You will want to use the toolchain and libraries found [https://github.com/CE-Programming/ here]. For ez80 and z80 all you need is a text editor and an [https://wikiti.brandonw.net/index.php?title=Assemblers assembler]. I recommend SPASM-ng as it supports both the ez80 and the z80 processors. However it's up to you.

Below are some Online IDEs/Assemblers/Emulators
* [https://www.cemetech.net/sc/ SourceCoder3 (Cemetech)]
* [https://www.tiplanet.org/pb/ Project Builder (TI-planet)]
* [https://www.clrHome.org/asm ClrHome.org]

== Other FAQs and Forum Links ==
* [https://www.omnimaga.org/ Omnimaga]
* [https://www.cemetech.net/ Cemetech]
* [https://codewalr.us/ CodeWalrus]
* [https://tiplanet.org/ TI-Planet(french)]
* [http://tibasicdev.wikidot.com/ TIBD]
* [http://tibasicdev.wikidot.com/faq TI-BASIC FAQ]
* [https://www.ocf.berkeley.edu/~pad/faq/index.html The Ultimate TI Calculator FAQ]
* [https://www.technicalc.org/tifaq/ TI Graphing Calculator FAQ]
* [https://www.technicalc.org/tifaq/mltifaq.txt Mattias Lindqvist's Calc-TI FAQ]
* [https://www.ti-89.org/faq.html The TI-89 FAQ]

Calculator General FAQ

2020-12-04T14:33:57Z

NonstickAtom: Clarified some misinformation

The WikiTI Calculator FAQ.

FAQ stands for Frequently Asked Questions.
You should start to seek your answer here and in the other FAQs before asking. You have currently active users willing to help on [http://www.unitedti.org/forum/index.php?showforum=9 UTI] and [http://www.omnimaga.org/index.php?board=6.0 Omnimaga] Forums.

== FAQ ==

{{stub}}

=== Introduction ===

=== Linking ===

=====How do I connect my calculator to my computer?=====
First, you need a cable to connect the calculator. This should be delivered standard with the calculator.
You also need a linking program. There are several programs:
* [https://education.ti.com/en/products/computer-software/ti-connect-sw TI-Connect] (Only for Mac and Windows, NOT compatible with the CE)
* [https://education.ti.com/en/products/computer-software/ti-connect-ce-sw TI-Connect CE] (Only for Mac and Windows, Specifically for the CE)
* [https://lpg.ticalc.org/prj_tilp/ TiLP] (compatible with several types)
* [https://ticalc.link Ticalc.link] (Only compatible with TI-84 plus)

=====Where do I get programs for my calculator?=====
For a large collection of programs you can check out TICalc.org or Cemetech.net.
*[https://www.ticalc.org/pub/ The Ticalc file archive]
*[https://www.cemetech.net/downloads/browse/ The Cemetech file archive]

=== Calculator Specific ===

==== TI-83 ====

==== TI-83+ ====

==== TI-84+/SE ====

==== TI-84+/CE ====

===== Why can't I run assembly programs on my TI-84+ CE? =====
TI has decided that from OS version 5.5.5 on that assembly programs were a security threat and have advertently removed the functionality to run them from the default OS(no other stable OS's currently). A full explanation video by Thelastmillennial can be found [https://youtu.be/dSkN0aMswXs here].

However not all hope is lost. A work around has been made to restore assembly functionality.
# Send [https://yvantt.github.io/arTIfiCE/ arTIfiCE] to your calculator
# For easier use of assembly programs: install [https://github.com/mateoconlechuga/cesium/releases/tag/v3.3.1 Cesium]
# For even more convenience: install [https://github.com/jacobly0/asmhook/releases/tag/v1.0.0 asmhook]

=====How to reset the calculator?=====
Sometimes it'll happen that the calculator freezes or that you just need to reset it. For resetting, there are several options.
To reset your calculator you can:
* Press the reset button at the back of your calculator (if your calculator is only frozen, press it short, if you really want a RAM reset, hold it down for some seconds.)
* Press [2nd]-[+]-[7], then you can choose what you want to reset.

=====Why is there stuff on my screen going through my graphs?=====
Some programs use the graph screen to draw the interface of the program on. Sometimes, this isn't cleared by the program. 
This can be solved very easy by pressing: [2nd]-[prgm]-[1]-[enter].

=== Programming and developing ===

=====What programming languages are supported?=====
* AXE
* C
* C++
* eZ80 (CE)
* ICE (CE)
* Python (Python editions only)
* TI-BASIC
* Z80 (Monochrome calculators)

=====Where can I make programs for my calculator?=====
On the calculator itself, you can make programs in TI-BASIC and Python (For the Python editions). 
Also ICE is possible on calc, but you'll need the [https://www.cemetech.net/downloads/files/1481/x1481 ICE compiler] installed for that. 
Other languages can't be done on your calc, but there are some online program editors that allow you to make those programs:
* [https://www.cemetech.net/sc/ SourceCoder3 (Cemetech)]
* [https://www.tiplanet.org/pb/ Project Builder (TI-planet)]

== Other FAQs ==

* [https://www.ocf.berkeley.edu/~pad/faq/index.html The Ultimate TI Calculator FAQ]
* [https://www.technicalc.org/tifaq/ TI Graphing Calculator FAQ]
* [https://www.technicalc.org/tifaq/mltifaq.txt Mattias Lindqvist's Calc-TI FAQ]
* [https://www.ti-89.org/faq.html The TI-89 FAQ]

Assemblers

2020-12-03T20:16:36Z

NonstickAtom: Not finished but working on it.

[[Category:PC Software|Assemblers]]
{{stub}}
{{wikify}}
== z80 Assemblers ==

== [https://ticalc.org/archives/files/fileinfo/15/1504.html TASM] ==
TASM is very outdated but you can find the most recent upload of it can be found on ticalc.org [https://ticalc.org/archives/files/fileinfo/15/1504.html here].

== [https://github.com/alberthdev/spasm-ng SPASM-ng] ==
SPASM-ng is a z80 assembler with extra features to support development for TI calculators.
It uses a terminal syntax and runs on Linux and Windows and MacOS.

Features:
* App Signing
* Includes
* Defines
* Equates
* If:Then:Else Statements
* Macros
* Bitmap Support
* Fast Compiling
* TASM syntax support

To find the latest build(or to build it yourself) goto the [https://github.com/alberthdev/spasm-ng Official Github Page].

== [https://clrhome.org/asm/ ClrHome.org] ==
ClrHome.org offers a completly web based assembler/IDE that can be used inside of your browser. It is located [https://clrhome.org/asm/ here].

Features:
* One Page App Signing
* Includes
* Defines
* Equates
* If:Then:Else Statements
* Macros

== Brass ==

Features:
* TASM compatibility (partial?)
* macros

== [https://github.com/jacobly0/fasmg-z80 fasmg-z80] ==
A tool that transforms flatassembler into a z80 assembler. Latest build can be found [https://github.com/jacobly0/fasmg-z80 here].

== 68k Assemblers ==

=== A68k ===

A68k is ancient and originally written for programming the Amiga. It comes with TIGCC and GCC4TI. Some in the 68k community continue to use it because they prefer its syntax, though the TIGCC and GCC4TI developers strongly encourage people to move to the GNU Assembler.

=== GNU as ===

This assembler ships with GCC4TI and TIGCC.

Category:83Plus:OS:Operator Stack

2020-12-03T19:39:20Z

NonstickAtom:

{{stub}}

== Synopsis ==

'''Official Name:''' OPS

'''Memory Address:''' 9828h

'''Length:''' 2 bytes

The operator stack is defined between (OPS) and (OPBase). The OS uses this area for storing information for conditional statements and loops in TI-BASIC.

== Comments ==

Due to extremely poor programming in the OS, it is the cause of the well-known memory leaks which can occur if a programmer uses a Goto statement within a loop or an If:Then statement. In a nutshell, it moves the OPS and [https://wikiti.brandonw.net/index.php?title=83Plus:RAM:9824 FPS] by nine bytes every time a push to each occurs, which happens when a conditional is entered. This can cause a slowdown (slowly becomes more to move) and memory leaks (the nine bytes added above). The FPS are not accounted for, or are 'leaked'.

Very little is currently known about the OPS since TI has not documented it, but research is underway.

Category:83Plus:OS:Operator Stack

2020-12-03T19:19:17Z

NonstickAtom:

{{Wikify}}
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== Synopsis ==

'''Official Name:''' OPS

'''Memory Address:''' 9828h

'''Length:''' 2 bytes

The operator stack is defined between (OPS) and (OPBase). The OS uses this area for storing information for conditional statements and loops in TI-BASIC.

== Comments ==

Due to extremely poor programming in the OS, it is the cause of the well-known memory leaks which can occur if a programmer uses a Goto statement within a loop or an If:Then statement. In a nutshell, it moves the OPS and [https://wikiti.brandonw.net/index.php?title=83Plus:RAM:9824 FPS] by nine bytes every time a push to each occurs, which happens when a conditional is entered. This can cause a slowdown (slowly becomes more to move) and memory leaks (the nine bytes added above). The FPS are not accounted for, or are 'leaked'.

Very little is currently known about the OPS since TI has not documented it, but research is underway.

Category:83Plus:OS:Operator Stack

2020-12-03T19:17:46Z

NonstickAtom: Wikified but I don't want to move it because I'm still new :P Also I don't know if putting two memory locations is allowed.

{{Wikify}}
{{stub}}

== Synopsis ==

'''Official Name:''' OPBase and OPS

'''Memory Address:''' 9826h - 9828h

'''Length:''' 2 bytes

The operator stack is defined between (OPS) and (OPBase). The OS uses this area for storing information for conditional statements and loops in TI-BASIC.

== Comments ==

Due to extremely poor programming in the OS, it is the cause of the well-known memory leaks which can occur if a programmer uses a Goto statement within a loop or an If:Then statement. In a nutshell, it moves the OPS and [https://wikiti.brandonw.net/index.php?title=83Plus:RAM:9824 FPS] by nine bytes every time a push to each occurs, which happens when a conditional is entered. This can cause a slowdown (slowly becomes more to move) and memory leaks (the nine bytes added above). The FPS are not accounted for, or are 'leaked'.

Very little is currently known about the OPS since TI has not documented it, but research is underway.