83Plus:Ports:06 - Revision history

Dr. D'nar at 04:30, 20 February 2013

2013-02-20T04:30:41Z

Dr. D'nar: Oops!

2013-02-20T04:13:06Z

Oops!

Dr. D'nar: TI-84+CSE

2013-02-20T04:12:41Z

TI-84+CSE

Dan Englender: my bad...

2006-05-14T20:43:31Z

my bad...

Dan Englender: 84P Regular can't map RAM pages

2006-03-16T00:26:42Z

84P Regular can't map RAM pages

FloppusMaximus at 05:17, 30 March 2005

2005-03-30T05:17:45Z

Dan Englender: Added categories. (Don't like name: see discussion on port 5)

2005-03-28T17:48:04Z

Added categories. (Don't like name: see discussion on port 5)

Dan Englender: /* Write Values */ See comments redundant

2005-03-28T03:34:11Z

‎Write Values: See comments redundant

Dan Englender: /* Read Values */ see comments was redundant

2005-03-28T03:33:14Z

‎Read Values: see comments was redundant

AndyJ: /* Example */ used the stack to store the old memory page

2005-03-28T03:33:01Z

‎Example: used the stack to store the old memory page

← Older revision		Revision as of 04:30, 20 February 2013
Line 6:		Line 6:

	This port controls what page is swapped into Memory Bank A (see comments). On the TI-84+CSE, port [[83Plus:Ports:0E\|0E]] also affects MemA.		This port controls what page is swapped into Memory Bank A (see comments). On the TI-84+CSE, port [[83Plus:Ports:0E\|0E]] also affects MemA.
		+
		+	See also [[83Plus:Memory Mapping\|Memory Mapping]].

	=== Read Values ===		=== Read Values ===

@@ Line 5: / Line 5: @@
 '''Function:''' Flash/RAM Memory Paging (Bank A)
-This port controls what page is swapped into Memory Bank A (see comments). On the TI-84+CSE, ports [[83Plus:Ports:0E|0E]] and [[83Plus:Ports:0F|0F]] also affect MemA.
+This port controls what page is swapped into Memory Bank A (see comments). On the TI-84+CSE, port [[83Plus:Ports:0E|0E]] also affects MemA.
 === Read Values ===

@@ Line 5: / Line 5: @@
 '''Function:''' Flash/RAM Memory Paging (Bank A)
-This port controls what page is swapped into Memory Bank A (see comments).
+This port controls what page is swapped into Memory Bank A (see comments). On the TI-84+CSE, ports [[83Plus:Ports:0E|0E]] and [[83Plus:Ports:0F|0F]] also affect MemA.
 === Read Values ===

@@ Line 10: / Line 10: @@
 * The current port mapped to Memory Bank A.
 ** 83+ Basic: If a RAM page is swapped in, the port reads the RAM page number with bit 6 set. If a ROM page is swapped in, the port reads the ROM page number with bit 6 reset.
-** 84+ Regular: Reads currently swapped in ROM page.
+** 83+ Silver, 84+: If a RAM page is swapped in, the port reads the RAM page number with bit 7 set. If a ROM page is swapped in, the port reads the ROM page number with bit 7 reset.
-** 83+ Silver, 84+ Silver: If a RAM page is swapped in, the port reads the RAM page number with bit 7 set. If a ROM page is swapped in, the port reads the ROM page number with bit 7 reset.
 === Write Values ===
 * The page number to swap into Memory Bank A.
 ** 83+ Basic: If bit 6 is set, bit 0 will choose between the two RAM pages (40h or 41h). If bit 6 is 0, bits 0~4 select a page from ROM (00h through 1Fh).
-** 84+ Regular: Bits 0~5 will select a page from ROM (00h through 3Fh).
+** 83+ Silver, 84+: If bit 7 is set, bits 0~2 will choose any of the 8 RAM pages (80h through 87h). If bit 7 is 0, bits 0~6 on either SE will select a page from ROM (00h through 7Fh) or on 84+ regular, bits 0~5 will select a page from ROM (00h through 3Fh).
-** 83+ Silver, 84+ Silver: If bit 7 is set, bits 0~2 will choose any of the 8 RAM pages (80h through 87h). If bit 7 is 0 or bits 0~6 on either SE will select a page from ROM (00h through 7Fh).
 == Comments ==
 In normal circumstances this controls the page at address 4000h.  The behavior of this port changes in different memory map modes. See [[83Plus:Ports:04|Port 04h]] for details about memory map modes.
 == Example ==

@@ Line 10: / Line 10: @@
 * The current port mapped to Memory Bank A.
 ** 83+ Basic: If a RAM page is swapped in, the port reads the RAM page number with bit 6 set. If a ROM page is swapped in, the port reads the ROM page number with bit 6 reset.
-** 83+ Silver, any 84+: If a RAM page is swapped in, the port reads the RAM page number with bit 7 set. If a ROM page is swapped in, the port reads the ROM page number with bit 7 reset.
+** 84+ Regular: Reads currently swapped in ROM page.
 === Write Values ===
 * The page number to swap into Memory Bank A.
 ** 83+ Basic: If bit 6 is set, bit 0 will choose between the two RAM pages (40h or 41h). If bit 6 is 0, bits 0~4 select a page from ROM (00h through 1Fh).
-** 83+ SE, 84+ (any): If bit 7 is set, bits 0~2 will choose any of the 8 RAM pages (80h through 87h). If bit 7 is 0, bits 0~5 on the 84+ Basic, or bits 0~6 on either SE will select a page from ROM (00h through 3Fh or 7Fh).
+** 84+ Regular: Bits 0~5 will select a page from ROM (00h through 3Fh).
 == Comments ==
 In normal circumstances this controls the page at address 4000h.  The behavior of this port changes in different memory map modes. See [[83Plus:Ports:04|Port 04h]] for details about memory map modes.
 == Example ==

@@ Line 1: / Line 1: @@
-[[Category:83Plus:Ports:By_Address|06 - Memory Page A]]
+[[Category:83Plus:Ports:By_Address|06 - Memory Page A]] [[Category:83Plus:Ports:By_Name|Memory Page A]]
 [[Category:83Plus:Ports:By_Name|Memory Page A]]
 == Synopsis ==
 '''Port Number:''' 06h

← Older revision		Revision as of 17:48, 28 March 2005
Line 1:		Line 1:
		+	[[Category:83Plus:Ports:By_Address\|06 - Memory Page A]]
		+	[[Category:83Plus:Ports:By_Name\|Memory Page A]]
	== Synopsis ==		== Synopsis ==
	'''Port Number:''' 06h		'''Port Number:''' 06h

@@ Line 22: / Line 22: @@
   <nowiki>push af
 in a,(6)
-ld (oldMemPage),a
+push af
 ld a,1
 out (6),a
 ; do stuff that needs page 1 swapped in
-ld a,(oldMemPage)
+pop af
 out (6),a
 pop af</nowiki>