83Plus:Ports:21 - Revision history

Dr. D'nar: topic names

2013-02-21T01:32:02Z

topic names

Dr. D'nar: argh, messed up the table

2013-02-20T20:51:02Z

argh, messed up the table

Dr. D'nar: RAM execution information

2013-02-20T20:49:40Z

RAM execution information

Dr. D'nar: TI-84+CSE

2013-02-20T05:24:46Z

TI-84+CSE

Dr. D'nar: Fixed memory protection scheme information

2013-01-02T03:36:40Z

Fixed memory protection scheme information

Thepenguin77 at 18:33, 1 October 2011

2011-10-01T18:33:21Z

Runer112: /* RAM protection modes */

2011-06-29T00:40:28Z

‎RAM protection modes

Runer112: /* RAM protection modes */

2011-06-29T00:39:18Z

‎RAM protection modes

Runer112: /* RAM protection modes */

2011-06-29T00:37:49Z

‎RAM protection modes

Thepenguin77 at 23:57, 28 June 2011

2011-06-28T23:57:48Z

@@ Line 21: / Line 21: @@
 The value of this port is initialized by the boot code. On the TI-83+SE, TI-84+, and TI-84+SE, bit 0 can be used to determine the hardware type alone. On the TI-84+CSE, use bits 1 and 0. If want to run on the TI-83+SE through TI+84+CSE for some reason, check both bits. The OS likes to check both bits by doing AND 3.
-=== Flash Chip Types ===
+=== Flash Chip Size ===
 The lower nibble controls the flash chip type. See also [[83Plus:Memory_Mapping]]. Flash pages have three different properties determined by this port: readable/censored, privileged/unprivileged, and mutable/immutable. The only censored page is the certificate page. Privileged pages can unlock flash via [[83Plus:Ports:14|port 14]]. Immutable pages cannot be written to even when flash is unlocked.
 {|-
@@ Line 61: / Line 61: @@
-=== RAM protection modes ===
+=== RAM Chip Size ===
 The TI-83+SE had an external RAM chip. This port therefore informs the ASIC what size RAM chip is installed.

@@ Line 7: / Line 7: @@
 '''Function:''' Flash Size / RAM Size
 === Read Values ===
@@ Line 70: / Line 69: @@
 |-
 |0
-|1
+|32K
-|2
-|3
 |-
-|32 K
+|1
 |64 K
 |128 K
 |256 K
 |-

@@ Line 1: / Line 1: @@
-[[Category:83Plus:Ports:By_Address:Protected|21 - Flash Type / RAM Protection]] [[Category:83Plus:Ports:By_Address|21 - Flash Type / RAM Protection]] [[Category:83Plus:Ports:By_Name|Flash Type / RAM Protection]]
+[[Category:83Plus:Ports:By_Address:Protected|21 - Flash Size / RAM Size]] [[Category:83Plus:Ports:By_Address|21 - Flash Size/ RAM Size]] [[Category:83Plus:Ports:By_Name|Flash Size/ RAM Size]]
 {{SE-Only Port|01}}
 {{Protected Port}}
@@ Line 6: / Line 6: @@
 '''Port Number:''' 21h
-'''Function:''' Flash Type / RAM Protection
+'''Function:''' Flash Size / RAM Size
 === Read Values ===
 * Bits 0-1: Set flash chip size (see below)
-* Bits 4-5: current RAM protection mode (see below)
+* Bits 4-5: Set RAM chip size (see below)
 === Write Values ===
@@ Line 63: / Line 63: @@
 === RAM protection modes ===
-Which RAM addresses are executable is determined by ports 25 and 26. The high nibble of port 21 controls how frequently the RAM protection loops. It will loop every 2^(value+1) pages. So, 0 loops every 2 pages, and 3 loops every 16 pages (in other words, not at all).
+The TI-83+SE had an external RAM chip. This port therefore informs the ASIC what size RAM chip is installed.
-With the default values of 10h and 20h in ports 25 and 26:
+{|-
-* '''Mode 0''' (the default): Execution is allowed on pages 81h, 83h, 85h, 87h, 89h, 8Bh, 8Dh, and 8Fh.
+|<u>Value</u>&nbsp;&nbsp;&nbsp;
-* '''Mode 1*''': Execution is allowed on pages 81h, 85h, 89h, and 8Dh.
+|<u>Chip Size</u>&nbsp;&nbsp;&nbsp;
-* '''Mode 2*''': Execution is allowed on pages 81h and 89h.
+|-
-* '''Mode 3*''': Execution is allowed on pages 81h only.
+|0
+|1
-''* In modes 1 to 3, execution is also allowed on the first 1024 bytes of each page immediately following an allowed page because TI screwed up on [[83Plus:Ports:26#Comments|port 26h]].''
+|2
-(If you ever attempt to execute code from a "disallowed" page, the calculator resets.)
+The actual execution permissions of RAM pages are masked by this port. Because TI sets it 0 (instead of 2), the ASIC thinks there's 32 K of RAM, and allows execution on all odd-numbered pages, instead of just 81h like TI intended. (If you set this to 1, 2, or 3, execution is also allowed on the first 1024 bytes of each page immediately following an allowed page because TI screwed up on [[83Plus:Ports:26#Comments|port 26h]].) If you ever attempt to execute code from a non-executable page, the calculator resets.
 == Example ==

@@ Line 8: / Line 8: @@
 '''Function:''' Flash Type / RAM Protection
 === Read Values ===
-* Bit 0: Reset for 1 MB flash chip, set for 2 MB flash chip
+* Bits 0-1: Set flash chip size (see below)
-* Bit 1: Reset to block commands to boot sector(s) selected by bit 0, set to allow commands
 * Bits 4-5: current RAM protection mode (see below)
@@ Line 22: / Line 20: @@
 This port does not exist on the standard 83+.  See [[83Plus:Ports:02|port 2]].
-The value of this port is initialized by the boot code to either 01 (TI-83+ SE, TI-84+ SE) or 00 (TI-84+ basic.)  Bit 0 can thus be used to determine the hardware type (in fact, the OS checks both bits 0 and 1, by ANDing the value with 3; it may be a good idea for user programs to do the same.)
+The value of this port is initialized by the boot code. On the TI-83+SE, TI-84+, and TI-84+SE, bit 0 can be used to determine the hardware type alone. On the TI-84+CSE, use bits 1 and 0. If want to run on the TI-83+SE through TI+84+CSE for some reason, check both bits. The OS likes to check both bits by doing AND 3.
 === RAM protection modes ===

@@ Line 11: / Line 11: @@
 === Read Values ===
-* Bit 0: Reset to lock sectors 2C and 3F. 1 on either the 83+ SE or the 84+ SE, 0 on the 84+ basic.
+* Bit 0: Reset for 1 MB flash chip, set for 2 MB flash chip
-* Bit 1: Reset to lock sectors 6C and 7F.
+* Bit 1: Reset to block commands to boot sector(s) selected by bit 0, set to allow commands
 * Bits 4-5: current RAM protection mode (see below)

@@ Line 33: / Line 33: @@
 * '''Mode 3*''': Execution is allowed on pages 81h only.
-''* In modes 1 to 3, execution is also allowed on the first 1024 bytes of each page immediately following a normally allowed page because TI screwed up on [[83Plus:Ports:26|port 26h]].''
+''* In modes 1 to 3, execution is also allowed on the first 1024 bytes of each page immediately following a normally allowed page because TI screwed up on [[83Plus:Ports:26#Comments|port 26h]].''
 (If you ever attempt to execute code from a "disallowed" page, the calculator resets.)

@@ Line 27: / Line 27: @@
 Which RAM addresses are executable is determined by ports 25 and 26. The high nibble of port 21 controls how frequently the RAM protection loops. It will loop every 2^(value+1) pages. So, 0 loops every 2 pages, and 3 loops every 16 pages (in other words, not at all).
-With the default values in ports 25 and 26:
+With the default values of 10h and 20h in ports 25 and 26:
 * '''Mode 0''' (the default): Execution is allowed on pages 81h, 83h, 85h, 87h, 89h, 8Bh, 8Dh, and 8Fh.
-* '''Mode 1''': Execution is allowed on pages 81h, 82h, 85h, 86h, 89h, 8Ah, 8Dh, and 8Eh.
+* '''Mode 1''': Execution is allowed on pages 81h, 82h*, 85h, 86h*, 89h, 8Ah*, 8Dh, and 8Eh*.
-* '''Mode 2''': Execution is allowed on pages 81h, 82h, 89h, and 8Ah.
+* '''Mode 2''': Execution is allowed on pages 81h, 82h*, 89h, and 8Ah*.
-* '''Mode 3''': Execution is allowed on pages 81h and 82h only.
+* '''Mode 3''': Execution is allowed on pages 81h and 82h* only.
 (If you ever attempt to execute code from a "disallowed" page, the calculator resets.)