83Plus:Ports:55 - Revision history

Dr. D'nar at 01:18, 4 March 2020

2020-03-04T01:18:04Z

Dr. D'nar: oops

2013-04-04T20:41:35Z

oops

Dr. D'nar: /* Read Values */

2013-04-04T18:09:50Z

‎Read Values

Thepenguin77 at 04:14, 28 October 2011

2011-10-28T04:14:45Z

FloppusMaximus: Port 55 - active USB interrupts

2010-09-05T23:57:33Z

Port 55 - active USB interrupts

New page

[[Category:83Plus:Ports:By Address|55 - USB Interrupt State]] [[Category:83Plus:Ports:By Name|USB Interrupt State]]
== Synopsis ==
'''Port Number:''' 55h

'''Function:''' USB Interrupt State

This port reports which USB interrupts have occurred.

{{84P-Only Port|14}}

=== Read Values ===
* Bit 0: Normally set. Cleared for some (unknown, unusual) type of event.
* Bit 1: Normally set.
* Bit 2: Normally set. Cleared if a USB line interrupt has occurred.
* Bit 3: Normally set.
* Bit 4: Normally set. Cleared if a USB protocol interrupt has occurred.
* Bit 5: Always 0
* Bit 6: Always 0
* Bit 7: Always 0

=== Write Values ===
* No effect

== Comments ==
Normally, the value of this port will be 1Fh. When a USB interrupt occurs, one or more of the bits will be cleared.

USB line interrupts are triggered when one of the four functional USB lines changes from low to high or high to low. [[83Plus:Ports:57|Port 57]] controls when these interrupts occur. When a line interrupt occurs, [[83Plus:Ports:56|port 56]] tells you which of the lines has changed. Use port 57 to acknowledge the interrupt.

USB protocol interrupts are triggered when (a) a USB device-level event occurs, such as a bus reset, or (b) a USB transaction finishes. [[83Plus:Ports:5B|Port 5B]] controls whether these interrupts occur. When one does, ports [[83Plus:Ports:82|82]], [[83Plus:Ports:84|84]], and [[83Plus:Ports:86|86]] (and possibly 83 and 85) will tell you what event(s) caused the interrupt. Reading from any of these ports also clears it and acknowledges the interrupt.

Bit 0 indicates some other, and uncommon, type of event - possibly that the bus has been suspended. I think that this is also controlled by port 5B, and zeroing port 5B will acknowledge the interrupt. This should be tested.

@@ Line 11: / Line 11: @@
 === Read Values ===
 * Bit 0: Normally set.  Cleared if the bus goes into suspend mode.
-* Bit 1: Normally set.  Probably gets cleared if some kind of unknown even occurs.
+* Bit 1: Normally set.  This interrupt is related to ports 4F and 50.
 * Bit 2: Normally set.  Cleared if a USB line interrupt (ports 56 and 57) has occurred.
 * Bit 3: Normally set.  BrandonW's ViewScreen experiments suggest that this gets reset if the ViewScreen-over-USB logic misses a byte, possibly because you're sending them too fast.

@@ Line 13: / Line 13: @@
 * Bit 1: Normally set.  Probably gets cleared if some kind of unknown even occurs.
 * Bit 2: Normally set.  Cleared if a USB line interrupt (ports 56 and 57) has occurred.
-* Bit 3: Normally set.  BrandonW's ViewScreen experiments suggest that this gets set if the ViewScreen-over-USB logic misses a byte, possibly because you're sending them too fast.
+* Bit 3: Normally set.  BrandonW's ViewScreen experiments suggest that this gets reset if the ViewScreen-over-USB logic misses a byte, possibly because you're sending them too fast.
 * Bit 4: Normally set.  Cleared if a USB protocol interrupt (ports 80+) has occurred.
 * Bit 5: Always 0

@@ Line 1: / Line 1: @@
 [[Category:83Plus:Ports:By Address|55 - USB Interrupt State]] [[Category:83Plus:Ports:By Name|USB Interrupt State]]
 == Synopsis ==
 '''Port Number:''' 55h
@@ Line 7: / Line 8: @@
 This port reports which USB interrupts have occurred.
 === Read Values ===