Z80 Instruction Set - Revision history

NonstickAtom at 18:33, 9 December 2020

2020-12-09T18:33:12Z

Luby: Changed the order a bit (put legend on top)

2008-04-07T20:26:08Z

Changed the order a bit (put legend on top)

Igrek: Headers have been repeated before every new letter so it won't be needed to scroll up to see what order the flags are in.

2007-03-18T16:17:50Z

Headers have been repeated before every new letter so it won't be needed to scroll up to see what order the flags are in.

Jim e: ld (A),hl & ld hl,(A) were incorrect in timming. Made note about their duplicate opcodes

2006-12-15T20:12:16Z

ld (A),hl & ld hl,(A) were incorrect in timming. Made note about their duplicate opcodes

Dan Englender: Somewhat clumsy. If someone has a better idea, feel free.

2006-03-17T01:47:07Z

Somewhat clumsy. If someone has a better idea, feel free.

Show changes

Dan Englender: /* RST */ rst instructions are only one byte, os PC+1 is return address

2006-02-23T04:39:41Z

‎RST: rst instructions are only one byte, os PC+1 is return address

Taricorp: Still in progress, I'm doing this slowly.

2006-02-23T03:47:38Z

Still in progress, I'm doing this slowly.

216.54.151.133 at 03:40, 23 February 2006

2006-02-23T03:40:18Z

216.54.151.133 at 03:35, 23 February 2006

2006-02-23T03:35:49Z

207.67.57.99 at 02:00, 22 February 2006

2006-02-22T02:00:20Z

← Older revision		Revision as of 18:33, 9 December 2020
Line 533:		Line 533:

	'''POP'''		'''POP'''
−	Same syntax as PUSH. Copies (SP) to regLSB, increments SP, copies (SP) to regMSB, then increments SP again~~. The word based at the starting value of SP is zeroed~~.	+	Same syntax as PUSH. Copies (SP) to regLSB, increments SP, copies (SP) to regMSB, then increments SP again.

@@ Line 1: / Line 1: @@
 == Reference ==
 {| border="1" cellspacing="0" cellpadding="2"
@@ Line 429: / Line 488: @@
 | xor (I+D) || <tt>11i11101 10101110 dddddddd</tt> || 19 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR (I+D)
 |}
 == English Language Explanations ==

@@ Line 1: / Line 1: @@
 == Reference ==
 {| border="1" cellspacing="0" cellpadding="2"
-! Instruction !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
+! Instruction:''A'' !! Opcode !! Time !! S !! Z !! X !! H !! Y !! P !! N !! C !! Effect
 |-
 | adc a,R || <tt>10001rrr</tt> || 4 || + || + || + || + || + || V || 0 || + || a += R + cf
@@ Line 38: / Line 38: @@
 |-
 | and (I+D) || <tt>11i11101 10100110 dddddddd</tt> || 19 || + || + || + || 1 || + || P || 0 || 0 || a := a AND (I+D)
 |-
 | bit B,R || <tt>11001011 01bbbrrr</tt> || 8 || + || + || + || 1 || + || P || 0 || - || tmp := R AND [1 << B]
@@ Line 44: / Line 46: @@
 |-
 | bit B,(I+D) || <tt>11i11101 11001011 dddddddd 01bbb***</tt> || 20 || + || + || X || 1 || X || P || 0 || - || tmp := (I+D) AND [1 << B],<br>xf := [I+D].13, yf := [I+D].11
 |-
 | call A || <tt>11001101 alalalal ahahahah</tt> || 17 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := A
@@ Line 70: / Line 74: @@
 |-
 | cpl || <tt>00101111</tt> || 4 || - || - || + || 1 || + || - || 1 || - || a := ~a
 |-
 | daa || <tt>00100111</tt> || 4 || + || + || + || X || + || P || - || X || tmp := a,<br>if nf then<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp -= 0x06<br>&nbsp;if cf or [a > 0x99] then tmp -= 0x60<br>else<br>&nbsp;if hf or [a AND 0x0f > 9] then tmp += 0x06<br>&nbsp;if cf or [a > 0x99] then tmp += 0x60<br>endif,<br>tmp => flags, cf := cf OR [a > 0x99],<br>hf := a.4 XOR tmp.4, a := tmp
@@ Line 88: / Line 94: @@
 |-
 | djnz E || <tt>00010000 dddddddd</tt> || 13/8 || - || - || - || - || - || - || - || - || b -= 1, if b <> 0 then pc := E
 |-
 | ei || <tt>11111011</tt> || 4 || - || - || - || - || - || - || - || - || iff1 := 1, iff2 := 1 after the next instruction
@@ Line 100: / Line 108: @@
 |-
 | exx || <tt>11011001</tt> || 4 || - || - || - || - || - || - || - || - || bc, de, hl <=> bc', de', hl'
 |-
 | halt || <tt>01110110</tt> || 4 || - || - || - || - || - || - || - || - || wait for interrupt
 |-
 | im 0 || <tt>11101101 01*0*110</tt> || 8 || - || - || - || - || - || - || - || - || mode 0: execute instruction on bus
@@ Line 134: / Line 146: @@
 |-
 | inir || <tt>11101101 10110010</tt> || 21/16 || + || + || + || X || + || X || X || X || ini, if b <> 0 then pc -= 2
 |-
 | jp A || <tt>11000011 alalalal ahahahah</tt> || 10 || - || - || - || - || - || - || - || - || pc := A
@@ Line 152: / Line 166: @@
 |-
 | jr c,E || <tt>00111000 dddddddd</tt> || 12/7 || - || - || - || - || - || - || - || - || if cf then pc := E
 |-
 | ld R1,R2 || <tt>01rrrsss</tt> || 4 || - || - || - || - || - || - || - || - || R1 := R2
@@ Line 228: / Line 244: @@
 |-
 | ldir || <tt>11101101 10110000</tt> || 21/16 || - || - || X || 0 || X || C || 0 || - || ldi, if bc <> 0 then pc -= 2
 |-
 | neg || <tt>11101101 01***100</tt> || 8 || + || + || + || + || + || V || 1 || + || a := 0 - a
 |-
 | nop || <tt>00000000</tt> || 4 || - || - || - || - || - || - || - || - || nothing
 |-
 | or R || <tt>10110rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a OR R
@@ Line 256: / Line 276: @@
 |-
 | otir || <tt>11101101 10110011</tt> || 21/16 || + || + || + || X || + || X || X || X || outi, if b <> 0 then pc -= 2
 |-
 | pop P || <tt>11pp0001</tt> || 10 || - || - || - || - || - || - || - || - || P := (sp), sp += 2
@@ Line 264: / Line 286: @@
 |-
 | push I || <tt>11i11101 11100101</tt> || 15 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := I
 |-
 | res B,R || <tt>11001011 10bbbrrr</tt> || 8 || - || - || - || - || - || - || - || - || R := R AND ~[1 << B]
@@ Line 326: / Line 350: @@
 |-
 | rst S || <tt>11sss111</tt> || 11 || - || - || - || - || - || - || - || - || sp -= 2, (sp) := pc, pc := S
 |-
 | sbc a,R || <tt>10011rrr</tt> || 4 || + || + || + || + || + || V || 1 || + || a -= R + cf
@@ Line 390: / Line 416: @@
 |-
 | sub (I+D) || <tt>11i11101 10010110 dddddddd</tt> || 19 || + || + || + || + || + || V || 1 || + || a -= (I+D)
 |-
 | xor R || <tt>10101rrr</tt> || 4 || + || + || + || 0 || + || P || 0 || 0 || a := a XOR R

@@ Line 205: / Line 205: @@
 | ld I,A || <tt>11i11101 00100001 alalalal ahahahah</tt> || 14 || - || - || - || - || - || - || - || - || I := A
 |-
-| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [Q shouldn't be hl, see below]
+| ld Q,(A) || <tt>11101101 01qq1011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || Q := (A) [ld hl,(A) has a faster non-prefixed duplicate, see below.]
 |-
-| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || hl := (A)
+| ld hl,(A) || <tt>00101010 alalalal ahahahah</tt> || 16 || - || - || - || - || - || - || - || - || hl := (A)
 |-
 | ld I,(A) || <tt>11i11101 00101010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || I := (A)
 |-
-| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [Q shouldn't be hl, see below]
+| ld (A),Q || <tt>11101101 01qq0011 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := Q [ld (A),hl has a faster non-prefixed duplicate, see below.]
 |-
-| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := hl
+| ld (A),hl || <tt>00100010 alalalal ahahahah</tt> || 16 || - || - || - || - || - || - || - || - || (A) := hl
 |-
 | ld (A),I || <tt>11i11101 00100010 alalalal ahahahah</tt> || 20 || - || - || - || - || - || - || - || - || (A) := I

@@ Line 65: / Line 65: @@
 ===RST===
-''RST imm8''  PC+3 is PUSHed and PC is loaded with 00imm8.  This opcode is only 1 byte, so it is an alternative to CALLing routines that are mapped into the beginning of memory.  However, it may only be used for the following values of imm8: 00h, 08h, 18h, 20h, 28h, 30h, and 38h.  Imm8 must also be in -h suffix format.
+''RST imm8''  PC+1 is PUSHed and PC is loaded with 00imm8.  This opcode is only 1 byte, so it is an alternative to CALLing routines that are mapped into the beginning of memory.  However, it may only be used for the following values of imm8: 00h, 08h, 18h, 20h, 28h, 30h, and 38h.  Imm8 must also be in -h suffix format.
-−
 ===DJNZ===

← Older revision		Revision as of 03:47, 23 February 2006
Line 77:		Line 77:

	==Table of Opcodes==		==Table of Opcodes==
		+	Still working on this...

← Older revision		Revision as of 03:40, 23 February 2006
Line 74:		Line 74:
	===NOP===		===NOP===
	''NOP'' As the name implies, it is "no operation". The CPU does nothing for four clock cycles.		''NOP'' As the name implies, it is "no operation". The CPU does nothing for four clock cycles.
		+
		+
		+	==Table of Opcodes==

← Older revision		Revision as of 03:35, 23 February 2006
Line 45:		Line 45:
	===POP===		===POP===
	Same syntax as PUSH. Copies (SP) to regLSB, increments SP, copies (SP) to regMSB, then increments SP again. The word based at the starting value of SP is zeroed.		Same syntax as PUSH. Copies (SP) to regLSB, increments SP, copies (SP) to regMSB, then increments SP again. The word based at the starting value of SP is zeroed.
		+
		+
		+	==Control==
		+	===JP===
		+	''JP imm16'' Imm16 is copied to PC, causing execution to jump there. Can also be conditional with Z, NZ, C, NC, PO, PE, P, or M as additional arguments such as ''JP Z, imm16''. (HL) may be substituted for imm16 to have the current value of HL copied to PC
		+
		+
		+	===JR===
		+	''JR imm8'' The signed 8 bit value imm8 is added to PC, allowing a jump within 128 bytes of the instruction. May also be conditional, but only with Z, NZ, C, and NC arguments.
		+
		+
		+	===CALL===
		+	''CALL imm16'' The current value of PC+3 is PUSHed, then imm16 is loaded into PC. May be conditional with the same syntax and arguments as JP, although (HL) is not valid.
		+
		+
		+	===RET===
		+	''RET'' The top stack value is POPed into PC. It may be conditional with the same arguments and syntax as JP. This is usually used to return from a CALL instruction.
		+
		+
		+	===RST===
		+	''RST imm8'' PC+3 is PUSHed and PC is loaded with 00imm8. This opcode is only 1 byte, so it is an alternative to CALLing routines that are mapped into the beginning of memory. However, it may only be used for the following values of imm8: 00h, 08h, 18h, 20h, 28h, 30h, and 38h. Imm8 must also be in -h suffix format.
		+
		+
		+	===DJNZ===
		+	''DJNZ imm8'' B is decremented and if is 0, the rest of the instruction is skipped. Otherwise, the signed 8 bit value imm8 is added to PC. This instruction is usually used like a [[For(]] loop in BASIC.
		+
		+
		+	===NOP===
		+	''NOP'' As the name implies, it is "no operation". The CPU does nothing for four clock cycles.

@@ Line 1: / Line 1: @@
-{{Wikify}}
+Not a complete list, but most commonly used instructions are given.  For a complete list with opcodes and number of clock cycles taken, go [http://nwps.ws/~dragonfire/Asmin28/lesson/toc.html here]
 == Data Movement ==
-'''EX'''
+===EX===
 Three possible arguments:
@@ Line 15: / Line 15: @@
-'''EXX'''
+===EXX===
 Swap BC, DE and HL with their shadows
-'''LD'''
+===LD===
 Four main arguments:
@@ Line 33: / Line 33: @@
 ''LD reg, (imm16)''
 Does the opposite of ''LD (imm16), reg''