Difference between revisions of "83Plus:OS:Nspire Differences"
From WikiTI
(Created because this belongs on the Wiki.) |
m (→Flash Limitations) |
||
| (2 intermediate revisions by one other user not shown) | |||
| Line 1: | Line 1: | ||
| − | [[Category:83Plus: | + | [[Category:83Plus:General Hardware Information|Nspire Differences]] |
The TI-84+ keypad for the Nspire runs the TI-84+ software in emulation. The emulation is quite incomplete; the Nspire only emulates the limited subset of the hardware's features that TI's official software actually uses. This page serves mainly as a reference for programmers who want Nspire compatibility. | The TI-84+ keypad for the Nspire runs the TI-84+ software in emulation. The emulation is quite incomplete; the Nspire only emulates the limited subset of the hardware's features that TI's official software actually uses. This page serves mainly as a reference for programmers who want Nspire compatibility. | ||
| Line 12: | Line 12: | ||
=== Flash Limitations === | === Flash Limitations === | ||
| − | * Port 14h still functions as it is supposed to; it controls | + | * Port 14h still functions as it is supposed to; it controls whether writes to protected ports and flash actually take place. |
| − | + | ||
* Writes to OS space are normally ignored. Normally. | * Writes to OS space are normally ignored. Normally. | ||
| + | * The Nspire does not emulate the flash chip's memory-mapped command register system. Instead, an illegal instruction must be issued for writes to flash to take place. | ||
* 0EDh, 0EEh: The page swapped into [[83Plus:Ports:06|memory bank A]] is erased. | * 0EDh, 0EEh: The page swapped into [[83Plus:Ports:06|memory bank A]] is erased. | ||
* 0EDh, 0EFh: The next ldi writes the data to the archive. | * 0EDh, 0EFh: The next ldi writes the data to the archive. | ||
| Line 30: | Line 30: | ||
** 05h–2Ch: These are mostly communication related. | ** 05h–2Ch: These are mostly communication related. | ||
** 2Fh, 30h: These do stuff. | ** 2Fh, 30h: These do stuff. | ||
| + | * The Nspire OS version numbers are even numbered. | ||
== Credits and Contributions == | == Credits and Contributions == | ||
* BrandonW for doing a lot work on discovering the differences. | * BrandonW for doing a lot work on discovering the differences. | ||
* The [http://hackspire.unsads.com/wiki/index.php/TI-84_Plus_Emulation Hackspire Wiki]. | * The [http://hackspire.unsads.com/wiki/index.php/TI-84_Plus_Emulation Hackspire Wiki]. | ||
Latest revision as of 10:13, 27 June 2013
The TI-84+ keypad for the Nspire runs the TI-84+ software in emulation. The emulation is quite incomplete; the Nspire only emulates the limited subset of the hardware's features that TI's official software actually uses. This page serves mainly as a reference for programmers who want Nspire compatibility.
Contents
Missing Features
Z80 Core
The Nspire does not emulate the full Z80 instruction set.
- Anything involving the index-half registers is broken.
- Most undocumented Z80 instructions do not work and cause a reset.
- The emulated 84 has no access to the Nspire file system.
- IM 1 and IM 2 work.
Flash Limitations
- Port 14h still functions as it is supposed to; it controls whether writes to protected ports and flash actually take place.
- Writes to OS space are normally ignored. Normally.
- The Nspire does not emulate the flash chip's memory-mapped command register system. Instead, an illegal instruction must be issued for writes to flash to take place.
- 0EDh, 0EEh: The page swapped into memory bank A is erased.
- 0EDh, 0EFh: The next ldi writes the data to the archive.
Other
- Sadly, the LCD must be still accessed through port 10h (as opposed to being memory-mapped). No delay is needed for the LCD. In theory, bit 7 of port 10h will always be reset.
- USB is totally unemulated. Instead, illegal instructions are used to interface with USB. The USB descriptors appear to be screwed up.
Added features
- The only additional functionality of the Nspire 84 is the illegal instructions. See the Nspire Wiki for more information. Some of these cannot be used from RAM or the Nspire will reboot.
- A class of 0EDh, 0EDh, xxh, 10h opcodes are used to do some interesting things.
- 02h: This is used when turning off. Might not work from RAM.
- 03h: This locks the Nspire so that only the 84 keypad can be used. Reboots the Nspire if run from RAM.
- 04h: This unlocks the Nspire so that either keypad can be used. Cannot be run from RAM.
- 05h–2Ch: These are mostly communication related.
- 2Fh, 30h: These do stuff.
- The Nspire OS version numbers are even numbered.
Credits and Contributions
- BrandonW for doing a lot work on discovering the differences.
- The Hackspire Wiki.
