Difference between revisions of "83Plus:Ports:14"

Revision as of 11:07, 27 March 2005

Synopsis

Port Number: 14h

Function: Flash Write-Lock Control

This port controls whether or not the Flash ROM chip will accept write/erase instructions.

Read Values

• 83+ Basic only: Reads absolutely nothing of any significance.
• 83+ SE/84+ only: Reads 0 if the flash is locked, 1 if the flash is unlocked.

Write Values

• Write 00h to lock the flash. Write 01h to unlock it, but note that writes to this port are only accepted from privileged ROM pages. See Comments for what the privileged pages are.

Comments

When the flash chip is locked, then write/erase instructions are rejected. In addition, protected pages cannot be read. There is only one protected page. On the normal 83+, this is page 1Eh. On the normal 84+, it is 3Eh. On the 83+ SE and 84+ SE it is 7Eh. This page holds the certification data, which includes ID number, validation number, application authorizations, public keys, and other related data.

The flash can only be locked and unlocked from privileged ROM pages. The privileged ROM pages are the last 3 ROM pages that actually contain code. On the normal 83+ the pages are 1Ch, 1Dh, and 1Fh. On the normal 84+ the pages are 3Ch, 3Dh, and 3Fh. On the 83+ SE the pages are 7Ch, 7Dh, and 7Fh. On the 84+ the pages are 6Fh, 7Ch, 7Dh, and 7Fh.

Finally a specific sequence of instructions must be executed (all of them from a privileged page, with no interruptions) before the port will finally listen. The sequence is:

nop
nop
im 1
di

Note: it is still unclear whether all or only part of this sequence is actually required. But since TI uses this exact sequence every time, it is best to play it safe and use the exact sequence.

After this sequence, use out (14h), a to write the port.

Note that as a side effect, interrupts are disabled, and standard interrupt handling (mode 1) is selected. To ensure this sequence runs uninterrupted, however, you should use di prior to executing this sequence. If an interrupt fired in the middle of it, it would mess up the whole thing. Also, the A register must be previously set to the correct value (0 to lock, 1 to unlock).

Side note: TI also adds an additional di after the write. Sources inform me, however, that this is not required.

Example

ld a, 1 ;Unlock
di ;Make sure we don't get interrupted.
nop
nop
im 1
di
out (14h), a

xor a ;Lock.
di
nop
nop
im 1
di
out (14h), a