Difference between revisions of "83Plus:Ports:06"
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| + | [[Category:83Plus:Ports:By_Address|06 - Memory Page A]] [[Category:83Plus:Ports:By_Name|Memory Page A]] | ||
== Synopsis == | == Synopsis == | ||
'''Port Number:''' 06h | '''Port Number:''' 06h | ||
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'''Function:''' Flash/RAM Memory Paging (Bank A) | '''Function:''' Flash/RAM Memory Paging (Bank A) | ||
| − | This port controls what page is swapped into Memory Bank A (see comments). | + | This port controls what page is swapped into Memory Bank A (see comments). On the TI-84+CSE, port [[83Plus:Ports:0E|0E]] also affects MemA. |
| + | |||
| + | See also [[83Plus:Memory Mapping|Memory Mapping]]. | ||
=== Read Values === | === Read Values === | ||
| − | * The current port mapped to Memory Bank A | + | * The current port mapped to Memory Bank A. |
** 83+ Basic: If a RAM page is swapped in, the port reads the RAM page number with bit 6 set. If a ROM page is swapped in, the port reads the ROM page number with bit 6 reset. | ** 83+ Basic: If a RAM page is swapped in, the port reads the RAM page number with bit 6 set. If a ROM page is swapped in, the port reads the ROM page number with bit 6 reset. | ||
| − | ** 83+ Silver, | + | ** 83+ Silver, 84+: If a RAM page is swapped in, the port reads the RAM page number with bit 7 set. If a ROM page is swapped in, the port reads the ROM page number with bit 7 reset. |
=== Write Values === | === Write Values === | ||
| − | * The page number to swap into Memory Bank A | + | * The page number to swap into Memory Bank A. |
** 83+ Basic: If bit 6 is set, bit 0 will choose between the two RAM pages (40h or 41h). If bit 6 is 0, bits 0~4 select a page from ROM (00h through 1Fh). | ** 83+ Basic: If bit 6 is set, bit 0 will choose between the two RAM pages (40h or 41h). If bit 6 is 0, bits 0~4 select a page from ROM (00h through 1Fh). | ||
| − | ** 83+ | + | ** 83+ Silver, 84+: If bit 7 is set, bits 0~2 will choose any of the 8 RAM pages (80h through 87h). If bit 7 is 0, bits 0~6 on either SE will select a page from ROM (00h through 7Fh) or on 84+ regular, bits 0~5 will select a page from ROM (00h through 3Fh). |
== Comments == | == Comments == | ||
| Line 22: | Line 25: | ||
<nowiki>push af | <nowiki>push af | ||
in a,(6) | in a,(6) | ||
| − | + | push af | |
ld a,1 | ld a,1 | ||
out (6),a | out (6),a | ||
; do stuff that needs page 1 swapped in | ; do stuff that needs page 1 swapped in | ||
| − | + | pop af | |
out (6),a | out (6),a | ||
pop af</nowiki> | pop af</nowiki> | ||
Latest revision as of 20:30, 19 February 2013
Synopsis
Port Number: 06h
Function: Flash/RAM Memory Paging (Bank A)
This port controls what page is swapped into Memory Bank A (see comments). On the TI-84+CSE, port 0E also affects MemA.
See also Memory Mapping.
Read Values
- The current port mapped to Memory Bank A.
- 83+ Basic: If a RAM page is swapped in, the port reads the RAM page number with bit 6 set. If a ROM page is swapped in, the port reads the ROM page number with bit 6 reset.
- 83+ Silver, 84+: If a RAM page is swapped in, the port reads the RAM page number with bit 7 set. If a ROM page is swapped in, the port reads the ROM page number with bit 7 reset.
Write Values
- The page number to swap into Memory Bank A.
- 83+ Basic: If bit 6 is set, bit 0 will choose between the two RAM pages (40h or 41h). If bit 6 is 0, bits 0~4 select a page from ROM (00h through 1Fh).
- 83+ Silver, 84+: If bit 7 is set, bits 0~2 will choose any of the 8 RAM pages (80h through 87h). If bit 7 is 0, bits 0~6 on either SE will select a page from ROM (00h through 7Fh) or on 84+ regular, bits 0~5 will select a page from ROM (00h through 3Fh).
Comments
In normal circumstances this controls the page at address 4000h. The behavior of this port changes in different memory map modes. See Port 04h for details about memory map modes.
Example
push af in a,(6) push af ld a,1 out (6),a ; do stuff that needs page 1 swapped in pop af out (6),a pop af
