Difference between revisions of "83:Ports:02"
From WikiTI
(memory mapping) |
|||
| (2 intermediate revisions by 2 users not shown) | |||
| Line 1: | Line 1: | ||
| + | [[Category:83:Ports:By Address|02 - ROM/RAM Pager / Memory Map Control]] [[Category:83:Ports:By Name|ROM/RAM Pager / Memory Map Control]] | ||
== Synopsis == | == Synopsis == | ||
'''Port Number:''' 02h | '''Port Number:''' 02h | ||
| − | '''Function:''' ROM and RAM Pager | + | '''Function:''' ROM and RAM Pager and Memory Map Control |
| − | This port controls what page is swapped into the | + | This port controls what page is swapped into the swappable memory range which depends on the current [[83:OS:Memory Mapping|mapping mode]]. |
=== Read Values === | === Read Values === | ||
| − | Always the last value | + | Always the last value written. |
=== Write Values === | === Write Values === | ||
* Bits 0 to 2: The lower 3 bits of the desired ROM page (bit 3 can be set through bit 4 of the [[83:Ports:00|link port]]) | * Bits 0 to 2: The lower 3 bits of the desired ROM page (bit 3 can be set through bit 4 of the [[83:Ports:00|link port]]) | ||
| − | * Bit 3: | + | * Bit 3 controls the [[83:OS:Memory Mapping|memory mapping mode]]. The default value for this bit is 1. |
| − | * Bit 4: | + | * Bit 4: Unknown, harmless |
* Bit 5: Unknown, harmless | * Bit 5: Unknown, harmless | ||
| − | * Bit 6: | + | * Bit 6: 0 - the specified ROM page is swapped in, 1 - the RAM page specified by bit 0 swapped in. |
| − | * Bit 7: | + | * Bit 7 controls the [[83:OS:Memory Mapping|memory mapping mode]]. The default value for this bit is 1. |
== Credits and Contributions == | == Credits and Contributions == | ||
* created by CoBB | * created by CoBB | ||
Latest revision as of 12:48, 28 April 2005
Synopsis
Port Number: 02h
Function: ROM and RAM Pager and Memory Map Control
This port controls what page is swapped into the swappable memory range which depends on the current mapping mode.
Read Values
Always the last value written.
Write Values
- Bits 0 to 2: The lower 3 bits of the desired ROM page (bit 3 can be set through bit 4 of the link port)
- Bit 3 controls the memory mapping mode. The default value for this bit is 1.
- Bit 4: Unknown, harmless
- Bit 5: Unknown, harmless
- Bit 6: 0 - the specified ROM page is swapped in, 1 - the RAM page specified by bit 0 swapped in.
- Bit 7 controls the memory mapping mode. The default value for this bit is 1.
Credits and Contributions
- created by CoBB
