Difference between revisions of "83Plus:Ports:26"
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[[Category:83Plus:Ports:By_Address:Protected|26 - RAM Execution Upper Limit]] [[Category:83Plus:Ports:By_Address|26 - RAM Execution Upper Limit]] [[Category:83Plus:Ports:By_Name|RAM Execution Upper Limit]] | [[Category:83Plus:Ports:By_Address:Protected|26 - RAM Execution Upper Limit]] [[Category:83Plus:Ports:By_Address|26 - RAM Execution Upper Limit]] [[Category:83Plus:Ports:By_Name|RAM Execution Upper Limit]] | ||
| − | {{SE-Only Port| | + | {{SE-Only Port|06}} |
{{Protected Port}} | {{Protected Port}} | ||
| Line 12: | Line 12: | ||
* Page 81h: Addresses 004000h to 007FFFh | * Page 81h: Addresses 004000h to 007FFFh | ||
* Page 82h: Addresses 008000h to 00BFFFh | * Page 82h: Addresses 008000h to 00BFFFh | ||
| − | etc. | + | etc. The actual pages and addresses affected also depends on the masking applied by port 21. |
=== Read Values === | === Read Values === | ||
| − | * [00h - FFh]: Multiply the value in this port by 400h to get the highest RAM address that can run code. | + | * [00h - FFh]: Multiply the value in this port by 400h then add 3FFh to get the highest RAM address that can run code. |
=== Write Values === | === Write Values === | ||
| Line 21: | Line 21: | ||
== Comments == | == Comments == | ||
| − | This port does not exist on the standard 83 Plus. See ports [[83Plus:Ports:05|5]] and [[83Plus:Ports:16|16]] instead. Execution of code on addresses above the limit set here will cause a reset. | + | TI apparently did not realize that this port is inclusive of the addresses it indicates. TI outputs 20h to this port in the boot code hoping to make the execution protection region 4000h - 7FFFh, but they did not realize that in fact this sets the upper limit to 83FFh. |
| + | |||
| + | This port does not exist on the standard 83 Plus. See ports [[83Plus:Ports:05|5]] and [[83Plus:Ports:16|16]] instead. Execution of code on addresses above the limit set here will cause a reset. The typical default value is 20h. | ||
== See Also == | == See Also == | ||
* [[83Plus:Ports:25|Port 25]] | * [[83Plus:Ports:25|Port 25]] | ||
| + | * [[83Plus:Ports:21|Port 21]] | ||
Latest revision as of 19:08, 27 October 2011
| This port only exists as a distinct port on the TI-83 Plus Silver Edition, the TI-84 Plus, and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 06. |
| This port is protected, which means user programs cannot ordinarily write to it directly. |
Synopsis
Port Number: 26h
Function: Controls the RAM Execution Upper Limit
This port control the upper limit of RAM execution. It maps the RAM memory space in 1024 byte segments as though it was one continuous address space:
- Page 80h: Addresses 000000h to 003FFFh
- Page 81h: Addresses 004000h to 007FFFh
- Page 82h: Addresses 008000h to 00BFFFh
etc. The actual pages and addresses affected also depends on the masking applied by port 21.
Read Values
- [00h - FFh]: Multiply the value in this port by 400h then add 3FFh to get the highest RAM address that can run code.
Write Values
- [00h - FFh]: Select a new upper limit.
Comments
TI apparently did not realize that this port is inclusive of the addresses it indicates. TI outputs 20h to this port in the boot code hoping to make the execution protection region 4000h - 7FFFh, but they did not realize that in fact this sets the upper limit to 83FFh.
This port does not exist on the standard 83 Plus. See ports 5 and 16 instead. Execution of code on addresses above the limit set here will cause a reset. The typical default value is 20h.
