Difference between revisions of "84PCE:Ports:A000"
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Calc84maniac (Talk | contribs) (Added documentation about OS behavior, fixed some CE-specific things) |
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| − | The controller works by scanning | + | The controller works by scanning multiple rows into data registers; rather than manually selecting rows like previous versions. |
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| − | + | For example, if you set the controller to scan 3 rows, it will affect only the data in F00010h, F00012h, F00014h, and leave the others alone. There's not really a reason to set anything other than 8 rows, though. | |
| − | + | You will want to disable interrupts when performing your own scans, as OS interrupts will modify the controller's state. | |
| − | + | Alternatively, if you want to make use of the OS's scans, you will want to first check the scan mode to ensure the data registers are valid. The OS leaves the controller in mode 1 when no keys are pressed, which renders the data registers useless. | |
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---- | ---- | ||
| − | '''Controller | + | '''Controller Registers:''' |
* F50000 (R/W): | * F50000 (R/W): | ||
** Bits 0-1: Scan mode | ** Bits 0-1: Scan mode | ||
*** Mode 0: Idle. | *** Mode 0: Idle. | ||
| − | *** Mode 1: Indiscriminate key detection. Data registers are | + | *** Mode 1: Indiscriminate key detection. Data registers are invalid, but whenever any key is pressed, interrupt bit 2 is set (and cannot be cleared until the key is released). |
*** Mode 2: Single scan. The keypad is scanned once, and then the mode returns to 0. | *** Mode 2: Single scan. The keypad is scanned once, and then the mode returns to 0. | ||
*** Mode 3: Continuous scan. When scanning completes, it just starts over again after a delay. | *** Mode 3: Continuous scan. When scanning completes, it just starts over again after a delay. | ||
| − | ** Bits 2-15: Number of APB cycles to wait before scanning each row | + | ** Bits 2-15: Number of APB cycles to wait before scanning each row (default value is 960; bits 2-7 are 0 so the mode can be written directly to F50000) |
| − | ** Bits 16-31: Number of APB cycles to wait between scans | + | ** Bits 16-31: Number of APB cycles to wait between scans (default value is 3840) |
* F50004 (R/W): | * F50004 (R/W): | ||
** Bits 0-7: Number of rows to read (later rows are not updated in F50010-F5002F, and just read as whatever they were before being disabled) | ** Bits 0-7: Number of rows to read (later rows are not updated in F50010-F5002F, and just read as whatever they were before being disabled) | ||
| − | ** Bits 8-15: Number of columns to read (later column bits in a row are set to | + | ** Bits 8-15: Number of columns to read (later column bits in a row are set to 0 when it is updated) |
* F50008 (R/W): Keypad interrupt status/acknowledge (3-bit). Write "1" bits to acknowledge. | * F50008 (R/W): Keypad interrupt status/acknowledge (3-bit). Write "1" bits to acknowledge. | ||
** Bit 0: Keypad scan complete | ** Bit 0: Keypad scan complete | ||
Revision as of 22:38, 1 April 2015
Synopsis
Port Number: A000-?
Memory-mapped address: F50000-?
Function: Keypad Controller options
Using the keypad
- This is the layout of what the keypad looks like according to the controller:
| Address | Bit 0 | Bit 1 | Bit 2 | Bit 3 | Bit 4 | Bit 5 | Bit 6 | Bit 7 |
|---|---|---|---|---|---|---|---|---|
| F50010 | ||||||||
| F50012 | graph | trace | zoom | wind | y= | 2nd | mode | del |
| F50014 | on | sto | ln | log | x^2 | x^-1 | math | alpha |
| F50016 | 0 | 1 | 4 | 7 | , | sin | apps | X |
| F50018 | . | 2 | 5 | 8 | ( | cos | prgm | stat |
| F5001A | (-) | 3 | 6 | 9 | ) | tan | vars | |
| F5001C | enter | + | - | * | / | ^ | clear | |
| F5001E | down | left | right | up |
The controller works by scanning multiple rows into data registers; rather than manually selecting rows like previous versions.
For example, if you set the controller to scan 3 rows, it will affect only the data in F00010h, F00012h, F00014h, and leave the others alone. There's not really a reason to set anything other than 8 rows, though.
You will want to disable interrupts when performing your own scans, as OS interrupts will modify the controller's state.
Alternatively, if you want to make use of the OS's scans, you will want to first check the scan mode to ensure the data registers are valid. The OS leaves the controller in mode 1 when no keys are pressed, which renders the data registers useless.
Controller Registers:
- F50000 (R/W):
- Bits 0-1: Scan mode
- Mode 0: Idle.
- Mode 1: Indiscriminate key detection. Data registers are invalid, but whenever any key is pressed, interrupt bit 2 is set (and cannot be cleared until the key is released).
- Mode 2: Single scan. The keypad is scanned once, and then the mode returns to 0.
- Mode 3: Continuous scan. When scanning completes, it just starts over again after a delay.
- Bits 2-15: Number of APB cycles to wait before scanning each row (default value is 960; bits 2-7 are 0 so the mode can be written directly to F50000)
- Bits 16-31: Number of APB cycles to wait between scans (default value is 3840)
- Bits 0-1: Scan mode
- F50004 (R/W):
- Bits 0-7: Number of rows to read (later rows are not updated in F50010-F5002F, and just read as whatever they were before being disabled)
- Bits 8-15: Number of columns to read (later column bits in a row are set to 0 when it is updated)
- F50008 (R/W): Keypad interrupt status/acknowledge (3-bit). Write "1" bits to acknowledge.
- Bit 0: Keypad scan complete
- Bit 1: Keypad data register changed
- Bit 2: Key pressed in mode 1
- F5000C (R/W): Keypad interrupt mask (3-bit). Set each bit to 1 if the corresponding event in [F50008] should cause an interrupt.
- F50010-F5002F (R): Keypad data, one halfword per row.
- F50030-F5003F (R/W): Keypad GPIOs. Each register is 20 bits, with one bit per GPIO. The role of each register is unknown.
NOTE: The CE appears to use the same keypad controller as the nSpire CX.
