Difference between revisions of "83Plus:Ports:21"
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* '''Mode 3*''': Execution is allowed on pages 81h only. | * '''Mode 3*''': Execution is allowed on pages 81h only. | ||
| − | ''* In modes 1 to 3, execution is also allowed on the first 1024 bytes of each page immediately following a normally allowed page because TI screwed up on [[83Plus:Ports:26|port 26h]].'' | + | ''* In modes 1 to 3, execution is also allowed on the first 1024 bytes of each page immediately following a normally allowed page because TI screwed up on [[83Plus:Ports:26#Comments|port 26h]].'' |
(If you ever attempt to execute code from a "disallowed" page, the calculator resets.) | (If you ever attempt to execute code from a "disallowed" page, the calculator resets.) | ||
Revision as of 16:39, 28 June 2011
| This port only exists as a distinct port on the TI-83 Plus Silver Edition, the TI-84 Plus, and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 01. |
| This port is protected, which means user programs cannot ordinarily write to it directly. |
Synopsis
Port Number: 21h
Function: Flash Type / RAM Protection
The lower nibble of this port is related to flash. Specifically, the boot code sets bit 0 to 0 to indicate that a 1 MB flash chip is installed, and 1 to indicate that a 2 MB flash chip is installed. The high nibble is part of the RAM execution protection.
Read Values
- Bit 0: 1 on either the 83+ SE or the 84+ SE, 0 on the 84+ basic.
- Bit 1: Always set to zero
- Bits 4-5: current RAM protection mode (see below)
Write Values
- Bits 0, 1, 4, 5: set new values for these bits.
- Bits 2, 3, 6, 7: ignored
Comments
This port does not exist on the standard 83+. See port 2.
The value of this port is initialized by the boot code to either 01 (TI-83+ SE, TI-84+ SE) or 00 (TI-84+ basic.) Bit 0 can thus be used to determine the hardware type (in fact, the OS checks both bits 0 and 1, by ANDing the value with 3; it may be a good idea for user programs to do the same.)
RAM protection modes
Which RAM addresses are executable is determined by ports 25 and 26. The high nibble of port 21 controls how frequently the RAM protection loops. It will loop every 2^(value+1) pages. So, 0 loops every 2 pages, and 3 loops every 16 pages (in other words, not at all).
With the default values of 10h and 20h in ports 25 and 26:
- Mode 0 (the default): Execution is allowed on pages 81h, 83h, 85h, 87h, 89h, 8Bh, 8Dh, and 8Fh.
- Mode 1*: Execution is allowed on pages 81h, 85h, 89h, and 8Dh.
- Mode 2*: Execution is allowed on pages 81h and 89h.
- Mode 3*: Execution is allowed on pages 81h only.
* In modes 1 to 3, execution is also allowed on the first 1024 bytes of each page immediately following a normally allowed page because TI screwed up on port 26h.
(If you ever attempt to execute code from a "disallowed" page, the calculator resets.)
Example
in a,(2) ld b,a and 80h jr z,TI83p_BE in a,(21h) and 3 jr z,TI84p_BE bit 5,b jr z,TI83p_SE ; calculator is an 84+ SE TI84p_BE: ; calculator is an 84+ BE TI83p_SE: ; calculator is an 83+ SE TI83p_BE: ; calculator is an 83+ BE
