Difference between revisions of "83Plus:Ports"
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* [[83Plus:Ports:04|Port 04h]] - Interrupt State Port / Memory Map Mode | * [[83Plus:Ports:04|Port 04h]] - Interrupt State Port / Memory Map Mode | ||
* [[83Plus:Ports:05|Port 05h]] - RAM Paging Port | * [[83Plus:Ports:05|Port 05h]] - RAM Paging Port | ||
− | * [[83Plus:Ports:06|Port 06h]] - Memory | + | * [[83Plus:Ports:06|Port 06h]] - Memory Bank A Port |
− | * [[83Plus:Ports:07|Port 07h]] - Memory | + | * [[83Plus:Ports:07|Port 07h]] - Memory Bank B Port |
* [[83Plus:Ports:14|Port 14h]] - Flash Unlock Port | * [[83Plus:Ports:14|Port 14h]] - Flash Unlock Port | ||
* [[83Plus:Ports:18|Ports 18h-1Fh]] - MD5 Calculation Ports (TI-83+ SE/TI-84+ only) | * [[83Plus:Ports:18|Ports 18h-1Fh]] - MD5 Calculation Ports (TI-83+ SE/TI-84+ only) |
Revision as of 19:42, 27 March 2005
This is the documentation of the TI-83+ family's IO ports, and how to interact with the calculator's hardware.
Please read our page on Contributing before editing these pages!
- Port 00h - Link Port
- Port 01h - Keyboard Port
- Port 04h - Interrupt State Port / Memory Map Mode
- Port 05h - RAM Paging Port
- Port 06h - Memory Bank A Port
- Port 07h - Memory Bank B Port
- Port 14h - Flash Unlock Port
- Ports 18h-1Fh - MD5 Calculation Ports (TI-83+ SE/TI-84+ only)
- Port 22h - Flash Execution Lower Limit (TI-83+ SE/TI-84+ only)
- Port 23h - Flash Execution Upper Limit (TI-83+ SE/TI-84+ only)
- Port 40h - Clock Control Port (TI-84+ Only)
- Ports 41h-44h - Clock Setting Ports (TI-84+ Only)
- Ports 45h-48h - Clock Current Time Ports (TI-84+ Only)