Difference between revisions of "83Plus:Ports:57"
m |
Thepenguin77 (Talk | contribs) |
||
Line 1: | Line 1: | ||
[[Category:83Plus:Ports:By Address|57 - USB Line Event Mask]] [[Category:83Plus:Ports:By Name|USB Line Event Mask]] | [[Category:83Plus:Ports:By Address|57 - USB Line Event Mask]] [[Category:83Plus:Ports:By Name|USB Line Event Mask]] | ||
+ | {{84P-Only Port|07}} | ||
== Synopsis == | == Synopsis == | ||
'''Port Number:''' 57h | '''Port Number:''' 57h | ||
Line 6: | Line 7: | ||
This port controls whether interrupts should be generated when the USB lines change. | This port controls whether interrupts should be generated when the USB lines change. | ||
− | |||
− | |||
=== Read Values === | === Read Values === |
Latest revision as of 20:15, 27 October 2011
This port only exists on the the TI-84 Plus and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 07. On the TI-83 Plus Silver Edition, this port has no effect. |
Synopsis
Port Number: 57h
Function: USB Line Event Mask
This port controls whether interrupts should be generated when the USB lines change.
Read Values
- Bit 0: Set if D+-low events are enabled.
- Bit 1: Set if D+-high events are enabled.
- Bit 2: Set if D−-low events are enabled.
- Bit 3: Set if D−-high events are enabled.
- Bit 4: Set if ID-low events are enabled.
- Bit 5: Set if ID-high events are enabled.
- Bit 6: Set if Vbus-high events are enabled.
- Bit 7: Set if Vbus-low events are enabled.
Write Values
- Bit 0: Set to allow D+-low events.
- Bit 1: Set to allow D+-high events.
- Bit 2: Set to allow D−-low events.
- Bit 3: Set to allow D−-high events.
- Bit 4: Set to allow ID-low events.
- Bit 5: Set to allow ID-high events.
- Bit 6: Set to allow Vbus-high events.
- Bit 7: Set to allow Vbus-low events.
Comments
This port allows you to trigger an interrupt when one of the USB lines changes from high to low, or low to high. For instance, if bit 6 of this port is set, an interrupt is generated when the Vbus line goes from low to high.
When such an interrupt occurs, port 55 bit 2 will be cleared, and port 56 will indicate which event(s) caused the interrupt. To acknowledge the interrupt, clear the appropriate bit of port 57.
An interrupt only occurs if the line changes while the corresponding bit of this port is set (e.g., if Vbus is already high, and you set bit 6, nothing will happen - Vbus would have to go low and then high again for an interrupt to be generated.)