Difference between revisions of "83Plus:Ports:96"
(Port 96: number of bytes received) |
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[[Category:83Plus:Ports:By Address|96 - USB Data-Received Counter]] [[Category:83Plus:Ports:By Name|USB Data-Received Counter]] | [[Category:83Plus:Ports:By Address|96 - USB Data-Received Counter]] [[Category:83Plus:Ports:By Name|USB Data-Received Counter]] | ||
| + | {{84P-Only Port|06}} | ||
== Synopsis == | == Synopsis == | ||
'''Port Number:''' 96h (LSB), 97h (MSB, hypothetical) | '''Port Number:''' 96h (LSB), 97h (MSB, hypothetical) | ||
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This port shows the number of bytes left to read from a USB pipe. | This port shows the number of bytes left to read from a USB pipe. | ||
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=== Read Values === | === Read Values === | ||
Latest revision as of 20:25, 27 October 2011
| This port only exists on the the TI-84 Plus and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 06. On the TI-83 Plus Silver Edition, this port has no effect. |
Synopsis
Port Number: 96h (LSB), 97h (MSB, hypothetical)
Function: USB Data-Received Counter
This port shows the number of bytes left to read from a USB pipe.
Read Values
- Bits 0-7: Number of bytes left to read.
Write Values
- No effect
Comments
When a data packet has been received - either an IN packet in host mode, or an OUT packet in peripheral mode - the contents of the packet are stored in an internal buffer in the USB controller. Each pipe has its own buffer; this port tells you how many bytes are currently in the queue for the current pipe. (The "current" pipe is determined by port 8E.)
The contents of the buffer can be retrieved using the appropriate Ax port. As you read bytes from the buffer, port 96 will count down to zero.
Port 97 is probably the MSB; this should be tested. (Note that, for full-speed devices, the maximum size permitted for a single control, bulk, or interrupt data packet is 64 bytes - see sections 5.5 to 5.8 of the USB specification. Isochronous packets may be up to 1023 bytes.)
