Difference between revisions of "83Plus:Ports:5B"
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(Port 5B - enable/disable protocol interrupts) |
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[[Category:83Plus:Ports:By Address|5B - USB Protocol Interrupt Enable]] [[Category:83Plus:Ports:By Name|USB Protocol Interrupt Enable]] | [[Category:83Plus:Ports:By Address|5B - USB Protocol Interrupt Enable]] [[Category:83Plus:Ports:By Name|USB Protocol Interrupt Enable]] | ||
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== Synopsis == | == Synopsis == | ||
'''Port Number:''' 5Bh | '''Port Number:''' 5Bh | ||
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This port controls whether interrupts should be generated for USB protocol events. | This port controls whether interrupts should be generated for USB protocol events. | ||
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=== Read Values === | === Read Values === | ||
Latest revision as of 12:36, 7 November 2011
| This port only exists on the the TI-84 Plus and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 03. On the TI-83 Plus Silver Edition, this port has no effect. |
Synopsis
Port Number: 5Bh
Function: USB Protocol Interrupt Enable
This port controls whether interrupts should be generated for USB protocol events.
Read Values
- Bit 0: Set if USB protocol interrupts are enabled.
- Bit 1: Always 0
- Bit 2: Unknown
- Bits 3-7: Always 0
Write Values
- Bit 0: Set to allow USB protocol interrupts
- Bit 1: Not used
- Bit 2: Unknown
- Bits 3-7: Not used
Comments
When this port is set to 1, the USB controller will generate an interrupt whenever a USB transaction finishes, as well as for various other USB-protocol-related events.
When such an interrupt occurs, port 55 bit 4 will be cleared. Ports 82, 84, and 86 (and possibly 83 and 85) will tell you what event(s) caused the interrupt. Reading from any of these ports also clears it and acknowledges the interrupt.
