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  • 83Plus:Ports:55
    ...lus:Ports:By Address|55 - USB Interrupt State]] [[Category:83Plus:Ports:By Name|USB Interrupt State]] * Bit 1: Normally set. This interrupt is related to ports 4F and 50.
    2 KB (305 words) - 18:18, 3 March 2020
  • 83Plus:Ports:5B
    ...By Address|5B - USB Protocol Interrupt Enable]] [[Category:83Plus:Ports:By Name|USB Protocol Interrupt Enable]] ...ill tell you what event(s) caused the interrupt. Reading from any of these ports also clears it and acknowledges the interrupt.
    1 KB (152 words) - 13:36, 7 November 2011
  • 83Plus:Ports:80
    ...Plus:Ports:By Address|80 - USB Device Address]] [[Category:83Plus:Ports:By Name|USB Device Address]]
    978 B (153 words) - 21:17, 27 October 2011
  • 83Plus:Ports:82
    ...s:Ports:By Address|82 - USB Write-Pipe Events]] [[Category:83Plus:Ports:By Name|USB Write-Pipe Events]] ...inished. This port holds the values for ports A0h-A7h. Similar to [[83Plus:Ports:83|port 83]].
    3 KB (503 words) - 21:17, 27 October 2011
  • 83Plus:Ports:84
    ...us:Ports:By Address|84 - USB Read-Pipe Events]] [[Category:83Plus:Ports:By Name|USB Read-Pipe Events]] ...finished. This port hold the values for ports A1h-A7h. Similar to [[83Plus:Ports:85|port 85]]
    3 KB (447 words) - 21:18, 27 October 2011
  • 83Plus:Ports:86
    ...orts:By Address|86 - USB Miscellaneous Events]] [[Category:83Plus:Ports:By Name|USB Miscellaneous Events]] ** Equivalent HDRC name: MGC_M_INTR_SUSPEND, also MGC_M_INTR_EP0
    2 KB (358 words) - 13:58, 14 August 2013
  • 83Plus:Ports:8C
    ...us:Ports:By Address|8C-8D - USB Frame Counter]] [[Category:83Plus:Ports:By Name|USB Frame Counter]] These ports show the current value of the USB frame counter.
    897 B (144 words) - 14:21, 14 August 2013
  • 83Plus:Ports:8E
    ...:83Plus:Ports:By Address|8E - USB Pipe Number]] [[Category:83Plus:Ports:By Name|USB Pipe Number]] ...pe is used by subsequent I/O operations. The following ports are affected by the currently-selected pipe:
    1 KB (209 words) - 14:20, 14 August 2013
  • 83Plus:Ports:90
    ...s:Ports:By Address|90 - USB Write Packet Size]] [[Category:83Plus:Ports:By Name|USB Write Packet Size]] * Bits 0-7: Maximum packet size for the current pipe, divided by 8.
    1 KB (214 words) - 21:23, 27 October 2011
  • 83Plus:Ports:93
    ...us:Ports:By Address|93 - USB Read Packet Size]] [[Category:83Plus:Ports:By Name|USB Read Packet Size]] * Bits 0-7: Maximum packet size for the current pipe, divided by 8.
    1 KB (199 words) - 21:25, 27 October 2011
  • 83Plus:Ports:96
    ...rts:By Address|96 - USB Data-Received Counter]] [[Category:83Plus:Ports:By Name|USB Data-Received Counter]] ...queue for the current pipe. (The "current" pipe is determined by [[83Plus:Ports:8E|port 8E]].)
    1 KB (206 words) - 21:25, 27 October 2011
  • 83Plus:Ports:98
    ...Address|98 - USB Write Endpoint Type/Address]] [[Category:83Plus:Ports:By Name|USB Write Endpoint Type/Address]] ...ritten to the current pipe. (The "current" pipe is determined by [[83Plus:Ports:8E|port 8E]].)
    2 KB (338 words) - 21:25, 27 October 2011
  • 83Plus:Ports:9A
    ...y Address|9A - USB Read Endpoint Type/Address]] [[Category:83Plus:Ports:By Name|USB Read Endpoint Type/Address]] ...read from the current pipe. (The "current" pipe is determined by [[83Plus:Ports:8E|port 8E]].)
    2 KB (300 words) - 21:26, 27 October 2011
  • 83Plus:Ports:91
    ...orts:By Address|91 - USB Write Command/Status]] [[Category:83Plus:Ports:By Name|USB Write Command/Status]] * Bit 3: Unknown, but sometimes used by the OS.
    13 KB (2,153 words) - 21:23, 27 October 2011
  • 83Plus:Ports:83
    ...ddress|83 - USB Write-Pipe Events (continued)]] [[Category:83Plus:Ports:By Name|USB Write-Pipe Events (continued)]] ...ort hypothetically holds the values for ports A8h-AFh. Similar to [[83Plus:Ports:82|port 82]]
    1 KB (202 words) - 21:18, 27 October 2011
  • 83Plus:Ports:85
    ...Address|85 - USB Read-Pipe Events (continued)]] [[Category:83Plus:Ports:By Name|USB Read-Pipe Events (continued)]] ...port hypothetically hold the values for ports A8h-AFh. Similar to [[83Plus:Ports:84|port 84]].
    1 KB (202 words) - 21:19, 27 October 2011
  • 83Plus:Ports:87
    ...orts:By Address|87 - USB Output-Enabled Pipes]] [[Category:83Plus:Ports:By Name|USB Output-Enabled Pipes]] ...ich pipes in the A0h-A7h range are enabled for output. Similar to [[83Plus:Ports:88|port 88]].
    833 B (124 words) - 21:19, 27 October 2011
  • 83Plus:Ports:88
    ...ess|88 - USB Output-Enabled Pipes (continued)]] [[Category:83Plus:Ports:By Name|USB Output-Enabled Pipes (continued)]] ...ich pipes in the A8h-AFh range are enabled for output. Similar to [[83Plus:Ports:87|port 87]]
    1 KB (154 words) - 21:20, 27 October 2011
  • 83Plus:Ports:89
    ...Ports:By Address|89 - USB Input-Enabled Pipes]] [[Category:83Plus:Ports:By Name|USB Input-Enabled Pipes]] ...hich pipes in the A0h-A7h range are enabled for input. Similar to [[83Plus:Ports:8A|port 8A]].
    822 B (126 words) - 14:31, 24 September 2017
  • 83Plus:Ports:8A
    ...ress|8A - USB Input-Enabled Pipes (continued)]] [[Category:83Plus:Ports:By Name|USB Input-Enabled Pipes (continued)]] ...hich pipes in the A8h-AFh range are enabled for input. Similar to [[83Plus:Ports:89|port 89]]
    1,012 B (155 words) - 21:21, 27 October 2011
  • 83Plus:Ports:5A
    ...- USB Presentation Link Port Mirroring Enable]] [[Category:83Plus:Ports:By Name|USB Presentation Link Port Mirroring Enable]] ...dware, which redirects writes to ports [[83Plus:Ports:10|10]] and [[83Plus:Ports:11|11]] to outgoing bulk endpoint 02.
    2 KB (239 words) - 13:37, 7 November 2011
  • 83Plus:OS:Ram Pages
    [[Category:83Plus:OS_Information|Ram Pages]] '''It should be noted that on the newer calculator models ([[83Plus:Ports:15|port 15]] >= 55h) pages 82-87 refer to the same physical memory'''
    2 KB (376 words) - 12:44, 4 March 2020
  • 83Plus:Ports:60-7F
    ...83Plus:Ports:By Address|60-7F - 40-5F Mirrors]] [[Category:83Plus:Ports:By Name|40-5F Mirrors]] ...rts are all exact mirrors of ports 40-5F. Reading or writing to any of the ports is functionally equivalent to reading or writing to it's 40-5F counterpart.
    347 B (61 words) - 21:16, 27 October 2011
  • 83Plus:Ports:54
    ...:Ports:By Address|54 - USB Controller Control]] [[Category:83Plus:Ports:By Name|USB Controller Control]] This port controls the USB controller. It is closely tied to [[83Plus:Ports:4C|port 4C]]
    1 KB (241 words) - 18:16, 3 March 2020
  • 83Plus:Ports:4C
    ...s:Ports:By Address|4C - USB Controller Status]] [[Category:83Plus:Ports:By Name|USB Controller Status]] ...be a status port for the USB controller. It is closely tied with [[83Plus:Ports:54|port 54]]. If the USB controller is not powered, this port will always r
    1 KB (233 words) - 17:58, 3 March 2020
  • 83Plus:Ports:4A
    ...us:Ports:By Address|4A - Pull-up/down Control]] [[Category:83Plus:Ports:By Name|Pull-up/down Control]] * Bit 0: Set if 2 and 6 of [[83Plus:Ports:54|port 54]] are set, 3 of [[83Plus:Ports:4C|port 4C]] is set, and VBus is high.
    2 KB (241 words) - 17:42, 3 March 2020
  • 83Plus:Ports:8F
    ...ory:83Plus:Ports:By Address|8F - VBus Control]] [[Category:83Plus:Ports:By Name|VBus Control]] ...re set up correctly. Most notably [[83Plus:Ports:4C|port 4C]] and [[83Plus:Ports:54|port 54]].
    2 KB (267 words) - 19:32, 29 October 2014
  • 83Plus:Ports:25
    ...83Plus:Ports:By_Address|25 - RAM Execution Lower Limit]] [[Category:83Plus:Ports:By_Name|RAM Execution Lower Limit]] ...he actual pages and addresses affected also depends on the masking applied by port 21.
    1 KB (185 words) - 20:08, 27 October 2011
  • 83Plus:Ports:26
    ...83Plus:Ports:By_Address|26 - RAM Execution Upper Limit]] [[Category:83Plus:Ports:By_Name|RAM Execution Upper Limit]] ...he actual pages and addresses affected also depends on the masking applied by port 21.
    1 KB (238 words) - 20:08, 27 October 2011
  • 83Plus:Ports:23
    ...ategory:83Plus:Ports:By_Address|23 - Flash Upper Limit]] [[Category:83Plus:Ports:By_Name|Flash Upper Limit]] ...]: The new execution limit. You must enable flash access through [[83Plus:Ports:14|port 14]] first.
    1 KB (166 words) - 14:57, 20 January 2021
  • 83Plus:Ports:12
    ...3Plus:Ports:By Address|12 - LCD Command Mirror]][[Category:83Plus:Ports:By Name|LCD Command Mirror]] ...tegory:83:Ports:By Address|12 - LCD Command Mirror]][[Category:83:Ports:By Name|LCD Command Mirror]]
    601 B (94 words) - 17:41, 3 March 2020
  • 83Plus:Ports:27
    ...rts:By Address|27 - Block Memory Mapping C000h]][[Category:83Plus:Ports:By Name|Block Memory Mapping C000h]] By an order of 64 bytes per block, this port can re-map data from ram page 0 t
    1 KB (205 words) - 21:54, 13 March 2013
  • 83Plus:Ports:28
    [[Category:83Plus:Ports:By Address|28 - Block Memory Mapping 8000h]] [[Category:83Plus:Ports:By Name|Block Memory Mapping 8000h]]
    1 KB (196 words) - 09:30, 12 March 2013
  • 83Plus:Ports:22
    ...ategory:83Plus:Ports:By_Address|22 - Flash Lower Limit]] [[Category:83Plus:Ports:By_Name|Flash Lower Limit]] ...]: The new execution limit. You must enable flash access through [[83Plus:Ports:14|port 14]] first.
    1 KB (170 words) - 14:58, 20 January 2021
  • 83Plus:Ports:29
    ...3Plus:Ports:By Address|29 - LCD Delay (6 MHz)]] [[Category:83Plus:Ports:By Name|LCD Delay (6 MHz)]] ...ts [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.
    2 KB (277 words) - 23:49, 18 February 2013
  • 83Plus:Ports:2A
    ...3Plus:Ports:By Address|2A - LCD Delay(15 MHz)]] [[Category:83Plus:Ports:By Name|LCD Delay (15 MHz)]] ...ts [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.
    1 KB (241 words) - 20:49, 27 October 2011
  • 83Plus:Ports:2B
    ...s:Ports:By Address|2B - LCD Delay(15 MHz)(02)]] [[Category:83Plus:Ports:By Name|LCD Delay (15 MHz)(02)]] ...ts [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.
    1 KB (211 words) - 20:49, 27 October 2011
  • 83Plus:Ports:2C
    ...s:Ports:By Address|2C - LCD Delay(15 MHz)(03)]] [[Category:83Plus:Ports:By Name|LCD Delay (15 MHz)(03)]] ...ts [[83Plus:Ports:10|10]] or [[83Plus:Ports:11|11]], as well as the mirror ports 12 and 13.
    1 KB (211 words) - 20:49, 27 October 2011
  • 83Plus:Ports:13
    ...y:83Plus:Ports:By Address|13 - LCD Data Mirror]][[Category:83Plus:Ports:By Name|LCD Data Mirror]] [[Category:83:Ports:By Address|13 - LCD Data Mirror]][[Category:83:Ports:By Name|LCD Data Mirror]]
    583 B (94 words) - 17:42, 3 March 2020
  • 83Plus:Ports:14
    ...[[Category:83Plus:Ports:By_Address|14 - Flash Control]] [[Category:83Plus:Ports:By_Name|Flash Control]] ...ions. However, writes are only accepted after the [[:Category:83Plus:Ports:By Address:Protected|unlock sequence]] is executed from a protected page.
    1 KB (205 words) - 15:40, 11 May 2014
  • 83Plus:Ports:2E
    ...lus:Ports:By Address|2E - Memory Access Delay]] [[Category:83Plus:Ports:By Name|Memory Access Delay]] ...sh. This port's effect is enabled by the lcd delay port currently selected by the current CPU speed.
    2 KB (319 words) - 11:17, 9 December 2020
  • 83Plus:Ports:2F
    [[Category:83Plus:Ports:By Address|2F - LCD Wait Delay/Crystal Timer Adjust]] [[Category:83Plus:Ports:By Name|LCD Wait Delay/Crystal Timer Adjust]]
    2 KB (307 words) - 16:30, 3 March 2020
  • 83Plus:Ports:3A
    [[Category:83Plus:Ports:By_Address|3A - GPIO Read/Write]] [[Category:83Plus:Ports:By_Name|GPIO Read/Write]] ...voltage testing, and on the TI-84+CSE, controlling the backlight. [[83Plus:Ports:39|Port 39h]] appears to be the GPIO setup register. More work is needed to
    4 KB (711 words) - 17:34, 25 October 2014
  • 83Plus:State of the calculator at boot
    ...port values were all found on an 84+SE hardware revision M with a [[83Plus:Ports:15|port 15]] value of 55h. * The LCD driver is disconnected ([[83Plus:Ports:29|port 29]] causes this)
    4 KB (839 words) - 14:03, 17 February 2012
  • 83Plus:BCALLs:42F1
    ...m]] [[Category:83Plus:BCALLs:By Name|ChkFindSym]] [[Category:83Plus:BCALLs:By Address|42F1 - ChkFindSym]] '''Official Name:''' ChkFindSym
    1 KB (199 words) - 22:57, 16 January 2013
  • 83Plus:Ports:8B
    ...:83Plus:Ports:By Address|8B - USB Events Mask]] [[Category:83Plus:Ports:By Name|USB Events Mask]] This port is a mask for what errors [[83Plus:Ports:86|port 86]] will report.
    1,023 B (163 words) - 22:48, 15 August 2013
  • 83Plus:Memory Mapping
    ...data from addresses 1C000h to 1FFFFh are in Z80 addresses 4000h to 7FFFh. By writing to port 6, you can make a different set of flash memory appear in 4 ...pages. Everything else has either 3 or 8 pages, depending on the [[83Plus:Ports:15|ASIC version]]; 48 K of RAM implies 3 pages, whereas 128 K of RAM implie
    7 KB (1,299 words) - 23:10, 19 May 2013
  • 83Plus:Interrupts
    [[Category:83Plus:General Hardware Information|Interrupts]] ...'t bother to specify an index into the table, so we have to poll different ports to figure out what generated the interrupt. Furthermore, you will note that
    6 KB (949 words) - 21:05, 28 June 2013
  • Contributing
    ...s discovered. Therefore, it is our goal in WikiTI to store all information by internal addresses, instead of names, as the former can't be confused. ...family, the category, and the address (in hexadecimal). Each is separated by a colon.
    3 KB (541 words) - 12:54, 12 March 2013
  • 83Plus:USB
    [[Category:83Plus:General Hardware Information|USB]] All of the ports defined in musbhdrc.h begin in the Z80 port address space starting at 80h,
    3 KB (584 words) - 18:59, 13 November 2014

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