83Plus:Ports:08

Synopsis

Port Number: 08h

Function: Link Assist Enable

This port controls whether the hardware link assist is enabled.

Read Values

• Bit 1: 1 if link assist will generate an interrupt when a byte is received. (Link assist must be enabled)
• Bit 2: 1 if link assist will generate an interrupt when a byte can be sent. (Link assist must be enabled)
• Bit 3: 1 if link assist will generate an interrupt when an error has occurred. (Link assist must be enabled)
• Bit 7: 1 if the link assist is disabled.

Write Values

• Bit 1: Set to generate an interrupt when link assist receives a byte. (Link assist must be enabled)
• Bit 2: Set to generate an interrupt when link assist is able to send byte. (Link assist must be enabled)
• Bit 3: Set to generate an interrupt when an error occurs. (Link assist must be enabled)
• Bit 7: 1 to disable the link assist.

Comments

This port only exists on the 83+ SE and the 84+.

Programs which directly control the link port should disable the hardware assist.

The timeout for the link assist is ~2 seconds.

Interrupts

Link Assist hardware can generate an interrupt when a byte is received, when a byte can be sent or when an error in transmission occurs.

To enable an interrupt when a byte is received write 01 to port 08. When a byte received and an interrupt is generated bit 0 of port 9 is set. Like all interrupts this one needs to be acknowledged, do this by reading the byte from port 0A.

To enable an interrupt when a byte can be sent write 2 to port 08. When the the link assist is not busy it will generate an interrupt so you can send data. Bit 1 of port 9 is set when this interrupt generates. You acknowledge this interrupt by writing to port 0D.

To enable an interrupt when an error occurs have bit 2 set when you write to port 08. It is not necessary to have the the other link assist interrupts enabled but you can. When this interrupt generates bit 2 of port 9 is set, and it is acknowledged by reading port 9.

The biggest benefit from the link assist interrupts is that no time must wasted waiting, it could take millisecond to send or receive a byte. With interrupts that time can be put to more useful code. I don't believe that you should have both the send and receive interrupts enabled at the same. But really communication would dictate who is sending and receiving. Remember that TI-OS does not seem to handle these interrupts, disable them when your through.

Credits and Contributions

• Michael Vincent: Original documentation of the link assist
• James Montelongo: Interrupt information