83Plus:OS:Raw Flash Commands

The TI-83+ through TI-84+SE has a flash chip whose data can be erased and rewritten. Issuing write and erase commands is done through memory-mapped writes. The flash chip will not accept any commands unless flash is unlocked. Additionally, any read from flash while issuing a command sequence will abort the command sequence. Consequentially, command sequences can only be issued from RAM.

Writing and Erasing

It takes the flash chip a long time to perform a write or erase operation. During this time, it is impossible to read data from the flash chip, because all reads will simply report a status byte.

Writing

writeFlashByte: ; Writes a byte to flash. Flash must be unlocked. Be aware that pressing CLEAR ; will abort the write. ; Inputs: ; - B: Byte to write ; - C: Page ; - HL: Address to write to. This will not be wrapped. ; Outputs: ; - NZ on failure ; Kills: ; - AF, BC ; Protips: ; - Calling writeFlashByteRaw instead will skip the page changing ; - Do push bc \ pop af afterwards to restore flags to pre-call values. That's ; right, documented side-effect programming! in a, (memPageAPort) ; save page push af ld a, c out (6), a di call writeFlashByteRaw ; ei pop bc ; restore page without screwing up flags ld a, b out (memPageAPort), a ret writeFlashByteRaw: ; Flash program sequence ld a, 0AAh ; First bus cycle---unlock ld (0AAAh), a ld a, 55h ; Second bus cycle---unlock ld (0555h), a ld a, 0A0h ; Third bus cycle---write command ld (0AAAh), a ld (hl), b ; Fourth bus cycle---program data ; Wait for data to be good ld a, 0FDh ; This checks for the CLEAR key. out (keyPort), a ; If pressed, it aborts. inc hl dec hl programWaitLoop: in a, (keyPort) cp 0BFh jr z, abortProgram ld a, b xor (hl) bit 7, a jr z, programDone bit 5, (hl) jr z, programWaitLoop abortProgram: ld a, 0F0h ld (0000h), a inc a programDone: ret