83Plus:Ports:84

From WikiTI
Revision as of 20:18, 27 October 2011 by Thepenguin77 (Talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search
This port only exists on the the TI-84 Plus and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 04. On the TI-83 Plus Silver Edition, this port has no effect.

Synopsis

Port Number: 84h

Function: USB Read-Pipe Events

This port reports when a USB transaction on a "read" pipe has finished. This port hold the values for ports A1h-A7h. Similar to port 85

Read Values

Reading from this port also clears it. Remember the value you read, because you can't go back and read it again.

  • Bit 0: Always 0.
  • Bit 1: Set if a read transaction has finished on pipe 1.
  • Bit 2: Set if a read transaction has finished on pipe 2.
  • Bit 3: Set if a read transaction has finished on pipe 3.
  • Bit 4: Hypothetically, set if a read transaction has finished on pipe 4.
  • Bit 5: Hypothetically, set if a read transaction has finished on pipe 5.
  • Bit 6: Hypothetically, set if a read transaction has finished on pipe 6.
  • Bit 7: Hypothetically, set if a read transaction has finished on pipe 7.

Write Values

  • No effect

Comments

This port is used to report the status of port-94 USB transactions. Note that this port only works if port 5B bit 0 is set. Port 89 might also act as a mask for this port.

After you write a command to port 94, the USB controller will attempt to perform the appropriate transaction for you. This may, of course, take some time (if the calculator is the host, you must wait for the peripheral to respond; if the calculator is the peripheral, you must wait for the host to ask you to speak.) If the calculator is host and the peripheral doesn't have any data to send (it sends a NAK), the controller will need to re-try the transaction, possibly several times. When the transaction actually finishes, a Z80 interrupt will be generated, and the appropriate bit of this port will be set.

As a host, transactions are considered to have "finished" when the peripheral device has either sent a valid data packet, sent a STALL (indicating an error condition), or failed to reply. Which of these has occurred can be determined from port 94 (with port 8E set appropriately.) Port 96 tells you how many data bytes were received.

As a peripheral, transactions are considered to have "finished" when a valid data packet has been received from the host, or possibly also when the host has tried to send a data packet and the calculator has replied with a STALL.

Port-91 transactions (i.e., OUT transactions as host, IN transactions as peripheral, and all control transactions) are associated with port 82.

Isochronous transactions haven't been tested, and might behave differently.