Difference between revisions of "83Plus:Ports:25"
From WikiTI
(added default value) |
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| Line 12: | Line 12: | ||
* Page 81h: Addresses 004000h to 007FFFh | * Page 81h: Addresses 004000h to 007FFFh | ||
* Page 82h: Addresses 008000h to 00BFFFh | * Page 82h: Addresses 008000h to 00BFFFh | ||
| − | etc. | + | etc. The actual pages and addresses affected also depends on the masking applied by port 21. |
=== Read Values === | === Read Values === | ||
| Line 25: | Line 25: | ||
== See Also == | == See Also == | ||
* [[83Plus:Ports:26|Port 26]] | * [[83Plus:Ports:26|Port 26]] | ||
| + | * [[83Plus:Ports:21|Port 21]] | ||
Revision as of 23:49, 28 June 2011
| This port only exists as a distinct port on the TI-83 Plus Silver Edition, the TI-84 Plus, and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 03. |
| This port is protected, which means user programs cannot ordinarily write to it directly. |
Synopsis
Port Number: 25h
Function: Controls the RAM Execution Lower Limit
This port control the lower limit of RAM execution. It maps the RAM memory space in 1024 byte segments as though it was one continuous address space:
- Page 80h: Addresses 000000h to 003FFFh
- Page 81h: Addresses 004000h to 007FFFh
- Page 82h: Addresses 008000h to 00BFFFh
etc. The actual pages and addresses affected also depends on the masking applied by port 21.
Read Values
- [00h - FFh]: Multiply the value in this port by 400h to get the lowest RAM address that can run code.
Write Values
- [00h - FFh]: Select a new lower limit.
Comments
This port does not exist on the standard 83 Plus. See ports 5 and 16 instead. Execution of code on addresses below the limit set here will cause a reset. The typical default value is 10h.
