Difference between revisions of "84PCE:Ports:0006"

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(Change based on known behavior, the other bits should be investigated more.)
(Bit [0])
(3 intermediate revisions by one other user not shown)
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=== Bit [0] ===
 
=== Bit [0] ===
Latches value written, no apparent effect.
+
Latches value written, OS defaults this to set. Resetting this bit reduces current consumption by about 3 mA, so it does ''something.''
  
 
=== Bit [1] ===
 
=== Bit [1] ===
Line 18: Line 18:
 
Set this bit to enable display updates if bit 1 is ever reset. ???
 
Set this bit to enable display updates if bit 1 is ever reset. ???
  
This bit is known to unlock protected mmio ports, such as [[84PCE:Ports:2000|SHA256]].
+
This bit is known to unlock protected ports, such as [[84PCE:Ports:2000|SHA256]],
 +
and enables the [[84PCE:Ports:0028#Bit_.5B3.5D|flash unlock sequence]].
 
It is cleared every time the boot code interrupt handler runs.
 
It is cleared every time the boot code interrupt handler runs.
  
 
=== Bit [3] ===
 
=== Bit [3] ===
 
Writes do not latch; no apparent effect.
 
Writes do not latch; no apparent effect.
 +
 +
Used by OS on Python Edition.
  
 
=== Bit [4] ===
 
=== Bit [4] ===

Revision as of 17:02, 20 October 2019

Synopsis

Port Number: 0006

Function: Unknown

Details

This port seems to affect the display refresh.

Bit [0]

Latches value written, OS defaults this to set. Resetting this bit reduces current consumption by about 3 mA, so it does something.

Bit [1]

Reset this bit to disable display upadates.

Bit [2]

Set this bit to enable display updates if bit 1 is ever reset. ???

This bit is known to unlock protected ports, such as SHA256, and enables the flash unlock sequence. It is cleared every time the boot code interrupt handler runs.

Bit [3]

Writes do not latch; no apparent effect.

Used by OS on Python Edition.

Bit [4]

Flash lock status.

Bits [7:3]

Writes do not latch; no apparent effect.