Difference between revisions of "84PCE:Ports:E000"
From WikiTI
(→Synopsis) |
(Updated based on FTUART010) |
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'''Memory-mapped Address:''' F90000 | '''Memory-mapped Address:''' F90000 | ||
| − | '''Function:''' ARM Coprocessor | + | '''Function:''' ARM Coprocessor |
| − | + | ||
| − | + | ||
| + | This appears to be an FTUART010 (which is 16550A-compatible), & is connected to the ARM coprocessor on Python Edition. The 16550 register layout (see [https://www.lammertbies.nl/comm/info/serial-uart], for example) works after multiplying its offsets by 4. | ||
{|- | {|- | ||
|<u>Port</u> | |<u>Port</u> | ||
| − | |<u> | + | |<u>Direction</u> |
| − | + | ||
|<u>Information</u> | |<u>Information</u> | ||
|- | |- | ||
|E000 | |E000 | ||
| − | |Read Write | + | |Read |
| − | | | + | Write |
| − | + | |Receive Holding Register | |
| + | Transmit Holding Register | ||
|- | |- | ||
|E004 | |E004 | ||
| − | |Write | + | |Read Write |
| − | | | + | |Interrupt Enable Register |
| − | + | ||
|- | |- | ||
|E008 | |E008 | ||
| − | |Read Write | + | |Read |
| − | | | + | Write |
| − | + | |Interupt Status Register | |
| + | FIFO Control Register | ||
|- | |- | ||
|E00C | |E00C | ||
|Read Write | |Read Write | ||
| − | | | + | |Line Control Register |
| − | | | + | |- |
| + | |E010 | ||
| + | |Read Write | ||
| + | |Modem Control Register | ||
|- | |- | ||
|E014 | |E014 | ||
|Read | |Read | ||
| − | | | + | |Line Status Register |
| − | + | ||
|- | |- | ||
|E018 | |E018 | ||
|Read | |Read | ||
| − | | | + | |Modem Status Register |
| − | + | ||
|- | |- | ||
|E01C | |E01C | ||
| − | |Write | + | |Read Write |
| − | | | + | |Scratchpad Register |
| − | | | + | |- |
| + | |E068 | ||
| + | |Read | ||
| + | |01? (not from 16550) | ||
| + | |- | ||
| + | |E06C | ||
| + | |Read | ||
| + | |01? (not from 16550) | ||
| + | |- | ||
| + | |E070 | ||
| + | |Read | ||
| + | |10? (not from 16550) | ||
|- | |- | ||
|} | |} | ||
Revision as of 17:35, 5 May 2021
Synopsis
Port Number: E000-EFFF
Memory-mapped Address: F90000
Function: ARM Coprocessor
This appears to be an FTUART010 (which is 16550A-compatible), & is connected to the ARM coprocessor on Python Edition. The 16550 register layout (see [1], for example) works after multiplying its offsets by 4.
| Port | Direction | Information |
| E000 | Read
Write |
Receive Holding Register
Transmit Holding Register |
| E004 | Read Write | Interrupt Enable Register |
| E008 | Read
Write |
Interupt Status Register
FIFO Control Register |
| E00C | Read Write | Line Control Register |
| E010 | Read Write | Modem Control Register |
| E014 | Read | Line Status Register |
| E018 | Read | Modem Status Register |
| E01C | Read Write | Scratchpad Register |
| E068 | Read | 01? (not from 16550) |
| E06C | Read | 01? (not from 16550) |
| E070 | Read | 10? (not from 16550) |
