Difference between revisions of "Talk:83Plus:OS:84 Plus USB Information"

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I read the bit about device PIDs and theorized that the 89T was the 000F that it rejected... I hooked it up to my computer and it reported PID=E004, which isn't even an option from what he said. Also, in #wikiti: ''<+Kalimero> exactly, and 84P has pid E008'', which makes me think that it drops the E for OnTheGo transfers.. That explains that, but not what the other devices are. I think it'd be safe to theorize that the ViewScreen adapter would be "allowed", but... Didn't it come out after the calculators, so it would have a higher PID? Hold on, I just had another idea in #wikiti: ''<Andy_J> looking at the PIDs, it would seem that the 84+SE might be 0003, then the 89T would be 0004, then some mysteries, and the 84+ being 0008... maybe they originally planed to just have the 84+SE?'' So if that were the case, what are 0005 through 0007? Just some random ideas to throw out there. --[[User:AndyJ|AndyJ]] 08:11, 27 May 2005 (PDT)
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This page was split since it was getting large; see also the [[Talk:83Plus:OS:84_Plus_USB_Information/1|second page]].
: I'm doing my testing on an 84PSE, by the way.  I assume everything about the regular 84P is the same, but I don't have one to check.  The CBL2 has to fit in there somewhere.  I have one in Ann Arbor, so when I go back there I'll check the PID.  This code (that looks for 0008, etc) isn't necessarily the total "allowed" list either, as the code that checks for Vernier devices is elsewhere, it's just some random code that I stumbled upon and thought I'd mention, even though I wasn't planning on checking into the details at the moment.  --[[User:Dan Englender|Dan Englender]] 11:32, 27 May 2005 (PDT)
+
::Alright, throw that theory out the window. :D --[[User:AndyJ|AndyJ]] 12:02, 27 May 2005 (PDT)
+
:By the way, the 0008 vs E008 has a simple explanation: I was typing up the page at 6 AM and my brain wasn't working very well.  I meant E008, E00F, and E003.  Oops :)  --[[User:Dan Englender|Dan Englender]] 12:39, 27 May 2005 (PDT)
+
:In the course of doing some other research, I found that Andy was (almost) right. E008 is the 84P SE, E003 is the 84P regular.  Still don't know what E00F is.
+
::From what you've written, it sounds like E00F is almost certainly the presentation link, given that (A) connecting the presentation link presumably requires the screen to be refreshed, and (B) having the presentation link connected prevents any other (software driven) USB devices from being used.  From which I suppose we can infer that TI has no plans to support hubs :) [[User:FloppusMaximus|FloppusMaximus]] 10:00, 15 Jun 2005 (PDT)
+
More info on those PIDs:
+
On Ti-89 Titanium, the only PIDs which seem to be accepted are E004 (Titanium) and E00E (???). Also Romain Liévin pointed out to me a few months ago that Texas Instruments's Win32 driver supports this list of PIDs:
+
  
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E003 => TI84+
+
== Currently unresearched ports ==
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E004 => Titanium
+
There are some ports whose function which we haven't yet agreed on, but I thought I'd compile a list of ports that neither of us have touched yet:
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E008 => TI84+SE
+
* 81: This I/O port is used extensively on the 84P.
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E009
+
* 8B: This output port is used extensively on the 84P.
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E00A
+
**On Titanium, 0x37 is written to this port in some code which disables all the pipes (which may be related to OTG's HNP). Also 0xF7 is written just after a loop which waits for bit 5 of port 81 to be cleared, at the beginning of the code to setup as host. These are the only 2 uses.
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E00B
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* 92: This seems to be another setup port.  It may have something to do with interrupts.
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E00C
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* 95: In similar fashion to the other ports in this range, this is probably the incoming pipe version of port 92.
%DESCRIPTION%=DriverInstall,USB\VID_0451&PID_E00D
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* 9C - 9F: These ports are not used at all in the OS, and I would have just ignored them altogether, except the port monitor caught the value of 9F changing from 00 to 66 at some point during the USB communicationsIt's possible this is just junk data though.
--[[User:ExtendeD|ExtendeD]] 16:16, 29 Jun 2005 (PDT)
+
:Ok, I speculate that E00F is the 84+ ViewScreen adapter and E00E is the 89T ViewScreen. We won't know for sure until we get our hands on one of each. --[[User:AndyJ|AndyJ]] 17:57, 29 Jun 2005 (PDT)
+
::I agree that that seems likely.  Also, the CBR2 can connect somehow to the 84 via USB.  I'm not sure whether it will have a TI or a Vernier ID though. I don't really want to drop the dough for that one to find out.  I may buy the Vernier EasyLink when it comes out though. --[[User:Dan Englender|Dan Englender]] 19:07, 29 Jun 2005 (PDT)
+
  
== Source ==
+
Then there are the lower ports on the 84P, which I don't know, but am guessing are different on the 89t, since I haven't heard anything about them:
 +
* 39: Various bits are either set or reset on this port.
 +
* 3A: Various bits are set and reset on this port, but bit 3 is checked and used to determine whether to output to port 4B, among other things.
 +
**Port 3A is never used on Titanium. Port 4B is used only at reset time where it is initialized, and only if bit 4 of port 31 is not set (this bit is normally used to stall a pipe... But here the pipe is not selected with port 8E).
 +
***Oddly, the default state of port 3A seems to be 00 on the 84P, and 0F on the 84P SE.  I can't imagine what SE vs regular would have to do with USB though, so maybe there's something I'm missing. ----- After finding some more pwople with 84's, I've changed my mind.  It seems that boot version 1.00 the port is 0F, and boot version 1.02 the port is 00.  I'd like to look at the boot code for both of those to see the differences, but I'm going to put that on the back burner for the moment.
 +
* 4A: This output port is only sent a value of 20 by the OS.
 +
**Initialized also with 0x20 at reset time on Titanium.
 +
* 4B: This output port is sent a value of 0 or 20 by the OS.
 +
* 4F: Some weird bit sets and resets are in some circumstances done during the host's device init routine.
 +
* 50: A value of 27 goes out this port during the same init code as descrbied in 4F above.
 +
**Ports 4F and 50 are never used on Titanium.
 +
* 54: various values are outputted, or bit 0 is set, on this port.
 +
**On Titanium: I am pretty sure this port has something to do with OTG's HNP.
 +
* 57: I/O port.  No clue.
 +
* 5A: A value of 1 is sent to this port during E00F setup.
 +
**Same on Titanium but for device E00E. Some pieces of code check if this port has a value of 1: trap #4 (the hardware trap to shutdown the calc), the high-level function called "USBCheckReceived" by Kevin Kofler used during file transfers (it quits if it is 1: no transfers if we are configured to used the adapter), the ROM Call EV_getc (which calls a routine that checks if the device has been unplugged, with 56:5), and the USB interrupt, which calls the same routine as EV_getc instead of the standard handler.
  
>>  Source code will be going on SourceForge sometime in the near future.
+
...These lower ports are especially odd because many of them are used very few times, or just once, in the OS. Does the 89T have anything that might resemble these?  --[[User:Dan Englender|Dan Englender]] 00:52, 10 Jul 2005 (PDT)
  
What's the project name, or do you not have it made yet? --[[User:AndyJ|AndyJ]] 14:55, 28 Jun 2005 (PDT)
+
I suspect some missing initializations on Titanium that do exist on 84P to be due to a different interpretation of the USB controller's datasheet by the 2 teams of developpers. --[[User:ExtendeD|ExtendeD]] 03:56, 10 Jul 2005 (PDT)
:Haven't made it yet.  I hate the overhead of having to use SourceForge, so I'm avoiding it as long as possible. --[[User:Dan Englender|Dan Englender]] 15:16, 28 Jun 2005 (PDT)
+
  
== Ports ==
+
:So the 84+ and 89T use the same USB controller (yes, that's blatantly obvious, but we'd better actually put it in writing for inquiring minds. Also, I needed an excuse to bulletize ExtendeD's additions). --[[User:AndyJ|AndyJ]] 08:44, 10 Jul 2005 (PDT)
  
Dan: did you notice, as on Titanium, that 0 was written to port 2E instead of port 8E, in the routine handling device requests, before sending an "ACK without data phase", to select endpoint 0? For the other types of acknowledgement (NAK and "ACK with data phase"), its 8E, as you have written. --[[User:ExtendeD|ExtendeD]] 13:43, 30 Jun 2005 (PDT)
+
== HNP ==
:This isn't the case on the 84P.  Regardless of whether there's a data phase, a value of 0 is sent out port 8E.  (Port 2E isn't a USB port on the 84P either.)  As for the command ports though, I still haven't quite figured out port 94 vs port 91 yet though.  It seems like 94 is used for interrupt transfer, and 91 is used for both control and bulk, but I can't see why that makes sense.  --[[User:Dan Englender|Dan Englender]] 21:42, 30 Jun 2005 (PDT)
+
(lets start in a new section, there will be many things to talk about)
:This may sound silly, but could it be that the port 2E on the titanium is a typo?  Because if endpoint 0 was currently selected by a previous command (which it probably was if you're doing standard device requests), you could probably leave out the setting of port 8E altogether.  I only ask because I've found a few very silly typos in the 84P USB code which only happen to work by "luck".  --[[User:Dan Englender|Dan Englender]] 21:47, 30 Jun 2005 (PDT)
+
::By the way here are the ports used in the USB code of the Titanium, that you haven't yet mentionned:
+
  
::22, 24, 26, 27, 29, 2E, 2F, 31, 32, 34, 39, 4A, 54, 56, 57, 5A, 67, 81, 89, 8B, 92, 95, 96, 98, 99, 9A
+
Before a transmission between 2 Titaniums, the sending calculator first tries to become host: it tests if it is a A-device or B-device according to the plug inserted. If it is a B-device, it tries to become host with HNP. If it is a A-device, it tries to configure itself as a host (and perhaps many other things, the state diagram is as complicated as the one for a B-device). I don't know exactly what the receiving calculator do, but it also calls the routine for a A-device. I suspect the calculators both to try to become host: the first calculator to achieve this will be the host. Then come the bulk transfers.
  
:::The ports used for output on the 84P are: 39, 3A, 4A, 4B, 4C, 4F, 50, 54, 57, 5B, 80, 81, 87, 89, 8B, 8E, 8F, 90, 91, 92, 93, 94, 95, 98, 9A, 9B. I haven't made a completele list of the input ports yet, but it's something like 39, 3A, 4C, 4D, 4F, 57, 81, 82, 84, 86, 87, 89, 8B, 8C, 8E, 8F, 90, 91, 93, 94, 98, 9A.  So it looks like your 80s and 90s might be mapped the same as the 84P, but maybe the other ports aren't? --[[User:Dan Englender|Dan Englender]] 12:13, 1 Jul 2005 (PDT)
+
So we have:
 +
*a state variable, that can get Ax and Bx values (Ax states may be for a A-device, Bx for a B-device). You can find an out-of-date global state diagram on my blog, search 'USB States' [http://www.yaronet.com/blogs/blog.php?id=176] (2 detailed and up-to-date diagrams are currently in paper form...). There is a routine for a A-device to become host (which try to move from state A0 to state A4), and a routine for a B-device to become host (states B0 to B5).
 +
*a function to move to a new state, that dispatches to handlers (one per state) that set the new state and perform port writtings.
 +
*a routine which check for incoming events on the bus, called by the 2 previous routines (A-device and B-device), and also called by the interrupt handler, and changes the current state according to the events read on different ports.
 +
In the 2 state diagrams (for a A-device and a B-device), there are ports modifications and tests everywhere as actions and transitions. Also some timers and loops are used (loops for 1 to 3 ms waitings, timers for 100ms to 1s timeouts). I am using the state diagrams at the end of the OTG spec, and this Powerpoint presentation by a guy from Cypress that details these complicated diagrams [http://www.usb.org/developers/presentations/pres0602/lane_hauck.pdf].
  
::About port 94: the only bit I have figured out is bit 5: setting it stalls the OUT bulk endpoint (this is what is done when SET FEATURE is sent for feature ENDPOINT_HALT). To unstall the endpoint, 34:7 is set and 34:5 is cleared.
+
It's past midnight in France, and I am tired... Perhaps I will convert tomorrow my paper diagrams to Visio ones, it will be easier to work with this as a reference for the Titanium's workflow. --[[User:ExtendeD|ExtendeD]] 15:20, 10 Jul 2005 (PDT)
 +
: OK, let me put what I have so far.  During the device initialization, if the port 4D reports that a B cable is connected, it will fork to the HNP routine.  This routine plays with ports 4C, 5B, 80, 81, 8B, and 8F (and possibly others if 3,3A is set).  There are a bunch of loops and waits in here too, but after that routine is done, it outputs 90 to port 57, and then just continues along the USB initialization as if it were host.
 +
:: ''but after that routine is done, it outputs 90 to port 57, and then just continues along the USB initialization as if it were host.'' I have this in my diagram (states B4 and B5). --[[User:ExtendeD|ExtendeD]] 03:51, 11 Jul 2005 (PDT)
 +
: On the A-side, it seems like bit 0 of port 55 reset in the interrupt indicates an HNP request.  I can't really tell from the port outputs, but it's the only interrupt request that seems unique to this process, so I guess it must be it.  Depending on the current memory state, the code might output to port 4C, and will output some (or various) values to port 57.  It looks like port 57 might be some kind the control port for these kinds of settings?
 +
:: On Titanium, 55:0 is never used (only bit 2 and 4, as you have documented them) --[[User:ExtendeD|ExtendeD]] 03:51, 11 Jul 2005 (PDT)
 +
:On the A-side, during initialization port 8F first reports the normal host setting, and then later changes to reflect HNP if it is active. This seems to agree with the state diagrams for HNP.
 +
::I have just finished the Visio for the state diagram of the B-device. Here it is in .vsd [http://membres.lycos.fr/extended/usb/b_device_hnp.zip] and in PNG [http://membres.lycos.fr/extended/usb/b_device_hnp.png] (use this link [http://membres.lycos.fr/extended/usb/] if you have problems with the referrer using IE). --[[User:ExtendeD|ExtendeD]] 03:00, 11 Jul 2005 (PDT)
  
::Note that the ports and bits are different for the IN bulk endpoint: 31:4 is set to stall it, 91:6 is set and 91:4 is cleared to unstall it.--[[User:ExtendeD|ExtendeD]] 11:20, 1 Jul 2005 (PDT)
 
  
:::Yes, this seems very similar to what's going on on the 84P, but instead of using 31/91, just 91 is used, and instead of 34/94, just 94 is usedBut the bits to stall and clear the stall are the same.  --[[User:Dan Englender|Dan Englender]] 23:29, 1 Jul 2005 (PDT)
+
The state diagram is very nice.  Unfortunately I wasn't able to map what I read in the diagram to what I saw going on on the 84P.  So instead I took a little break from the research stuff and worked some more on the driver today.  I got bulk I/O working, and wrote another demo: this time with the silverlinkIn case anyone had been sitting up at night wondering, using the standard TI serial routines, the calculator can transmit data to itself at ~2.3 KB/s.  --[[User:Dan Englender|Dan Englender]] 23:25, 11 Jul 2005 (PDT)
  
I've had a thought that may be nonsense, but also might not be. I'll need to verify it later. It seems like most, if not all, of the ports in the 9X range have two versions: one for incoming pipes and one for outgoing pipes. For example, 90 and 93, 92 and 95, 98 and 9A all seem very similar both based on when they're called, and the values setIt also may be that more than just A0, A1, and A2 can be used for dataUsing ports 98 or 9A it might be able to set up other pipes. --[[User:Dan Englender|Dan Englender]] 00:18, 1 Jul 2005 (PDT)
+
== Meta ==
:I agree that these ports are similar. I would also add 99 and 9B (bInterval), and 87 and 89 (???).--[[User:ExtendeD|ExtendeD]] 11:22, 1 Jul 2005 (PDT)
+
Um... Dan, did you intend to revert a bunch of earlier changes  [http://wikiti.denglend.net/index.php?title=83Plus:OS:84_Plus_USB_Information&curid=1525&diff=1790&oldid=1789&rcid=2571 here] ? --[[User:FloppusMaximus|FloppusMaximus]] 17:40, 13 Jul 2005 (PDT)
 +
:No, I didn'tI've been having a lot of caching problems (I keep getting old copies of pages) and I have no idea whyI guess that was an example. I'll change them back soon --[[User:Dan Englender|Dan Englender]] 19:05, 13 Jul 2005 (PDT) -----  Fixed.  Thanks for pointing that out. --[[User:Dan Englender|Dan Englender]] 19:25, 13 Jul 2005 (PDT)
  
Dan, there is something I don't understand in Titanium's code, perhaps you can help me: only 2 routines write to port A0. The first one writes a packet, reading from a buffer in RAM. The second one that I don't understand) sends a packet formatted like this: 0 | something (seems to be 3 or 6) | address.lower | address.upper | endpoint.lower | endpoint.upper | something (seems to always be 0) | something (seems to always be 0). I am quite sure "address" and "endpoint" represent a device address and an endpoint, but I really can't figure out when this would be sent. Do you have something similar on 84P? --[[User:ExtendeD|ExtendeD]] 16:30, 1 Jul 2005 (PDT)
 
:I don't think there's anything like that on the 84P.  The closest I see is that during USB device initialization for calc<->calc, a Set Feature of 3 and 4 are sent (00 03 03 and 00 03 04, with the rest of the packet 00).  The receiving calculator plays with a couple of memory addresses when it gets these, but doesn't seem to do anything meaningful.  What do you mean by address.upper and endpoint.upper, as these aren't 16-bit values.  Just a 0?  I, also, am not sure what it could be.  Do you know if the code is ever actually called in the course of normal calculator operation?  I ask because there seems to be some leftover unused code in the 84P operating system that might have been debug code or something like that.  --[[User:Dan Englender|Dan Englender]] 21:16, 1 Jul 2005 (PDT)
 
::Ok, I have found out, I was completely wrong. The routine sends a setup packet (the "setup stage" of a control transfer). What helped is the Titanium's equivalent of your "5290 BCALL" I have located (by the way I am ok with what you have written about the max size of 8 bytes for the first request). --[[User:ExtendeD|ExtendeD]] 03:25, 2 Jul 2005 (PDT)
 
  
----
+
== 0.09 Updates ==
 
+
I've been working on version 0.09 of usb8xThe version in the CVS is relatively stable, but I'll be posting an official release sometime soonA couple things to mention:  
Hi guys.  I'm leaving tomorrow for a week on vacation. I wont have internet access, so I wont be able to post any updatesI'll take along a laptop and will hopefully get some work done, though, so I'll have updates to post when I get backI'll try to have another cool demo to show :)  --[[User:Dan Englender|Dan Englender]] 22:07, 1 Jul 2005 (PDT)
+
* In case anyone was wondering, the hardware allows you to setup the same pipe/endpoint number for both IN and OUT transfer.
 
+
* The issue with a lot of flash drives not working (i.e. sandisk cruzer) was a bug in usb8x caused by #1. It's been fixed.
----
+
* The new version includes a compile-time option for logging lots of internal state data to one of the extra RAM pagesHopefully this will be useful for debugging new drivers.
 
+
--[[User:Dan Englender|Dan Englender]] 00:41, 3 June 2006 (PDT)
Dan, I agree with your thoughts on ports 9A and AX. Port 9A is used to configure the type of an endpoint. BTW the USB controller supports 3 endpoints, (either as a device or host), 2 of which (at the most) can be in endpoints (IN means "from you to me", ie not in the USB-sense where the host is taken as reference). I don't know if this limit of 2 inendpoints is only a soft one, or a real limit of the USB controller. --[[User:ExtendeD|ExtendeD]] 12:21, 2 Jul 2005 (PDT)
+
:Quoting Dan from #WikiTI via his cell phone:
+
[15:38:45] <Dan_E> I See What Extended Is Saying About The Three end points from looking at port data      
+
[15:41:02] <Dan_E> but the whole ax range seems to be mapped as oppossed to the bx range so maybe its an init thing
+
[15:42:04] <Dan_E> can someone post that to the wikithanks.
+
:--[[User:AndyJ|AndyJ]] 16:26, 2 Jul 2005 (PDT)
+

Latest revision as of 00:41, 3 June 2006

This page was split since it was getting large; see also the second page.

Currently unresearched ports

There are some ports whose function which we haven't yet agreed on, but I thought I'd compile a list of ports that neither of us have touched yet:

  • 81: This I/O port is used extensively on the 84P.
  • 8B: This output port is used extensively on the 84P.
    • On Titanium, 0x37 is written to this port in some code which disables all the pipes (which may be related to OTG's HNP). Also 0xF7 is written just after a loop which waits for bit 5 of port 81 to be cleared, at the beginning of the code to setup as host. These are the only 2 uses.
  • 92: This seems to be another setup port. It may have something to do with interrupts.
  • 95: In similar fashion to the other ports in this range, this is probably the incoming pipe version of port 92.
  • 9C - 9F: These ports are not used at all in the OS, and I would have just ignored them altogether, except the port monitor caught the value of 9F changing from 00 to 66 at some point during the USB communications. It's possible this is just junk data though.

Then there are the lower ports on the 84P, which I don't know, but am guessing are different on the 89t, since I haven't heard anything about them:

  • 39: Various bits are either set or reset on this port.
  • 3A: Various bits are set and reset on this port, but bit 3 is checked and used to determine whether to output to port 4B, among other things.
    • Port 3A is never used on Titanium. Port 4B is used only at reset time where it is initialized, and only if bit 4 of port 31 is not set (this bit is normally used to stall a pipe... But here the pipe is not selected with port 8E).
      • Oddly, the default state of port 3A seems to be 00 on the 84P, and 0F on the 84P SE. I can't imagine what SE vs regular would have to do with USB though, so maybe there's something I'm missing. ----- After finding some more pwople with 84's, I've changed my mind. It seems that boot version 1.00 the port is 0F, and boot version 1.02 the port is 00. I'd like to look at the boot code for both of those to see the differences, but I'm going to put that on the back burner for the moment.
  • 4A: This output port is only sent a value of 20 by the OS.
    • Initialized also with 0x20 at reset time on Titanium.
  • 4B: This output port is sent a value of 0 or 20 by the OS.
  • 4F: Some weird bit sets and resets are in some circumstances done during the host's device init routine.
  • 50: A value of 27 goes out this port during the same init code as descrbied in 4F above.
    • Ports 4F and 50 are never used on Titanium.
  • 54: various values are outputted, or bit 0 is set, on this port.
    • On Titanium: I am pretty sure this port has something to do with OTG's HNP.
  • 57: I/O port. No clue.
  • 5A: A value of 1 is sent to this port during E00F setup.
    • Same on Titanium but for device E00E. Some pieces of code check if this port has a value of 1: trap #4 (the hardware trap to shutdown the calc), the high-level function called "USBCheckReceived" by Kevin Kofler used during file transfers (it quits if it is 1: no transfers if we are configured to used the adapter), the ROM Call EV_getc (which calls a routine that checks if the device has been unplugged, with 56:5), and the USB interrupt, which calls the same routine as EV_getc instead of the standard handler.

...These lower ports are especially odd because many of them are used very few times, or just once, in the OS. Does the 89T have anything that might resemble these? --Dan Englender 00:52, 10 Jul 2005 (PDT)

I suspect some missing initializations on Titanium that do exist on 84P to be due to a different interpretation of the USB controller's datasheet by the 2 teams of developpers. --ExtendeD 03:56, 10 Jul 2005 (PDT)

So the 84+ and 89T use the same USB controller (yes, that's blatantly obvious, but we'd better actually put it in writing for inquiring minds. Also, I needed an excuse to bulletize ExtendeD's additions). --AndyJ 08:44, 10 Jul 2005 (PDT)

HNP

(lets start in a new section, there will be many things to talk about)

Before a transmission between 2 Titaniums, the sending calculator first tries to become host: it tests if it is a A-device or B-device according to the plug inserted. If it is a B-device, it tries to become host with HNP. If it is a A-device, it tries to configure itself as a host (and perhaps many other things, the state diagram is as complicated as the one for a B-device). I don't know exactly what the receiving calculator do, but it also calls the routine for a A-device. I suspect the calculators both to try to become host: the first calculator to achieve this will be the host. Then come the bulk transfers.

So we have:

  • a state variable, that can get Ax and Bx values (Ax states may be for a A-device, Bx for a B-device). You can find an out-of-date global state diagram on my blog, search 'USB States' [1] (2 detailed and up-to-date diagrams are currently in paper form...). There is a routine for a A-device to become host (which try to move from state A0 to state A4), and a routine for a B-device to become host (states B0 to B5).
  • a function to move to a new state, that dispatches to handlers (one per state) that set the new state and perform port writtings.
  • a routine which check for incoming events on the bus, called by the 2 previous routines (A-device and B-device), and also called by the interrupt handler, and changes the current state according to the events read on different ports.

In the 2 state diagrams (for a A-device and a B-device), there are ports modifications and tests everywhere as actions and transitions. Also some timers and loops are used (loops for 1 to 3 ms waitings, timers for 100ms to 1s timeouts). I am using the state diagrams at the end of the OTG spec, and this Powerpoint presentation by a guy from Cypress that details these complicated diagrams [2].

It's past midnight in France, and I am tired... Perhaps I will convert tomorrow my paper diagrams to Visio ones, it will be easier to work with this as a reference for the Titanium's workflow. --ExtendeD 15:20, 10 Jul 2005 (PDT)

OK, let me put what I have so far. During the device initialization, if the port 4D reports that a B cable is connected, it will fork to the HNP routine. This routine plays with ports 4C, 5B, 80, 81, 8B, and 8F (and possibly others if 3,3A is set). There are a bunch of loops and waits in here too, but after that routine is done, it outputs 90 to port 57, and then just continues along the USB initialization as if it were host.
but after that routine is done, it outputs 90 to port 57, and then just continues along the USB initialization as if it were host. I have this in my diagram (states B4 and B5). --ExtendeD 03:51, 11 Jul 2005 (PDT)
On the A-side, it seems like bit 0 of port 55 reset in the interrupt indicates an HNP request. I can't really tell from the port outputs, but it's the only interrupt request that seems unique to this process, so I guess it must be it. Depending on the current memory state, the code might output to port 4C, and will output some (or various) values to port 57. It looks like port 57 might be some kind the control port for these kinds of settings?
On Titanium, 55:0 is never used (only bit 2 and 4, as you have documented them) --ExtendeD 03:51, 11 Jul 2005 (PDT)
On the A-side, during initialization port 8F first reports the normal host setting, and then later changes to reflect HNP if it is active. This seems to agree with the state diagrams for HNP.
I have just finished the Visio for the state diagram of the B-device. Here it is in .vsd [3] and in PNG [4] (use this link [5] if you have problems with the referrer using IE). --ExtendeD 03:00, 11 Jul 2005 (PDT)


The state diagram is very nice. Unfortunately I wasn't able to map what I read in the diagram to what I saw going on on the 84P. So instead I took a little break from the research stuff and worked some more on the driver today. I got bulk I/O working, and wrote another demo: this time with the silverlink. In case anyone had been sitting up at night wondering, using the standard TI serial routines, the calculator can transmit data to itself at ~2.3 KB/s. --Dan Englender 23:25, 11 Jul 2005 (PDT)

Meta

Um... Dan, did you intend to revert a bunch of earlier changes here ? --FloppusMaximus 17:40, 13 Jul 2005 (PDT)

No, I didn't. I've been having a lot of caching problems (I keep getting old copies of pages) and I have no idea why. I guess that was an example. I'll change them back soon --Dan Englender 19:05, 13 Jul 2005 (PDT) ----- Fixed. Thanks for pointing that out. --Dan Englender 19:25, 13 Jul 2005 (PDT)


0.09 Updates

I've been working on version 0.09 of usb8x. The version in the CVS is relatively stable, but I'll be posting an official release sometime soon. A couple things to mention:

  • In case anyone was wondering, the hardware allows you to setup the same pipe/endpoint number for both IN and OUT transfer.
  • The issue with a lot of flash drives not working (i.e. sandisk cruzer) was a bug in usb8x caused by #1. It's been fixed.
  • The new version includes a compile-time option for logging lots of internal state data to one of the extra RAM pages. Hopefully this will be useful for debugging new drivers.

--Dan Englender 00:41, 3 June 2006 (PDT)