Difference between revisions of "83Plus:Ports:29"

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(added warning about lcd not updating.)
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* Bit 0 enables the effects of the flash delay controlled by port 2E.
 
* Bit 0 enables the effects of the flash delay controlled by port 2E.
 
* Bit 1 enables the effects of the ram delay controlled by port 2E.  
 
* Bit 1 enables the effects of the ram delay controlled by port 2E.  
* Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added, divide the contents of port 29 by 4 and round off. '''NOTE:''' The contents of this port should NOT be less than 0Ch or the LCD will no longer update.
+
* Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added, divide the contents of port 29 by 4 and round off. '''NOTE:''' The contents of this port should NOT be less than 0Ch or the LCD driver will no longer respond.
  
 
== Comments ==
 
== Comments ==

Revision as of 14:43, 5 July 2011

This port only exists as a distinct port on the TI-83 Plus Silver Edition, the TI-84 Plus, and the TI-84 Plus Silver Edition. On the standard TI-83 Plus, it acts as a shadow of port 01.

Synopsis

Port Number: 29h

Function: LCD Delay (6 MHz)

This port removes the amount of delay needed between accesses to the LCD driver by adding a delay to any instruction which reads from or writes to ports 10 or 11, as well as the mirror ports 12 and 13.

Usage

  • Bit 0 enables the effects of the flash delay controlled by port 2E.
  • Bit 1 enables the effects of the ram delay controlled by port 2E.
  • Bits 2-7 control the amount of delay added at specified instructions. To calculate the number of clock cycles added, divide the contents of port 29 by 4 and round off. NOTE: The contents of this port should NOT be less than 0Ch or the LCD driver will no longer respond.

Comments

This port is not available on the normal TI-83+. On the normal TI-83+ this port is a shadow of Port 01h.

Bits 0&1 are reset on the 83+SE and set on the 84+(se).

The effect of this port is only seen if the contents of port 20h equals 00.


Credits and Contributions

  • Michael Vincent: Documentation as found here.
  • James Montelongo: Documentation found at here.