User contributions
From WikiTI
- 18:14, 20 May 2022 (diff | hist) . . (0) . . m 84PCE:Ports:000C (Typo in port number) (current)
- 18:13, 20 May 2022 (diff | hist) . . (+107) . . 84PCE:Ports:000C (Charging circuit control)
- 21:38, 21 January 2022 (diff | hist) . . (+87) . . 84PCE:Ports:1000 (Added need for flash unlock on M+) (current)
- 12:35, 9 December 2021 (diff | hist) . . (+42) . . Category:84PCE:General Hardware Information (Changed reset length threshold)
- 00:35, 9 December 2021 (diff | hist) . . (+565) . . Category:84PCE:General Hardware Information (Reset button behavior)
- 05:59, 22 September 2021 (diff | hist) . . (+14) . . 86:LCD Controller (Added link to ASIC & replaced port 4 with 04 to match usage elsewhere.) (current)
- 05:56, 22 September 2021 (diff | hist) . . (+4,639) . . N 86:ASIC (Created page with "The ASIC used in all known revisions of the TI-86 is an 80-pin QFP with part number T6A43. It contains a Z80-compatible CPU core & additional logic that implements the :Cate...")
- 00:01, 21 September 2021 (diff | hist) . . (+1,292) . . 86:Interrupts (Added brief description of OS ISR & its user interrupt handler support) (current)
- 21:38, 20 September 2021 (diff | hist) . . (+97) . . 86:Interrupts (Fixed behavior of IM 2 vectors in unused banks)
- 21:34, 20 September 2021 (diff | hist) . . (+2,258) . . N 86:Interrupts (Created page with "Interrupts Individual interrupt sources can be enabled, disabled, or acknowledged using Port 3. When an interrupt...")
- 13:32, 20 September 2021 (diff | hist) . . (+1) . . 84PCE:Wait States (Updated unmapped address space known revision range)
- 13:32, 20 September 2021 (diff | hist) . . (+1) . . Category:84PCE:RAM:By Address (Updated unmapped address space known revision range) (current)
- 12:59, 20 September 2021 (diff | hist) . . (+570) . . N 86:Ports:20 (Created page with "20 - External I/O External I/O == Synopsis == '''Port Number:''' 20-3Fh '''Function:''' None This port range i...") (current)
- 12:50, 20 September 2021 (diff | hist) . . (+161) . . Category:86:Ports:By Address (Port mirroring) (current)
- 12:47, 20 September 2021 (diff | hist) . . (+2,504) . . N 86:Ports:01 (Based on 83Plus:Ports:01, changed key labels & added battery level) (current)
- 06:03, 20 September 2021 (diff | hist) . . (+140) . . 86:Ports:03 (Fixed bit 1 & 3 write descriptions & linked to LCD controller page) (current)
- 05:56, 20 September 2021 (diff | hist) . . (-7) . . Category:86:General Hardware Information (No TI-86 "family") (current)
- 05:55, 20 September 2021 (diff | hist) . . (+154) . . N Category:86:General Hardware Information (Created page with "This is the central location for generic documentation on the TI-86 family hardware. Please read our page on Contributing before editing these pages!")
- 05:52, 20 September 2021 (diff | hist) . . (+79) . . Calculator Documentation (Added general hardware information) (current)
- 05:50, 20 September 2021 (diff | hist) . . (+11) . . 86:Memory Mapping (Fixed a link) (current)
- 05:48, 20 September 2021 (diff | hist) . . (+1,004) . . N 86:Ports:00 (Created page with "00 - LCD Base Address LCD Base Address == Synopsis == '''Port Number:''' 00h '''Function:''' LCD DMA Base Addre...") (current)
- 05:36, 20 September 2021 (diff | hist) . . (+2,345) . . N 86:Ports:04 (Created page with "04 - LCD Control LCD Control == Synopsis == '''Port Number:''' 04h '''Function:''' LCD Control, Memory Access C...") (current)
- 05:36, 20 September 2021 (diff | hist) . . (+2,805) . . N 86:LCD Controller (Created page with "LCD Controller The TI-86 has a memory-mapped STN liquid crystal display. The main portion of LCD controller is inside the ASIC, wi...")
- 03:15, 20 September 2021 (diff | hist) . . (+994) . . N 86:Ports:02 (Created page with "02 - Contrast Contrast == Synopsis == '''Port Number:''' 02h '''Function:''' LCD Contrast This port controls t...") (current)
- 02:22, 20 September 2021 (diff | hist) . . (+19) . . m 86:Memory Mapping (Added section heading for unused banks)
- 02:09, 20 September 2021 (diff | hist) . . (+2,109) . . N 86:Memory Mapping (Created page with "Memory Mapping == Memory Mapping == Memory on the TI-86 is divided into pages of 16 KiB each. Addresses in the 4000-BFFFh range ca...")
- 02:08, 20 September 2021 (diff | hist) . . (+623) . . N 86:Ports:06 (Created page with "06 - Upper Memory Bank Upper Memory Bank == Synopsis == '''Port Number:''' 06h '''Function:''' Upper Memory Ban...") (current)
- 02:07, 20 September 2021 (diff | hist) . . (-3) . . 86:Ports:05 (Fixed an incorrect link) (current)
- 02:06, 20 September 2021 (diff | hist) . . (+763) . . N 86:Ports:05 (Created page with "05 - Lower Memory Bank Lower Memory Bank == Synopsis == '''Port Number:''' 05h '''Function:''' Lower Memory Ban...")
- 00:15, 20 September 2021 (diff | hist) . . (+1,630) . . N 86:Ports:07 (Created page with "07 - Link Link == Synopsis == '''Port Number:''' 07h '''Function:''' Link Port This port controls the calculat...") (current)
- 23:24, 19 September 2021 (diff | hist) . . (0) . . 86:Ports:03 (Typo in category link)
- 23:23, 19 September 2021 (diff | hist) . . (+1,501) . . N 86:Ports:03 (Based on 83Plus:Ports:03)
- 12:59, 6 May 2021 (diff | hist) . . (+190) . . 84PCE:Ports:E000 (Added divisor latch) (current)
- 17:35, 5 May 2021 (diff | hist) . . (+407) . . 84PCE:Ports:E000 (Updated based on FTUART010)
- 23:51, 22 February 2021 (diff | hist) . . (+338) . . 84PCE:Wait States (Detailed timing for LCD controller)
- 01:28, 21 February 2021 (diff | hist) . . (+10) . . 84PCE:Wait States (F000 mirroring)
- 00:57, 21 February 2021 (diff | hist) . . (+650) . . 84PCE:Ports:0005 ((Mostly) not unknown) (current)
- 22:52, 20 February 2021 (diff | hist) . . (-128) . . 84PCE:Ports:0006 (Updated effect of bits 0 & 1 on port access (oops)) (current)
- 22:40, 20 February 2021 (diff | hist) . . (+289) . . 84PCE:Ports:0006 (Updated effect of bits 0 & 1 on port access)
- 22:25, 20 February 2021 (diff | hist) . . (-180) . . 84PCE:Ports:Control (Updated port 000D)
- 22:23, 20 February 2021 (diff | hist) . . (+992) . . N 84PCE:Ports:000D (Created page with "000D - Power control == Synopsis == '''Port Number:''' 000D '''Function:''' Power control == Details == This port enables power to vario...") (current)
- 17:59, 6 February 2021 (diff | hist) . . (0) . . 84PCE:Wait States (VRAM mirroring in unmapped space updated)
- 17:58, 6 February 2021 (diff | hist) . . (0) . . Category:84PCE:RAM:By Address ((VRAM mirroring in unmapped space updated))
- 10:03, 28 January 2021 (diff | hist) . . (-19) . . 84PCE:Wait States (VRAM mirroring in unmapped space updated)
- 10:03, 28 January 2021 (diff | hist) . . (-9) . . Category:84PCE:RAM:By Address (VRAM mirroring in unmapped space updated)
- 00:14, 28 January 2021 (diff | hist) . . (+101) . . Category:84PCE:RAM:By Address (VRAM mirroring in unmapped address space on L-N)
- 00:10, 28 January 2021 (diff | hist) . . (+153) . . 84PCE:Wait States (VRAM mirroring in unmapped address space on L-N)
- 14:07, 8 April 2020 (diff | hist) . . (+207) . . 84PCE:Ports:D000 (Updated based on FTSSP010 driver for Linux)