Talk:83Plus:Ports:01

new information

This information isn't that new, but I'm putting my source for what I wrote a few days ago here: https://www.omnimaga.org/asm-language/port-1-stuff/msg384239/#msg384239 (mainly about the delay and resetting, but it also casually mentions ghosting) and https://www.omnimaga.org/asm-language/(8x)-keyboard-madness/msg407118/#msg407118 (ghosting) Fghsgh (talk) 19:54, 8 March 2020 (PDT)

reset needed

From my experimentation with PindurTI, it seems to me that it is impossible to poll more than one group without reseting the keyport in betweeen. Being that I have never tested any direct key input routines. I know the directin routine from MirageOS resets before polling, and LearnAsm28d merely says that one "should" reset the port before switching groups. I hesitate to add this to the comments section without further confirmation. Saibot84 21:48, 1 June 2007 (PDT)

Well, for one 28days is not the best reference for hardware. And pindur is an emulator, so it has the limitations of the PC hardware and what CoBB was willing to put in. However, I decided to check this more since some people keep bringing it up. I have to say my result is not what I expected. It seems that it's possible that groups not even being monitored can affect what is read. I wrote this test program: Link for download. It checks the top row and the arrow group.

Actually being pressed	Arrow	Top Row	Setting arrow without reset	Both arrow and top row
Down	11111110	11111111	11111110	11111110
Zoom & Graph	11111111	11111010	11111111	11111010
Zoom & Graph & Down	11111010	11111010	11111010	11111010
Down & 0 & Sin	11011110	11111111	11011110	11011110
Down & sin	11111110	11111111	11111110	11111110

It seems to be a bug in hardware, dealing with when multiple keys are being pressed. It looks like the AND logic doesn't exists as much as we all thought before. Still though TI set the convention of reseting the key port, but they do it following reads, that may have an impact on the results. Though we still need more confirmation, I tested this with an 83+, 83+SE and 84+SE. --Jim e 09:14, 2 June 2007 (PDT)

Actually, your results look exactly like what I would expect. You need to keep in mind that all of the keys are eventually connected to the same "matrix." (This is true of most keyboards; we've discussed its effects on the TI Keyboard in the past.) Let's simplify the problem: say you have a keyboard with only four keys on it, arranged as follows:

  |    |
-(A)--(B)-
  |    |
-(C)--(D)-
  |    |

Pressing one of the keys A, B, C, or D results in a (very low-resistance) electrical connection between the vertical and horizontal trace. So, to scan one column of the keyboard, we connect that vertical trace to ground while leaving the other disconnected. Meanwhile we connect each horizontal trace to +5V through a large resistor. (OK, I don't know if that's exactly how it works in the TI, but let's pretend it does.) If we connect the first vertical trace to ground and we see that the first horizontal trace is high and the second is low, we can infer that the C key has been pressed.

But... what happens when you press A, B, and C all at once? If we pull just the first vertical trace low, obviously both horizontal traces go low. If we pull just the second vertical trace low... still both horizontal traces are low! This is because current can flow from the C key to the A key to the B key. It doesn't matter whether D is pressed or not. And in fact, there is no reliable way (in software) for us to tell which three of the four keys have been pressed.

I would guess that the reason for "resetting" port 1 each time, and for the delay between writing and reading, is to give the input some time to stabilize (it is, after all, an analog signal... the resistance of each key depends on how hard the user is pressing it.) Which in turn will decrease the bouncing effect, which is really important for TIOS, but less important for your average game.

So that's my non-electrical-engineer's answer :) FloppusMaximus 08:34, 4 June 2007 (PDT)

actualy, this is wrong.. the system looks like this

    (port, bit 0)
      *--I--|
            |      bit n, output
|----^      |
|  <   >----O--I-  3
|  | V------O--I-  2
|  *--------O--I-  1
*-----------O--I-  0

those bit O's are AND switches whit the port (port input is inverted first)
the I's are NOT switches
- and | and * are wires
i guess the reseting does only matter if you dont wair the required amount of time
Darkstone knight 01:17, 11 November 2008 (PST)

notice this is all theory.... i havent actualy tesed it myself Darkstone knight 01:25, 11 November 2008 (PST)