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- <h1>1-Var Stats</h1> | FR: <tt>Stats 1-Var </tt>4 KB (595 words) - 04:32, 30 September 2023
Page text matches
- 1. Start pindurti.exe. You will see any empty, fully cyan window. The four qu {| border="1" cellspacing="0" cellpadding="2"14 KB (2,275 words) - 13:57, 8 October 2012
- {| border="1" cellspacing="0" cellpadding="2" | I || Index register: ix, iy || i = 0, 130 KB (4,376 words) - 11:33, 9 December 2020
- ; It might be wise to IM 1 \ EI here.3 KB (459 words) - 11:04, 4 February 2013
- * ([[83Plus:RAM:8478|OP1]] + 1) to ([[83Plus:RAM:8478|OP1]] + 6) = variable name946 B (150 words) - 15:05, 21 December 2014
- NZ = 1 if G-T mode is set functionality is used. In G-T mode the screen is split vertically with 1/2 being634 B (94 words) - 09:14, 17 January 2021
- * Adjust the speed of the calculator from 1%-1600% Numpad 1 = Stats3 KB (394 words) - 10:35, 21 February 2020
- * '''83+SE / 84+(SE) only:''' Bit 1: At 15MHz this bit resets for a set delay after a command or data is sent t ** Bit 4: Last value written to port 05 bit 13 KB (406 words) - 20:03, 24 August 2016
- {| border="1" cellpadding="2" cellspacing="0" |1 || 01h || Port82 || The previous command failed or did not terminate. This6 KB (897 words) - 20:44, 30 August 2010
- ==TIOS 1.03== ...e features we know today; it's still "guidebook-compatible" with the later 1.x OSes, and most assembly programs will run on it without problems.6 KB (815 words) - 14:08, 17 February 2012
- ...last version and release date, ticalc.org (or other if not available) URL, 1 or 2 screenshots, and a few words about it. * Ztris 1.3.2 ~ by Tijl Coosemans ~ http://www.ticalc.org/archives/files/fileinfo/2074 KB (526 words) - 21:01, 27 July 2011
- ...ver, this also applies to smaller values, such that a 13 is saved as <code>1 13000000000000</code>. For small, rational, terminating values, it can be ...g ''')''' or '''"''' (parentheses/quotes) at the end of a line:You save '''1''' byte. The reason for this is that TIOS closes all still-open parentheses25 KB (4,440 words) - 15:47, 13 September 2018
- * Bit 1: Set if auto-increment or auto-decrement will affect the current column, or ...irroring on newer calculators. Bit 0 set enables horizontal mirroring, bit 1 set enables vertical mirroring.9 KB (1,583 words) - 20:36, 14 September 2021
- ** Dazzle Zio All in 1 Reader (required external power supply)3 KB (415 words) - 23:00, 6 May 2011
- ...e will read low if either calculator sets it low. Bit 0 is the tip and bit 1 is the ring. ...esponding line will read 1.) In other words, these bits reflect bits 0 and 1 from the most recent write to this port.4 KB (640 words) - 08:14, 17 March 2020
- {| width="40%" cellspacing="1" {| width="30%" cellspacing="1"8 KB (1,267 words) - 19:01, 15 June 2021
- {|align="center" border="1" cellpadding="1" style="text-align: center" !2!!1!!0!!7!!6!!5!!4!!3!!2!!1!!03 KB (459 words) - 09:44, 9 August 2011
- * Bit 1: Set if execution is not allowed in sector SA3 (pages 0C-0F.)2 KB (269 words) - 18:25, 3 March 2020
- * '''A = 1''': A large font bitmap is requested for fixed-width display. ...hifted left by 1 bit and copied to [[83Plus:RAM:845A|lFont_record]] ''plus 1'', so that (lFont_record) can be set to 6.4 KB (569 words) - 11:12, 5 September 2023
- <h1>1-Var Stats</h1> | FR: <tt>Stats 1-Var </tt>4 KB (595 words) - 04:32, 30 September 2023
- #REDIRECT [[Sandbox/1-Var Stats]]33 B (4 words) - 04:15, 30 September 2023
- ...ered counterclockwise around the ASIC package when viewed from above. Pins 1, 25, 41, & 65 are labeled on the PCB, although the label for 25 is offset f | 1. || A2 || A0-A19 are the address bus.5 KB (689 words) - 00:23, 20 June 2023
- * [[84PCE:Flags:4A#Bit_4|putmapDrawColor]] = 1 to use curFGColor/curBGColor (0 to use black/white) * [[84PCE:Flags:05#Bit_3|textInverse]] = 1 to swap foreground and background colors4 KB (570 words) - 20:09, 25 May 2015
- '''Length:''' 1 byte694 B (99 words) - 10:32, 26 May 2015
- '''Length:''' 1 byte679 B (95 words) - 10:32, 26 May 2015
- * DE = HL+1+BC ...uction to clear the memory block, so do not pass it a block length of 0 or 1 or it will erase 16777216 bytes.803 B (113 words) - 03:43, 16 July 2016
- * DE = HL+1+BC ...uction to clear the memory block, so do not pass it a block length of 0 or 1 or it will erase 16777216 bytes.863 B (129 words) - 03:45, 16 July 2016
- typeByte_SMC: =$+12 KB (369 words) - 15:00, 9 September 2015
- === Bits [1:0] ===916 B (141 words) - 14:48, 22 August 2022
- === Bit [1] ===1,003 B (142 words) - 00:57, 21 February 2021
- ...writing to the port. A pressed key reads a 0 bit. An unpressed key reads a 1 bit. ...ed group is pressed, the corresponding key bit reads 0, otherwise it reads 1 (active-low).2 KB (352 words) - 12:47, 20 September 2021
- == Interrupt Mode 1 == ...cess should not be disabled (see bit 6 of [[86:Ports:04|Port 4]]) while IM 1 is set & interrupts are enabled, or the calculator will likely crash.4 KB (630 words) - 00:01, 21 September 2021
- === Bits [7:1] ===290 B (37 words) - 22:39, 28 June 2019
- Divisor Latch LSB (when bit 7 of E00C is 1) Divisor Latch MSB (when bit 7 of E00C is 1)1 KB (204 words) - 12:59, 6 May 2021
- X is $05 for register 1, $35 for register 2, or $15 for register 3. Afterwards, wait for $E00818 bit 1 to be set and read register value from $E00900.2 KB (251 words) - 13:19, 13 December 2019
- 81A(1)h = Unknown, but contains the 1 byte data 007h [Bit 1 - App can use OpenLib]9 KB (1,446 words) - 13:43, 11 September 2020
- '''Length:''' 1 byte397 B (68 words) - 13:03, 25 May 2016
- '''Length:''' 1 byte294 B (44 words) - 00:02, 26 May 2016
- Deletes a particular entry in the user entry stack. Starts at 1; the '#' program represents the current entry. So if input was like this: 1820 B (120 words) - 14:34, 25 May 2016
- '''Length:''' 1 byte306 B (50 words) - 13:32, 25 May 2016
- '''Length:''' 1 byte327 B (53 words) - 13:31, 25 May 2016
- '''Length:''' 1 byte1,002 B (172 words) - 08:17, 26 May 2016
- '''Length:''' 1 byte478 B (71 words) - 05:58, 31 May 2016
- '''Unofficial Name:''' listName(1-20)466 B (76 words) - 12:15, 31 May 2016
- '''Length:''' 1 byte394 B (59 words) - 14:47, 31 May 2016
- ** 1-byte: 0000 to 02FD1 KB (158 words) - 21:19, 7 October 2017
- ...equal to 0, and '''C''' is the number of headers (basically, last index + 1). Return ''nz'' to mess up your calc. I can't guarentee what will happen. R * '''A=1''': The OS is about to draw one of the options. The number prefix has alrea4 KB (662 words) - 15:21, 20 September 2016
- * '''MenuCurrent+1:''' contains which header is selected (e.g. [NUM] in the [MATH] menu). Bytes two and three (the header and item) are zero-indexed, so item #1 is $00, item #2 is $01, etc.964 B (156 words) - 10:39, 18 July 2016
- === Bit [1] === Set this bit to enable display updates if bit 1 is ever reset. ???1 KB (153 words) - 22:52, 20 February 2021
- === Bit [1] === Reset to supposedly cause crash after ~1 second.428 B (58 words) - 21:38, 26 February 2021
- :bit 1: This is set if [[84PCE:Ports:0020|protected memory]] or any port is writte :Write a 1 to a bit to clear it in port 3D.465 B (74 words) - 22:04, 26 August 2016
- |CR0: Bits 12-15 indicate the protocol, set the value to 1 for SPI.<br/>The selected protocol determines the read mask; the effective ...whether this changes with CPU speed).<br/>Sending with a clock divider of 1 to the LCD has been empirically unreliable across models, but a divider of10 KB (1,637 words) - 15:25, 2 March 2024
- * Bit 0: 1 if link assist will generate an interrupt when a byte is received. (Link as * Bit 1: 1 if link assist will generate an interrupt when a byte has been sent. (Link3 KB (477 words) - 16:02, 3 March 2020
- ...n timings are determined by [[#B3: Frame Rate Control 1|Frame Rate Control 1]], [[#C6: Frame Rate Control 2|Frame Rate Control 2]], and [[#B2: Porch Set ...bit, the Frame Memory Pointer is reset when changing the RM bit from 0 to 1, which can be useful when the window is changed after frame synchronization55 KB (9,052 words) - 22:55, 9 March 2024
- * Bit 1: USB data+ line547 B (77 words) - 17:35, 3 March 2020
- * Bit 1: Unknown function818 B (127 words) - 17:53, 3 March 2020
- cpl ; a=(~A|1|~C|1|~E|1|~G|1) rrca ; a=(1|~A|1|~C|1|~E|1|~G), cf=12 KB (457 words) - 11:37, 26 April 2024
- <table border="1" cellspacing="0" cellpadding="2"> <tr><td>[[83Plus:RAM:8000|appData]] to [[83Plus:RAM:9D95|userMem]]-1</td>2 KB (301 words) - 11:36, 9 December 2020
- === Bit [1] === Writes have no effect. These bits read as 1 if the subsystems controlled by the corresponding bits in 0-3 are receiving992 B (143 words) - 22:23, 20 February 2021
- === Bits [7:1] ===366 B (55 words) - 18:14, 20 May 2022
- * Bit 1: Set if the [[86:LCD_Controller|LCD controller]] generated an interrupt (af ...0 to disable ON key interrupts and to acknowledge an ON key interrupt. Set 1 to enable ON key interrupts.2 KB (251 words) - 06:03, 20 September 2021
- * Bit 1: Ring (white wire) state. ...0: Unused if bit 4 is 0. Should be set to 0 if bits 2 & 4 are both set to 1.2 KB (275 words) - 00:15, 20 September 2021
- ...ame. If the number of rows per logical frame is set lower than 64 via bits 1-2 of [[86:Ports:04|Port 04]], the subsequent logical frames are stacked ver3 KB (470 words) - 05:59, 22 September 2021
- ...troller#DMA|DMA]] is still able to read from RAM normally when this bit is 1. * Bit 1-2: Number of rows per logical frame. This also affects the LCD interrupt sp2 KB (370 words) - 05:36, 20 September 2021
- * 1: The cursor is moving left to the graph style icon. This isn't called when *** c=1 Preparing to enable the function3 KB (441 words) - 23:10, 6 September 2016
- === Bit [1] ===458 B (71 words) - 21:38, 26 February 2021
- === Bit [1] ===843 B (126 words) - 16:29, 8 July 2021
- ...ability of a bit's state, while ensuring it has a 50% chance of being 0 or 1. As well, since the periods, 65536 and 65535 are coprime, then the overall seed1_0=$+16 KB (985 words) - 05:44, 5 October 2020
- ...will return failure. A value of 1 will be stored to HL+2, then a value of 1 will be output to port 8E, a value of 20h to port 94h, and success will be dw 1, TableEntryType, DataPtr27 KB (4,749 words) - 16:34, 28 November 2010
- out (1), a in a, (1)2 KB (383 words) - 13:44, 20 August 2017
- * IM 1 and IM 2 work.2 KB (378 words) - 11:13, 27 June 2013
- ** Bit 1: Set if the first hardware timer triggered the interrupt. * Bit 0 set to select memory map mode 1. In mode 1 the RAM and ROM is mapped to CPU memory as follows:6 KB (1,001 words) - 09:21, 15 March 2020
- * Bits 0-1: Set flash chip size (see below) * Bits 0, 1, 4, 5: set new values for these bits.3 KB (482 words) - 18:32, 20 February 2013
- ...gram any single bit from a 1 to a 0 at any time, but erasing from a 0 to a 1 can only be done on a per-sector basis. Each sector has a byte at the very6 KB (1,173 words) - 17:05, 23 October 2011
- _ldHLind equ 4009h ;l=a=(hl),h=(hl+1) _lcd_busy equ 4051h ;wait till bit 1 of port 2 is set130 KB (20,667 words) - 18:23, 20 February 2015
- <table border="1" cellpadding="2"> cp 13 KB (521 words) - 12:53, 17 November 2010
- ld c,-1 Na1: ld b,'0'-13 KB (410 words) - 06:51, 21 April 2010
- ld c,-1 Num1: ld a,'0'-12 KB (367 words) - 06:56, 21 April 2010
- ...uction to clear the memory block, so do not pass it a block length of 0 or 1 or it will erase 65536 bytes.682 B (99 words) - 10:00, 9 July 2010
- ...Plus:Ports:4C|port 4C]] is set, and VBus is high. (Cutoff for both between 1.5 V and 3 V) * Bit 3: Set if the D− line is high. (Cutoff between 1.5 V and 3 V)2 KB (305 words) - 21:01, 27 October 2011
- {| class="wikitable" border="1" TI-86 AShell v1.1, Rascall v0.9, and Yet Another Shell 2.219 KB (1,395 words) - 13:58, 20 April 2010
- ...with more instructions. And sometimes the equivalent 16-bit instruction is 1 more byte. If you use ix or iy registers operations are even slower and always are 1 byte bigger for each instruction. So try to convert your code to use hl and34 KB (5,809 words) - 15:15, 4 October 2020
- ...actually adc a, 0 but since c is free we set it to zero and so we can save 1 byte and up to 3 T-states per iteration3 KB (530 words) - 19:31, 28 April 2022
- ld de,1 res 1,d ; 810 KB (1,550 words) - 16:00, 30 September 2019
- :;February: 1: RPG Headquarter reopens and expands to Casio and HP models. :;January: 1: Inter-community disputes leads to Omnimaga closing.7 KB (957 words) - 10:56, 21 January 2015
- ld a,skAlpha-1 ; change to Alpha ld a,sk2nd-1 ; change to 2nd2 KB (366 words) - 10:55, 29 July 2011
- {| border="1" cellpadding="2" cellspacing="0" {| border="1" cellpadding="2" cellspacing="0"6 KB (885 words) - 10:49, 17 January 2010
- {| border="1" cellpadding="2" cellspacing="0"1 KB (207 words) - 11:07, 17 January 2010
- 1) [[83Plus:Software:USBTools/Stuff|Stuff]]662 B (97 words) - 13:16, 17 January 2010
- {| border="1" cellpadding="2" cellspacing="0" |LOGGING_ON || 0 || If set to 1, logging support will be compiled. Even if logging support is compiled, lo4 KB (588 words) - 14:39, 17 January 2010
- ...|real/complex values]]. TIOS includes 6 lists be default, <small>L</small>1-<small>L</small>6, that have special tokens. These tokens are secondary fu {0,1,2}2 KB (274 words) - 17:07, 18 January 2010
- ...n.ti.com/educationportal/downloadcenter/SoftwareDetail.do?website=US&tabId=1&appId=164] to download the latest version. It's interesting to note that ev * randIntNoRep( -- gives a list of random integers, with dimension high-low+1 randIntNoRep(low,high [EF 35]7 KB (1,175 words) - 12:42, 4 March 2020
- {| border="1" cellpadding="2" cellspacing="0"1 KB (149 words) - 19:52, 22 February 2010
- ** bit 1: set = use passthrough callback1 KB (153 words) - 19:54, 22 February 2010
- ld b,1771 B (93 words) - 19:54, 22 February 2010
- === Bit 1 ===1 KB (144 words) - 21:41, 22 November 2010
- '''Hook Active Flag:''' [[83Plus:Flags:36#Bit_1|1, (iy + 36h)]] * 1-3: A BASIC function has been encountered. The various types are described5 KB (747 words) - 14:41, 10 April 2010
- ...ode (the OS) versions will be presented. If the bootcode is anything below 1.03 you can downgrade by simply sending an older .8xu or a different OS like ==== What do I do if my bootcode is 1.03 ====7 KB (1,117 words) - 09:33, 17 January 2021
- out (1),a ; any part of keyboard is detected in a,(1)363 B (59 words) - 06:47, 21 April 2010
- ;based on the 1-byte xor routine from "learn ti 83+ asm in 28 days" ld e,(ix+1) ;194 KB (727 words) - 06:03, 16 May 2010
- ld (DL_VLinc+1),hl ; Modifying y increment ld (DL_HLinc+1),sp ; Backing up SP to a safe place6 KB (1,129 words) - 21:49, 30 July 2010
- '''Hook Active Flag:''' [[83Plus:Flags:35#Bit_1|1, (iy + 35h)]] ** 1 = RclWindow16 KB (2,294 words) - 10:25, 28 May 2010
- ; output: a = log2(hl) (rounded down and from -1 to 15) (8-bit integer signed) We can multiply by 1/log2(10).608 B (92 words) - 13:32, 17 June 2010
- * '''MenuCurrent+1:''' contains which header is selected (e.g. [NUM] in the [MATH] menu). Bytes two and three (the header and item) are zero-indexed, so item #1 is $00, item #2 is $01, etc.5 KB (549 words) - 14:43, 12 January 2011
- ...led. To uninstall the OFFSCRPT, the OFFSCRPT appvar must be deleted or bit 1 of (iy+33h) must be reset, or both. * Use an origin of appData+1.2 KB (292 words) - 12:30, 30 January 2016
- ...;put the carry flag in e (%00000000 becomes %10000000 if carry flag = 1) jr z,$+2+19 KB (1,308 words) - 02:15, 25 June 2010
- * Bit 1: Set if the D+ line has gone high.2 KB (285 words) - 21:15, 27 October 2011
- * Bit 1: Set if D+-high events are enabled. * Bit 1: Set to allow D+-high events.2 KB (289 words) - 21:15, 27 October 2011
- * Bit 1: Normally set. This interrupt is related to ports 4F and 50.2 KB (305 words) - 18:18, 3 March 2020
- * Bit 1: Always 0 * Bit 1: Not used1 KB (152 words) - 13:36, 7 November 2011
- ...n where only temporary variables are stored; this partition ends at OPBase+14 KB (547 words) - 07:53, 16 September 2010
- size | element number 1 | element number 24 KB (624 words) - 15:58, 16 September 2010
- * Bit 1: Set if a write transaction has finished on pipe 1.3 KB (503 words) - 21:17, 27 October 2011
- * Bit 1: Set if a read transaction has finished on pipe 1.3 KB (447 words) - 21:18, 27 October 2011
- * Bit 1:2 KB (358 words) - 13:58, 14 August 2013
- ...t, and/or isochronous transactions; they are typically mapped to endpoints 1 to 3, but do not necessarily need to be.1 KB (209 words) - 14:20, 14 August 2013
- ...ut the address in HL and the page in A. If the hook is in ram, the page is 1. And then call the specific bcall for that hook. **The flag is as simple as 1 is on 0 is off.4 KB (730 words) - 08:34, 11 July 2016
- Bits 4-5 are the endpoint type, corresponding to bits 0-1 of the bmAttributes field in the endpoint descriptor:2 KB (338 words) - 21:25, 27 October 2011
- Bits 4-5 are the endpoint type, corresponding to bits 0-1 of the bmAttributes field in the endpoint descriptor:2 KB (300 words) - 21:26, 27 October 2011
- ...be used in expressions like A+B->C+1->D so now C holds A+B and D holds A+B+1.2 KB (322 words) - 14:32, 1 January 2015
- * Bit 1: Set if we currently have a packet queued to be sent. * Bit 1: Set to send the currently-buffered data.13 KB (2,153 words) - 21:23, 27 October 2011
- * Bit 1: Hypothetically, set if a write transaction has finished on pipe 9.1 KB (202 words) - 21:18, 27 October 2011
- * Bit 1: Hypothetically, set if a read transaction has finished on pipe 9.1 KB (202 words) - 21:19, 27 October 2011
- * Bit 1: Set if pipe 1 is enabled for output.833 B (124 words) - 21:19, 27 October 2011
- * Bit 1: Hypothetically, set if pipe 9 is enabled for output.1 KB (154 words) - 21:20, 27 October 2011
- * Bit 1: Set if pipe 1 is enabled for input.822 B (126 words) - 14:31, 24 September 2017
- * Bit 1: Hypothetically, set if pipe 9 is enabled for input.1,012 B (155 words) - 21:21, 27 October 2011
- * Bits 1-7: Always 0 * Bits 1-7: Not used2 KB (239 words) - 13:37, 7 November 2011
- B_CALL PullDownChk ;cursor should move from entry 1 to entry 21 KB (206 words) - 20:35, 22 December 2010
- {| border="1" cellpadding="2" cellspacing="0"1 KB (150 words) - 07:53, 21 January 2011
- {| border="1" cellpadding="2" cellspacing="0"2 KB (289 words) - 07:54, 21 January 2011
- '''Length:''' 1 byte ...hen the independent (left) column is selected. It can also take the values 1 and 2 when you select either the left or right dependent column.655 B (101 words) - 08:23, 22 June 2011
- '''Length:''' 1 byte1 KB (226 words) - 07:50, 28 April 2011
- ...for between 250 and 1200 mAh; rechargeable batteries typically supply 1.2 V, with a similar capacity range, though usually lower. Because rech EOS 1.9 mA Idle, Homescreen9 KB (1,450 words) - 10:19, 9 March 2013
- === Bit 1 ===748 B (96 words) - 04:41, 10 May 2014
- This bit and bit 1 control the date notation, see bit 1 for more information. === Bit 1 ===1 KB (230 words) - 16:32, 1 June 2011
- * Bit 1: USB controller disable. Setting this disables the 48 MHz crystal. Resettin ...with 3, port [[83Plus:Ports:4C|port 4C]] turn the 80-AF ports on. Causes a 1.15 mA increase in draw.1 KB (241 words) - 18:16, 3 March 2020
- * Bit 1: Reset when a USB reset signal comes from the host1 KB (233 words) - 17:58, 3 March 2020
- * Bit 1: Set if not connected to computer. Flashes when talking to computer. ...cant if bit 3 is set. If this is set, D− gets extra power. Max total 1.52 mA.2 KB (241 words) - 17:42, 3 March 2020
- ** Set if VBus is high. (Cutoff between 1.5 V and 3 V) * Bit 1:2 KB (267 words) - 19:32, 29 October 2014
- * bit 1, 1FE0h = page 69h4 KB (749 words) - 09:25, 8 April 2015
- ...be validated on a calculator. It is stored as seconds after midnight on 1/1/1997 in big endian.816 B (122 words) - 20:44, 24 June 2011
- * 1 - TI-83+ SE590 B (85 words) - 21:10, 24 June 2011
- ...ns a subfield, 090, which has the actual date, in seconds after midnight 1/1/1997, in big endian. Apps with expiration dates check this field in the cer370 B (54 words) - 23:48, 28 May 2013
- .db 80h, 81h, 1 .db 80h, 12h, 1, 4 ; or 15 for the TI-84+CSE3 KB (504 words) - 11:06, 9 December 2020
- Port 27 and 28 appear to have no effect in memory mapping mode 1.1 KB (205 words) - 21:54, 13 March 2013
- By an order of 64 bytes per block, this port can re-map data from RAM page 1 to the memory addresses 8000h - BFFFh without regard to the contents of por ...says: This port seems to have no effect whatsoever during memory map mode 1, but I may be wrong about that.1 KB (196 words) - 09:30, 12 March 2013
- ...to write a 0 over a 0, the eZ80 series doesn't care if you write a 0 or a 1 over a 0. In both cases, the resulting bit will be unchanged. Furthermore, ...e 68k series, where writing a 0 over a 0 will hurt the chip, and writing a 1 over a 0 will not change the value. On the eZ80 series, both are possible.10 KB (1,793 words) - 16:50, 4 October 2020
- * Bit 1 enables the effects of the ram delay controlled by port 2E. Bits 0&1 are reset on the 83+SE and set on the 84+(se).2 KB (277 words) - 23:49, 18 February 2013
- * Bit 1 enables the effects of the ram delay controlled by port 2E.1 KB (241 words) - 20:49, 27 October 2011
- * Bit 1 enables the effects of the ram delay controlled by port 2E.1 KB (211 words) - 20:49, 27 October 2011
- * Bit 1 enables the effects of the ram delay controlled by port 2E.1 KB (211 words) - 20:49, 27 October 2011
- * Crystal timers: HL is incremented for 1/256 second and displayed4 KB (649 words) - 07:09, 20 September 2013
- Bit 0 of this port forms the high bit of page number for port 22. Bit 1 of this port forms the high bit of the page number for port 23. Therefore, * Bit 1: High bit (bit 8) of port 231 KB (170 words) - 14:52, 20 January 2021
- ** Bit 1: set to initialize LCD at higher power supply level. Hardware version 0 is the original TI-83 Plus, version 1 is the TI-83 Plus Silver Edition, version 2 is the TI-84 Plus, and version958 B (142 words) - 22:39, 14 September 2011
- This port will add a 1 cycle delay for certain types of reads for the ram or the flash. This port' * Bit 1 of the LCD ports (depending on current CPU speed mode) enable the effects o2 KB (319 words) - 11:17, 9 December 2020
- After every write to the LCD bit 1 of [[83Plus:Ports:02|port 2]] resets for a certain amount of time based on ...ivisor for the crystal timers in mode 3. 0 means divide by 1 (no divisor), 1 means divide by 2, 2 means divide by 3, &c. No divisor is applied for CPU s2 KB (307 words) - 16:30, 3 March 2020
- Pretty much the entire first 1,000 bytes or so of the boot code falls under this category. * SP: $FFC3 when an OS transfer fails, $FFC5 otherwise (tested with boot code 1.02 on a TI-84+ and TI-84+ SE). This a pretty reliable means of discovering1 KB (214 words) - 10:29, 29 October 2011
- |1 ...by bit 5, which is connected to the CAT4004A Constant Current LED Driver (1-wire EZDim (TM) interface!). To turn the backlight off, reset bit 5 and lea4 KB (711 words) - 17:34, 25 October 2014
- 1) [[#Descriptors|Descriptors]] 1) Device2 KB (308 words) - 23:07, 23 November 2011
- 1) [[#Mouse_Demo|Mouse Demo]]3 KB (481 words) - 23:06, 23 November 2011
- 1) KBD Action241 B (37 words) - 23:08, 23 November 2011
- * Bits 0-1: Whatever was last written * Bits 0-1: Set a new value1 KB (207 words) - 21:28, 19 February 2013
- {| cellspacing="0" border="1" ..., a byte must be executed in the 4000h-7FFFh range, and in memory map mode 1, a byte must be executed in the 4000-BFFFh range. When this byte is execute4 KB (839 words) - 14:03, 17 February 2012
- * Bits 0-1: Whatever was last written * Bits 0-1: Set a new value621 B (96 words) - 21:30, 19 February 2013
- ld bc,1 ;DE is the GCD, need to shift it left B-1 times.3 KB (557 words) - 16:08, 30 September 2019
- ld a, kExtApps ;1 ld de, progToEdit-1 ;32 KB (396 words) - 19:07, 3 March 2012
- db 1 ;how many headers?3 KB (627 words) - 10:31, 11 July 2016
- * Bit 1: Unknown; probably related to HNP and/or SRP.1,023 B (163 words) - 22:48, 15 August 2013
- === Bit 1 ===688 B (75 words) - 23:21, 11 January 2013
- ...tarting from 80h. So, the TI-83+ has two RAM pages, R0 and R1 or R:0 and R:1. Additionally, P: refers to ports (e.g. P:10 for the LCD command port), and ...e page to a port. Oh, no. First, there are two memory mapping modes, 0 and 1, which on the TI-83+ behave slightly differently than on everything else. T7 KB (1,299 words) - 23:10, 19 May 2013
- ld a,1 ; do stuff that needs page 1 swapped in2 KB (285 words) - 21:30, 19 February 2013
- ...nes, or even allow an interrupt to occur with anything other than RAM Page 1 (41h on 83+ Basic, 81h on everything else) swapped in. ld a,12 KB (323 words) - 21:31, 19 February 2013
- set the row to 1, the column to 2, write a pixel so the column is now 3, and 07 0000 Reset Disp.Ctrl.1: LCD scanning, command processing off20 KB (3,233 words) - 01:54, 3 January 2015
- pKey equ 1 stBattGood equ 1116 KB (14,724 words) - 23:10, 23 January 2016
- === Bit 1 ===571 B (60 words) - 05:22, 22 February 2013
- * [[83Plus:RAM:8478|OP1]]+1 = name of variable ld hl,progName-11 KB (162 words) - 23:42, 22 February 2013
- ...T instruction, which is what the RST instructions were designed for. In IM 1, the Z80 always executes RST 38h. The TI-83+ family operating system always operates in IM 1, in which any interrupt signal causes the CPU to execute the RST 38h instru6 KB (949 words) - 21:05, 28 June 2013
- '''Length:''' 1 byte676 B (95 words) - 20:54, 1 April 2013
- '''Length:''' 1 byte660 B (91 words) - 20:54, 1 April 2013
- * [[84PCSE:Flags:4A#Bit_4|putmapDrawColor]] = 1 to use curFGColor/curBGColor (0 to use black/white) * [[84PCSE:Flags:05#Bit_3|textInverse]] = 1 to swap foreground and background colors4 KB (582 words) - 19:46, 25 May 2015
- === Bit 1 ===1 KB (144 words) - 20:26, 1 April 2013
- === Bit 1 ===1 KB (145 words) - 21:21, 2 April 2013
- ...MHz, and 8x 6 MHz, giving much more stable CPU clock speeds.) Setting bit 1 of port 54 will stop the USB controller parts from getting the 48 MHz, effe3 KB (584 words) - 18:59, 13 November 2014
- ...reset its corresponding bit to 0; to set a pin for output, set the bit to 1.458 B (73 words) - 04:42, 29 April 2013
- .db 80h, 31h, 1 .db 80h, 81h, 15 KB (952 words) - 17:52, 21 October 2014
- * Bit 1: Set if an interrupt was generated when a byte can be sent. ...ges in the signal states. It will divide by 2^n, allowing you to divide by 1, 2, 4 ... 64. Value 111b (7) will halt the link assist. Bits 0 through 4 co2 KB (269 words) - 20:41, 11 August 2013
- ...Rate]] [[Category:83Plus:Ports:By_Name|Link Assist Input Buffer/CPU Speed 1 Signaling Rate]] '''Function:''' Link Assist Input Buffer/CPU Speed 1 Signaling Rate1 KB (171 words) - 20:44, 11 August 2013
- ...e signaling rate of the link assist in CPU speed mode 2 (15 MHz, duplicate 1). See [[83Plus:Ports:09|port 09]] for details.407 B (57 words) - 20:46, 11 August 2013
- * Bit 12 KB (300 words) - 15:30, 12 August 2013
- * A = 1-3 for intermediate charge levels.877 B (130 words) - 20:03, 31 August 2013
- * Sets hook address at $9E8D and hook page at $9E8F. Sets bit 1 of iy+$36 (Parser Hook enabled).547 B (78 words) - 04:51, 9 September 2013
- * Bit 1: Set if the first hardware timer will generate an interrupt (range: 108Hz-5 * Bit 0: Set 1 to enable the ON key. Set 0 acknowledge the interrupt request and/or to dis5 KB (885 words) - 23:26, 10 September 2013
- * Time string like "1:41AM" or "15:56" stored to buffer.991 B (148 words) - 06:55, 18 September 2013
- * A = color index (1 to 15) | 1 || 001F || 0 || 0 || 31 || Blue1 KB (147 words) - 19:06, 19 October 2013
- * A = 1 to use the current foreground color, or 4 to copy pixels from the graph buf * ([[84PCSE:RAM:A038|penFGColor]]) = RGB color to draw (if A = 1)1 KB (227 words) - 19:50, 19 October 2013
- * A = 1 to use the current foreground color, or 4 to copy pixels from the graph buf * ([[84PCSE:RAM:A038|penFGColor]]) = RGB color to draw (if A = 1)1 KB (229 words) - 19:55, 19 October 2013
- * HL = X coordinate of left edge (must be at least 1) * B = Y coordinate of top edge (from top of screen; must be at least 1)1,002 B (146 words) - 20:27, 19 October 2013
- Draw a rectangular outline 1 pixel wide. ...E-1) × (C-B-1). The outer dimensions of the border are (HL-DE+1) × (C-B+1).907 B (133 words) - 20:34, 19 October 2013
- Draw a white rectangular outline 1 pixel wide. ...E-1) × (C-B-1). The outer dimensions of the border are (HL-DE+1) × (C-B+1).877 B (127 words) - 20:39, 19 October 2013
- Draw a rectangular outline 1 pixel wide, and fill the interior of the rectangle with white. ...E-1) × (C-B-1). The outer dimensions of the border are (HL-DE+1) × (C-B+1).1,011 B (146 words) - 10:09, 20 October 2013
- '''Length:''' 1 byte This is the current color index (a number between 1 and 15, which identifies one of the 15 predefined colors.) It is used as a2 KB (276 words) - 21:45, 19 October 2013
- The dimensions of the filled area are (HL-DE+1) × (C-B+1). The routine checks for HL > DE (in which case nothing is drawn), but doe966 B (152 words) - 10:08, 20 October 2013
- The dimensions of the filled area are (HL-DE+1) × (C-B+1). The routine checks for HL > DE (in which case nothing is drawn), but doe945 B (147 words) - 10:12, 20 October 2013
- The dimensions of the inverted area are (HL-DE+1) × (C-B+1). The routine doesn't check that the provided coordinates are valid.1 KB (174 words) - 10:20, 20 October 2013
- The dimensions of the highlighted area are (HL-DE+1) × (C-B+1). The routine doesn't check that the provided coordinates are valid.1 KB (228 words) - 10:29, 20 October 2013
- The dimensions of the highlighted area are (HL-DE+1) × (C-B+1). The routine doesn't check that the provided coordinates are valid.1 KB (237 words) - 10:33, 20 October 2013
- * [[84PCSE:Flags:2B#Bit_2|fullScrnDraw, (iy + apiFlg4)]] = 1 to use LCD coordinates; 0 to use graph coordinates * [[84PCSE:Flags:02#Bit_1|plotLoc, (iy + plotFlags)]] = 1 to draw to LCD only; 0 to draw to LCD and graph buffer3 KB (469 words) - 11:18, 20 October 2013
- * [[84PCSE:Flags:2B#Bit_2|fullScrnDraw, (iy + apiFlg4)]] = 1 to use LCD coordinates; 0 to use graph coordinates * [[84PCSE:Flags:02#Bit_1|plotLoc, (iy + plotFlags)]] = 1 to draw to LCD only; 0 to draw to LCD and graph buffer2 KB (245 words) - 11:58, 20 October 2013
- ...8100. Such routines also always disable interrupts temporarily and set IM 1.624 B (94 words) - 04:37, 21 February 2014
- {| width="30%" border="1" cellspacing="1" bgcolor="white" I suggest still using 1 as the speed setting value since the speed of the other values may change i4 KB (654 words) - 11:32, 9 December 2020
- ...the advanced gate array includes support for 32-256 K of RAM, support for 1-4 MB of flash, more precise and sophisticated write and execution permissio10 KB (1,648 words) - 02:24, 4 June 2015
- === Bit 1 ===2 KB (297 words) - 04:38, 10 May 2014
- '''Length:''' 1 byte.702 B (105 words) - 04:29, 10 May 2014
- === Bit 1 ===653 B (74 words) - 04:40, 10 May 2014
- ...writing to the port. A pressed key reads a 0 bit. An unpressed key reads a 1 bit. The port reads FF after a reset (write FF). ...ed group is pressed, the corresponding key bit reads 0, otherwise it reads 1 (active-low).6 KB (909 words) - 11:21, 9 December 2020
- * [[84PCSE:Flags:14#Bit_4|penDrawColor]] = 1 to use penFGColor/penBGColor (0 to use black/white) * [[84PCSE:Flags:32#Bit_7|penEraseBelow]] = 1 to erase a two-pixel border below the character1 KB (151 words) - 18:36, 2 August 2014
- ...the user might use group 0 for events in a tile mapping system, and group 1 for events in sprites. Thus, the user can separately debug the two systems. |<code>ED 1<i>x</i> ED <i>imm8</i></code>9 KB (1,593 words) - 17:17, 18 November 2014
- ...of the TA3 ASIC highlighting the relevant pins. Note the silk-screened pin 1 label and the filled circle on the upper-left of the ASIC.]] ...for, so consider instead 910 Ω for ≈ 19 MHz, or 1 kΩ for ≈ 18 MHz, which should hopefully be safe3 KB (436 words) - 20:36, 7 May 2020
- ** Bit 1: System reset enable. Set to reboot the calculator when the counter reaches ** Bit 4: Clock source. Set to 1 to use the 32768Hz clock, or 0 to use the CPU clock.2 KB (278 words) - 21:51, 3 April 2015
- ** Bits 0-1: Scan mode *** Mode 1: Indiscriminate key detection. Data registers are invalid, but whenever any5 KB (722 words) - 21:49, 1 January 2018
- {|border="1" cellspacing="0" cellpadding="5" HBP = 31 (actual = HBP + 1 = 32)13 KB (1,762 words) - 22:58, 14 August 2021
- ...(almost always) been prefetched by this point, so the PC value checked is 1 byte after the end of the instruction.1,009 B (163 words) - 17:53, 10 November 2016
- shaCtrl equ 00h ; 1 byte bmUsbPortPwrCtrl equ 1 << bUsbPortPwrCtrl218 KB (25,988 words) - 00:56, 27 May 2023
- ** Bit 1: Set to enable second interrupt. ** Bit 6: Load operation. Write a 1 to load the Count registers with the values in the Write registers. When th2 KB (355 words) - 19:56, 17 October 2016
- |<u>Timer 1</u> |Match value 1 3 KB (493 words) - 18:20, 21 December 2015
- === Bits [1:0]: OS Timer Rate ===1 KB (192 words) - 10:22, 6 August 2017
- === Bits [1:0] ===547 B (76 words) - 14:24, 27 March 2015
- ...ps are limited to a maximum read rate under 20 MHz, necessitating at least 1 wait state for the ASIC's faster 48 MHz clock. The ASIC's internal memory m ...s bits 5-11. A fetch from the same cache line as previously accessed costs 1 wait state (so the read takes a total of 2 cycles), a fetch from a differen6 KB (960 words) - 12:12, 24 April 2022
- ...cycles to read a byte from flash. (V/RAM gets 3 wait states for reads, and 1 waitvstate for writes, for totals of 4 and 2, respectively.)2 KB (376 words) - 08:24, 18 April 2020
- |Bit 1 is always 02 KB (317 words) - 00:44, 24 April 2021
- |Bit 1 might be direction (0 = in, 1 = out). Other bits unknown. |Bit 0/1 is set when bytes can be written/read through port $1900.3 KB (419 words) - 21:38, 21 January 2022
- |BL goes to full-bright if not zero, returns to normal after about 1 second when reset to zero2 KB (258 words) - 12:07, 25 May 2016
- |1 |[[:84PCE:Ports:7000|Timer 1]]3 KB (411 words) - 14:47, 16 January 2023
- 5%-25% ; returns 1585 B (65 words) - 00:36, 6 March 2016
